return PTR_ERR(dc->dc8200_clk_pix0);
}
- clk_set_parent( dc->dc8200_clk_pix1, dc->hdmitx0_pixelclk );
- clk_set_parent( dc->dc8200_clk_pix0, dc->hdmitx0_pixelclk );
+ //clk_set_parent( dc->dc8200_clk_pix1, dc->hdmitx0_pixelclk );
+ //clk_set_parent( dc->dc8200_clk_pix0, dc->hdmitx0_pixelclk );
#else
//_SWITCH_CLOCK_CLK_U0_DC8200_CLK_PIX0_SOURCE_CLK_HDMITX0_PIXELCLK_;
dev_err(dev, "---hdmitx0_pixelclk get error\n");
return PTR_ERR(dc->hdmitx0_pixelclk);
}
- clk_set_parent( dc->dc8200_clk_pix0, dc->hdmitx0_pixelclk );//parent,child
+ //clk_set_parent( dc->dc8200_clk_pix0, dc->hdmitx0_pixelclk );//parent,child
#endif
vs_dc_clock_disable(dc);
vs_dc_dc8200_resets_assert(dev, dc);
vs_dc_vouttop_resets_assert(dev, dc);
- vs_dc_resets_assert(dev, dc);
+ //vs_dc_resets_assert(dev, dc);
//plda_clk_rst_deinit(dev);
starfive_power_domain_set(POWER_DOMAIN_VOUT, 0);
}
}
#endif
//_SWITCH_CLOCK_CLK_U0_DC8200_CLK_PIX0_SOURCE_CLK_DC8200_PIX0_;
- clk_set_parent( dc->dc8200_clk_pix0, dc->dc8200_pix0 );//child,parent
+ //clk_set_parent( dc->dc8200_clk_pix0, dc->dc8200_pix0 );//child,parent
+ /*
ret = drv_config_dc_4_dsi(dc,dev);
if (ret < 0) {
dev_err(dev, "failed to drv_config_dc_4_dsi: %d\n", ret);
return ret;
}
+ */
#endif
#ifdef CONFIG_DRM_I2C_NXP_TDA998X
display.dither_enable = crtc_state->dither_enable;
display.enable = true;
-
+#if 0
#ifdef CONFIG_STARFIVE_DSI//
clk_set_rate(dc->dc8200_pix0, 20144263);//round up, 20144262+1
+ clk_set_parent( dc->dc8200_clk_pix0, dc->dc8200_pix0 );//child,parent
#endif
-
- if (crtc_state->encoder_type == DRM_MODE_ENCODER_DSI)
+#endif
+ if (crtc_state->encoder_type == DRM_MODE_ENCODER_DSI){
+ clk_set_rate(dc->dc8200_pix0, 20144263);//round up, 20144262+1
+ clk_set_parent( dc->dc8200_clk_pix1, dc->dc8200_pix0 );//child,parent
dc_hw_set_out(&dc->hw, OUT_DPI, display.id);
- else
+ }else{
+ clk_set_parent( dc->dc8200_clk_pix1, dc->hdmitx0_pixelclk );
+ clk_set_parent( dc->dc8200_clk_pix0, dc->hdmitx0_pixelclk );
dc_hw_set_out(&dc->hw, OUT_DP, display.id);
+ }
#ifdef CONFIG_VERISILICON_MMU
if (crtc_state->mmu_prefetch == VS_MMU_PREFETCH_ENABLE)
int ret;
+#ifdef CONFIG_STARFIVE_DSI
+ struct drm_panel *tmp_panel;
+#endif
+
encoder = &simple->encoder;
/* Encoder. */
+ dev_info(dev,"encoder_bind begin\n");
ret = drm_encoder_init(drm_dev, encoder, &encoder_funcs,
simple->priv->encoder_type, NULL);
/* output port is port1*/
#ifdef CONFIG_STARFIVE_DSI
- struct drm_panel *tmp_panel;
-
ret = drm_of_find_panel_or_bridge(dev->of_node, 1, 0,&tmp_panel, &bridge);
if (ret){
printk("==no panel, %d\n",ret);
if (ret)
goto err;
+ dev_info(dev,"encoder_bind end\n");
return 0;
err:
drm_encoder_cleanup(encoder);
+ dev_info(dev,"encoder_bind error\n");
- return ret;
+ //return ret;
+ return 0;
}
static void encoder_unbind(struct device *dev, struct device *master,