* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
*/
-int cpu_eth_init(bd_t *bis)
+int cpu_eth_init(struct bd_info *bis)
{
int rc = -ENODEV;
* Initializes on-chip MMC controllers.
* to override, implement board_mmc_init()
*/
-int cpu_mmc_init(bd_t *bis)
+int cpu_mmc_init(struct bd_info *bis)
{
return fsl_esdhc_mmc_init(bis);
}
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
*/
-int cpu_eth_init(bd_t *bis)
+int cpu_eth_init(struct bd_info *bis)
{
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong val;
* Initializes on-chip MMC controllers.
* to override, implement board_mmc_init()
*/
-int cpu_mmc_init(bd_t *bis)
+int cpu_mmc_init(struct bd_info *bis)
{
return fsl_esdhc_mmc_init(bis);
}
}
#endif
-int cpu_eth_init(bd_t *bis)
+int cpu_eth_init(struct bd_info *bis)
{
#if defined(CONFIG_FEC_MXC)
struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
* Initializes on-chip MMC controllers.
* to override, implement board_mmc_init()
*/
-int cpu_mmc_init(bd_t *bis)
+int cpu_mmc_init(struct bd_info *bis)
{
#ifdef CONFIG_MMC_MXC
return mxc_mmc_init(bis);
* Initializes on-chip ethernet controllers.
*/
#if defined(CONFIG_MX28) && defined(CONFIG_CMD_NET)
-int cpu_eth_init(bd_t *bis)
+int cpu_eth_init(struct bd_info *bis)
{
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
DECLARE_GLOBAL_DATA_PTR;
static gd_t gdata __section(".data");
#ifdef CONFIG_SPL_SERIAL_SUPPORT
-static bd_t bdata __section(".data");
+static struct bd_info bdata __section(".data");
#endif
/*
#endif
#ifdef CONFIG_FSL_ESDHC
-int cpu_mmc_init(bd_t *bis)
+int cpu_mmc_init(struct bd_info *bis)
{
return fsl_esdhc_mmc_init(bis);
}
#endif
-int cpu_eth_init(bd_t *bis)
+int cpu_eth_init(struct bd_info *bis)
{
#if defined(CONFIG_TSEC_ENET) && !defined(CONFIG_DM_ETH)
tsec_standard_init(bis);
}
}
-void ft_cpu_setup(void *blob, bd_t *bd)
+void ft_cpu_setup(void *blob, struct bd_info *bd)
{
int off;
int val;
}
#endif
-int cpu_eth_init(bd_t *bis)
+int cpu_eth_init(struct bd_info *bis)
{
int rc = -ENODEV;
}
#ifdef CONFIG_FSL_ESDHC_IMX
-int cpu_mmc_init(bd_t *bis)
+int cpu_mmc_init(struct bd_info *bis)
{
return fsl_esdhc_mmc_init(bis);
}
#endif
#ifdef CONFIG_FSL_ESDHC
-int cpu_mmc_init(bd_t *bis)
+int cpu_mmc_init(struct bd_info *bis)
{
return fsl_esdhc_mmc_init(bis);
}
#endif
-int cpu_eth_init(bd_t *bis)
+int cpu_eth_init(struct bd_info *bis)
{
int error = 0;
}
#endif
-void ft_cpu_setup(void *blob, bd_t *bd)
+void ft_cpu_setup(void *blob, struct bd_info *bd)
{
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
unsigned int svr = gur_in32(&gur->svr);
}
#endif
-int cpu_eth_init(bd_t * bis)
+int cpu_eth_init(struct bd_info * bis)
{
int rc = -ENODEV;
#ifndef ASM_ARCH_MXCMMC_H
#define ASM_ARCH_MXCMMC_H
-int mxc_mmc_init(bd_t *bis);
+int mxc_mmc_init(struct bd_info *bis);
#endif
};
void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs);
-int mxc_mmc_init(bd_t *bis);
+int mxc_mmc_init(struct bd_info *bis);
#endif
#ifndef __ARCH_ARM_MX6UL_LITESOM_H__
#define __ARCH_ARM_MX6UL_LITESOM_H__
-int litesom_mmc_init(bd_t *bis);
+int litesom_mmc_init(struct bd_info *bis);
#ifdef CONFIG_SPL_BUILD
void litesom_init_f(void);
#include <asm/mach-imx/sys_proto.h>
-int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int), int (*cd)(int));
+int mxsmmc_initialize(struct bd_info *bis, int id, int (*wp)(int),
+ int (*cd)(int));
#ifdef CONFIG_SPL_BUILD
void arch_print_bdinfo(void)
{
- bd_t *bd = gd->bd;
+ struct bd_info *bd = gd->bd;
bdinfo_print_num("arch_number", bd->bi_arch_number);
#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
{
__maybe_unused int ret = 0;
#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_OF_LIBFDT)
- bd_t *bd = gd->bd;
+ struct bd_info *bd = gd->bd;
int bank;
u64 start[CONFIG_NR_DRAM_BANKS];
u64 size[CONFIG_NR_DRAM_BANKS];
cleanup_before_linux();
}
-static void setup_start_tag (bd_t *bd)
+static void setup_start_tag (struct bd_info *bd)
{
params = (struct tag *)bd->bi_boot_params;
params = tag_next (params);
}
-static void setup_memory_tags(bd_t *bd)
+static void setup_memory_tags(struct bd_info *bd)
{
int i;
}
}
-static void setup_commandline_tag(bd_t *bd, char *commandline)
+static void setup_commandline_tag(struct bd_info *bd, char *commandline)
{
char *p;
params = tag_next (params);
}
-static void setup_initrd_tag(bd_t *bd, ulong initrd_start, ulong initrd_end)
+static void setup_initrd_tag(struct bd_info *bd, ulong initrd_start,
+ ulong initrd_end)
{
/* an ATAG_INITRD node tells the kernel where the compressed
* ramdisk can be found. ATAG_RDIMG is a better name, actually.
params = tag_next (params);
}
-static void setup_end_tag(bd_t *bd)
+static void setup_end_tag(struct bd_info *bd)
{
params->hdr.tag = ATAG_NONE;
params->hdr.size = 0;
__weak void dram_bank_mmu_setup(int bank)
{
- bd_t *bd = gd->bd;
+ struct bd_info *bd = gd->bd;
int i;
/* bd->bi_dram is available only after relocation */
}
#endif
-int cpu_eth_init(bd_t *bis)
+int cpu_eth_init(struct bd_info *bis)
{
int rc = -ENODEV;
* Initializes on-chip MMC controllers.
* to override, implement board_mmc_init()
*/
-int cpu_mmc_init(bd_t *bis)
+int cpu_mmc_init(struct bd_info *bis)
{
return fsl_esdhc_mmc_init(bis);
}
static inline bool check_in_dram(ulong addr)
{
int i;
- bd_t *bd = gd->bd;
+ struct bd_info *bd = gd->bd;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
if (bd->bi_dram[i].size) {
return 0;
}
-static int ft_add_optee_node(void *fdt, bd_t *bd)
+static int ft_add_optee_node(void *fdt, struct bd_info *bd)
{
const char *path, *subpath;
int offs;
return 0;
}
-int ft_system_setup(void *blob, bd_t *bd)
+int ft_system_setup(void *blob, struct bd_info *bd)
{
int ret;
int off;
return 0;
}
-int ft_system_setup(void *blob, bd_t *bd)
+int ft_system_setup(void *blob, struct bd_info *bd)
{
#ifdef CONFIG_IMX8MQ
int i = 0;
#define EMMC_PWR_GPIO IMX_GPIO_NR(4, 10)
-int litesom_mmc_init(bd_t *bis)
+int litesom_mmc_init(struct bd_info *bis)
{
int ret;
}
#ifdef CONFIG_OF_SYSTEM_SETUP
-int ft_system_setup(void *blob, bd_t *bd)
+int ft_system_setup(void *blob, struct bd_info *bd)
{
const char *status = "disabled";
u32 i, reg;
#endif /* CONFIG_ARCH_MISC_INIT */
#ifdef CONFIG_MVGBE
-int cpu_eth_init(bd_t *bis)
+int cpu_eth_init(struct bd_info *bis)
{
mvgbe_initialize(bis);
return 0;
#endif
#ifdef CONFIG_MVEBU_MMC
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
mvebu_mmc_init(bis);
return 0;
#endif
#ifdef CONFIG_LPC32XX_ETH
-int cpu_eth_init(bd_t *bis)
+int cpu_eth_init(struct bd_info *bis)
{
lpc32xx_eth_initialize(bis);
return 0;
return 0;
}
-__weak int meson_ft_board_setup(void *blob, bd_t *bd)
+__weak int meson_ft_board_setup(void *blob, struct bd_info *bd)
{
return 0;
}
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
meson_init_reserved_memory(blob);
#endif /* CONFIG_ARCH_MISC_INIT */
#if defined(CONFIG_MMC_SDHCI_MV) && !defined(CONFIG_DM_MMC)
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
mv_sdh_init(MVEBU_SDIO_BASE, 0, 0,
SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_WAIT_SEND_CMD);
#endif
#if defined(CONFIG_MMC_OMAP_HS)
-int cpu_mmc_init(bd_t *bis)
+int cpu_mmc_init(struct bd_info *bis)
{
int ret;
#ifdef CONFIG_TI_SECURE_DEVICE
-static void ft_hs_fixups(void *fdt, bd_t *bd)
+static void ft_hs_fixups(void *fdt, struct bd_info *bd)
{
/* Check we are running on an HS/EMU device type */
if (GP_DEVICE != get_device_type()) {
hang();
}
#else
-static void ft_hs_fixups(void *fdt, bd_t *bd) { }
+static void ft_hs_fixups(void *fdt, struct bd_info *bd) { }
#endif /* #ifdef CONFIG_TI_SECURE_DEVICE */
/*
* fixups should remain in the board files which is where
* this function should be called from.
*/
-void ft_cpu_setup(void *fdt, bd_t *bd)
+void ft_cpu_setup(void *fdt, struct bd_info *bd)
{
ft_hs_fixups(fdt, bd);
}
#define CONFIG_SECURE_RUNTIME_RESV_SRAM_SZ (0)
#endif
-int ft_hs_disable_rng(void *fdt, bd_t *bd)
+int ft_hs_disable_rng(void *fdt, struct bd_info *bd)
{
const char *path;
int offs;
return p - (char *)buf;
}
-int ft_hs_fixup_dram(void *fdt, bd_t *bd)
+int ft_hs_fixup_dram(void *fdt, struct bd_info *bd)
{
const char *path, *subpath;
int offs, len;
return 0;
}
#else
-int ft_hs_fixup_dram(void *fdt, bd_t *bd) { return 0; }
+int ft_hs_fixup_dram(void *fdt, struct bd_info *bd) { return 0; }
#endif
-int ft_hs_add_tee(void *fdt, bd_t *bd)
+int ft_hs_add_tee(void *fdt, struct bd_info *bd)
{
const char *path, *subpath;
int offs;
void dram_bank_mmu_setup(int bank)
{
- bd_t *bd = gd->bd;
+ struct bd_info *bd = gd->bd;
int i;
u32 start = bd->bi_dram[bank].start >> MMU_SECTION_SHIFT;
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
*/
-int cpu_eth_init(bd_t *bis)
+int cpu_eth_init(struct bd_info *bis)
{
u32 reset;
118 /* One interrupt for Crypto DMA by secure world */
};
-static int ft_hs_fixup_crossbar(void *fdt, bd_t *bd)
+static int ft_hs_fixup_crossbar(void *fdt, struct bd_info *bd)
{
const char *path;
int offs;
#if ((TI_OMAP5_SECURE_BOOT_RESV_SRAM_SZ != 0) || \
(CONFIG_SECURE_RUNTIME_RESV_SRAM_SZ != 0))
-static int ft_hs_fixup_sram(void *fdt, bd_t *bd)
+static int ft_hs_fixup_sram(void *fdt, struct bd_info *bd)
{
const char *path;
int offs;
return 0;
}
#else
-static int ft_hs_fixup_sram(void *fdt, bd_t *bd) { return 0; }
+static int ft_hs_fixup_sram(void *fdt, struct bd_info *bd) { return 0; }
#endif
-static void ft_hs_fixups(void *fdt, bd_t *bd)
+static void ft_hs_fixups(void *fdt, struct bd_info *bd)
{
/* Check we are running on an HS/EMU device type */
if (GP_DEVICE != get_device_type()) {
hang();
}
#else
-static void ft_hs_fixups(void *fdt, bd_t *bd)
+static void ft_hs_fixups(void *fdt, struct bd_info *bd)
{
}
#endif /* #ifdef CONFIG_TI_SECURE_DEVICE */
return 0;
}
-static void ft_opp_clock_fixups(void *fdt, bd_t *bd)
+static void ft_opp_clock_fixups(void *fdt, struct bd_info *bd)
{
const char **clk_names;
u32 *clk_rates;
}
}
#else
-static void ft_opp_clock_fixups(void *fdt, bd_t *bd) { }
+static void ft_opp_clock_fixups(void *fdt, struct bd_info *bd) { }
#endif /* CONFIG_TARGET_DRA7XX_EVM || CONFIG_TARGET_AM57XX_EVM */
/*
* fixups should remain in the board files which is where
* this function should be called from.
*/
-void ft_cpu_setup(void *fdt, bd_t *bd)
+void ft_cpu_setup(void *fdt, struct bd_info *bd)
{
ft_hs_fixups(fdt, bd);
ft_opp_clock_fixups(fdt, bd);
#endif /* CONFIG_ARCH_MISC_INIT */
#ifdef CONFIG_MVGBE
-int cpu_eth_init(bd_t *bis)
+int cpu_eth_init(struct bd_info *bis)
{
mvgbe_initialize(bis);
return 0;
#include <linux/errno.h>
#include <netdev.h>
-int cpu_eth_init(bd_t *bis)
+int cpu_eth_init(struct bd_info *bis)
{
int ret = -ENODEV;
#ifdef CONFIG_SH_ETHER
* This function is called right before the kernel is booted. "blob" is the
* device tree that will be passed to the kernel.
*/
-int ft_system_setup(void *blob, bd_t *bd)
+int ft_system_setup(void *blob, struct bd_info *bd)
{
int ret = 0;
int soc;
* This function is called right before the kernel is booted. "blob" is the
* device tree that will be passed to the kernel.
*/
-int ft_system_setup(void *blob, bd_t *bd)
+int ft_system_setup(void *blob, struct bd_info *bd)
{
const char *gpu_compats[] = {
#if defined(CONFIG_TEGRA124)
* The DRAM PHY requires 64 byte scratch area in each DRAM channel
* for its dynamic PHY training feature.
*/
-static int uniphier_ld20_fdt_mem_rsv(void *fdt, bd_t *bd)
+static int uniphier_ld20_fdt_mem_rsv(void *fdt, struct bd_info *bd)
{
unsigned long rsv_addr;
const unsigned long rsv_size = 64;
return 0;
}
-int ft_board_setup(void *fdt, bd_t *bd)
+int ft_board_setup(void *fdt, struct bd_info *bd)
{
static const struct node_info nodes[] = {
{ "socionext,uniphier-denali-nand-v5a", MTD_DEV_TYPE_NAND },
* int board_eth_init(bd_t *bis)
*/
-int cpu_eth_init(bd_t *bis)
+int cpu_eth_init(struct bd_info *bis)
{
return mcffec_initialize(bis);
}
* int board_eth_init(bd_t *bis)
*/
-int cpu_eth_init(bd_t *bis)
+int cpu_eth_init(struct bd_info *bis)
{
return mcffec_initialize(bis);
}
* create a board-specific function called:
* int board_eth_init(bd_t *bis)
*/
-int cpu_eth_init(bd_t *bis)
+int cpu_eth_init(struct bd_info *bis)
{
return mcffec_initialize(bis);
}
* int board_eth_init(bd_t *bis)
*/
-int cpu_eth_init(bd_t *bis)
+int cpu_eth_init(struct bd_info *bis)
{
return mcffec_initialize(bis);
}
* int board_eth_init(bd_t *bis)
*/
-int cpu_eth_init(bd_t *bis)
+int cpu_eth_init(struct bd_info *bis)
{
#if defined(CONFIG_FSLDMAFEC)
mcdmafec_initialize(bis);
void arch_print_bdinfo(void)
{
- bd_t *bd = gd->bd;
+ struct bd_info *bd = gd->bd;
#if defined(CONFIG_SYS_INIT_RAM_ADDR)
bdinfo_print_num("sramstart", (ulong)bd->bi_sramstart);
#define LINUX_MAX_ARGS 256
static ulong get_sp (void);
-static void set_clocks_in_mhz (bd_t *kbd);
+static void set_clocks_in_mhz (struct bd_info *kbd);
void arch_lmb_reserve(struct lmb *lmb)
{
bootm_headers_t *images)
{
int ret;
- bd_t *kbd;
- void (*kernel) (bd_t *, ulong, ulong, ulong, ulong);
+ struct bd_info *kbd;
+ void (*kernel) (struct bd_info *, ulong, ulong, ulong, ulong);
struct lmb *lmb = &images->lmb;
/*
if (ret)
goto error;
- kernel = (void (*)(bd_t *, ulong, ulong, ulong, ulong))images->ep;
+ kernel = (void (*)(struct bd_info *, ulong, ulong, ulong, ulong))images->ep;
debug("## Transferring control to Linux (at address %08lx) ...\n",
(ulong) kernel);
return sp;
}
-static void set_clocks_in_mhz (bd_t *kbd)
+static void set_clocks_in_mhz (struct bd_info *kbd)
{
char *s;
defined(CONFIG_INITRD_TAG) || \
defined(CONFIG_SERIAL_TAG) || \
defined(CONFIG_REVISION_TAG)
-static void setup_start_tag(bd_t *bd);
+static void setup_start_tag(struct bd_info *bd);
# ifdef CONFIG_SETUP_MEMORY_TAGS
-static void setup_memory_tags(bd_t *bd);
+static void setup_memory_tags(struct bd_info *bd);
# endif
-static void setup_commandline_tag(bd_t *bd, char *commandline);
+static void setup_commandline_tag(struct bd_info *bd, char *commandline);
# ifdef CONFIG_INITRD_TAG
-static void setup_initrd_tag(bd_t *bd, ulong initrd_start, ulong initrd_end);
+static void setup_initrd_tag(struct bd_info *bd, ulong initrd_start,
+ ulong initrd_end);
# endif
-static void setup_end_tag(bd_t *bd);
+static void setup_end_tag(struct bd_info *bd);
static struct tag *params;
#endif /* CONFIG_SETUP_MEMORY_TAGS || CONFIG_CMDLINE_TAG || CONFIG_INITRD_TAG */
int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
{
- bd_t *bd = gd->bd;
+ struct bd_info *bd = gd->bd;
char *s;
int machid = bd->bi_arch_number;
void (*theKernel)(int zero, int arch, uint params);
defined(CONFIG_INITRD_TAG) || \
defined(CONFIG_SERIAL_TAG) || \
defined(CONFIG_REVISION_TAG)
-static void setup_start_tag(bd_t *bd)
+static void setup_start_tag(struct bd_info *bd)
{
params = (struct tag *)bd->bi_boot_params;
}
#ifdef CONFIG_SETUP_MEMORY_TAGS
-static void setup_memory_tags(bd_t *bd)
+static void setup_memory_tags(struct bd_info *bd)
{
int i;
}
#endif /* CONFIG_SETUP_MEMORY_TAGS */
-static void setup_commandline_tag(bd_t *bd, char *commandline)
+static void setup_commandline_tag(struct bd_info *bd, char *commandline)
{
char *p;
}
#ifdef CONFIG_INITRD_TAG
-static void setup_initrd_tag(bd_t *bd, ulong initrd_start, ulong initrd_end)
+static void setup_initrd_tag(struct bd_info *bd, ulong initrd_start,
+ ulong initrd_end)
{
/* an ATAG_INITRD node tells the kernel where the compressed
* ramdisk can be found. ATAG_RDIMG is a better name, actually.
}
#endif /* CONFIG_REVISION_TAG */
-static void setup_end_tag(bd_t *bd)
+static void setup_end_tag(struct bd_info *bd)
{
params->hdr.tag = ATAG_NONE;
params->hdr.size = 0;
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
*/
-int cpu_eth_init(bd_t *bis)
+int cpu_eth_init(struct bd_info *bis)
{
#if defined(CONFIG_UEC_ETH)
uec_standard_init(bis);
* Initializes on-chip MMC controllers.
* to override, implement board_mmc_init()
*/
-int cpu_mmc_init(bd_t *bis)
+int cpu_mmc_init(struct bd_info *bis)
{
#ifdef CONFIG_FSL_ESDHC
return fsl_esdhc_mmc_init(bis);
}
#endif
-void ft_cpu_setup(void *blob, bd_t *bd)
+void ft_cpu_setup(void *blob, struct bd_info *bd)
{
immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
int spridr = immr->sysconf.spridr;
* irqinfo - print information about PCI devices
*/
-void do_irqinfo(struct cmd_tbl *cmdtp, bd_t *bd, int flag, int argc,
+void do_irqinfo(struct cmd_tbl *cmdtp, struct bd_info *bd, int flag, int argc,
char *const argv[])
{
}
#endif
#if defined(CONFIG_OF_LIBFDT)
-void ft_pci_setup(void *blob, bd_t *bd)
+void ft_pci_setup(void *blob, struct bd_info *bd)
{
int nodeoffset;
int tmp[2];
* Initializes on-chip MMC controllers.
* to override, implement board_mmc_init()
*/
-int cpu_mmc_init(bd_t *bis)
+int cpu_mmc_init(struct bd_info *bis)
{
#ifdef CONFIG_FSL_ESDHC
return fsl_esdhc_mmc_init(bis);
}
-static int fec_init(struct eth_device* dev, bd_t *bis)
+static int fec_init(struct eth_device* dev, struct bd_info *bis)
{
struct ether_fcc_info_s * info = dev->priv;
int i;
}
}
-int fec_initialize(bd_t *bis)
+int fec_initialize(struct bd_info *bis)
{
struct eth_device* dev;
int i;
#define fdt_fixup_l2_switch(x)
#endif
-void ft_cpu_setup(void *blob, bd_t *bd)
+void ft_cpu_setup(void *blob, struct bd_info *bd)
{
int off;
int val;
extern void ft_fixup_num_cores(void *blob);
extern void ft_srio_setup(void *blob);
-void ft_cpu_setup(void *blob, bd_t *bd)
+void ft_cpu_setup(void *blob, struct bd_info *bd)
{
#ifdef CONFIG_MP
int off;
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
*/
-int cpu_eth_init(bd_t *bis)
+int cpu_eth_init(struct bd_info *bis)
{
#if defined(CONFIG_MPC8XX_FEC)
fec_initialize(bis);
DECLARE_GLOBAL_DATA_PTR;
-void ft_cpu_setup(void *blob, bd_t *bd)
+void ft_cpu_setup(void *blob, struct bd_info *bd)
{
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
"timebase-frequency", get_tbclk(), 1);
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
*/
-int cpu_eth_init(bd_t *bis)
+int cpu_eth_init(struct bd_info *bis)
{
#if defined(CONFIG_ETHER_ON_FCC)
fec_initialize(bis);
void arch_print_bdinfo(void)
{
- bd_t *bd = gd->bd;
+ struct bd_info *bd = gd->bd;
#if defined(CONFIG_SYS_INIT_RAM_ADDR)
bdinfo_print_num("sramstart", (ulong)bd->bi_sramstart);
static ulong get_sp (void);
extern void ft_fixup_num_cores(void *blob);
-static void set_clocks_in_mhz (bd_t *kbd);
+static void set_clocks_in_mhz (struct bd_info *kbd);
#ifndef CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE
#define CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE (768*1024*1024)
static void boot_jump_linux(bootm_headers_t *images)
{
- void (*kernel)(bd_t *, ulong r4, ulong r5, ulong r6,
- ulong r7, ulong r8, ulong r9);
+ void (*kernel)(struct bd_info *, ulong r4, ulong r5, ulong r6,
+ ulong r7, ulong r8, ulong r9);
#ifdef CONFIG_OF_LIBFDT
char *of_flat_tree = images->ft_addr;
#endif
- kernel = (void (*)(bd_t *, ulong, ulong, ulong,
+ kernel = (void (*)(struct bd_info *, ulong, ulong, ulong,
ulong, ulong, ulong))images->ep;
debug("## Transferring control to Linux (at address %08lx) ...\n",
(ulong)kernel);
*/
debug(" Booting using OF flat tree...\n");
WATCHDOG_RESET ();
- (*kernel) ((bd_t *)of_flat_tree, 0, 0, EPAPR_MAGIC,
+ (*kernel) ((struct bd_info *)of_flat_tree, 0, 0, EPAPR_MAGIC,
env_get_bootm_mapsize(), 0, 0);
/* does not return */
} else
ulong cmd_end = images->cmdline_end;
ulong initrd_start = images->initrd_start;
ulong initrd_end = images->initrd_end;
- bd_t *kbd = images->kbd;
+ struct bd_info *kbd = images->kbd;
debug(" Booting using board info...\n");
WATCHDOG_RESET ();
{
ulong of_size = images->ft_len;
struct lmb *lmb = &images->lmb;
- bd_t **kbd = &images->kbd;
+ struct bd_info **kbd = &images->kbd;
int ret = 0;
return sp;
}
-static void set_clocks_in_mhz (bd_t *kbd)
+static void set_clocks_in_mhz (struct bd_info *kbd)
{
char *s;
return 0;
}
-int cpu_eth_init(bd_t *bis)
+int cpu_eth_init(struct bd_info *bis)
{
#ifdef CONFIG_SH_ETHER
sh_eth_initialize(bis);
#if defined(CONFIG_OF_LIBFDT) && !defined(CONFIG_OF_NO_KERNEL)
int arch_fixup_memory_node(void *blob)
{
- bd_t *bd = gd->bd;
+ struct bd_info *bd = gd->bd;
int bank;
u64 start[CONFIG_NR_DRAM_BANKS];
u64 size[CONFIG_NR_DRAM_BANKS];
}
#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
-int board_eth_init(bd_t *bd)
+int board_eth_init(struct bd_info *bd)
{
return ftmac100_initialize(bd);
}
}
#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
-int board_eth_init(bd_t *bd)
+int board_eth_init(struct bd_info *bd)
{
return ftmac100_initialize(bd);
}
}
#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
-int board_eth_init(bd_t *bd)
+int board_eth_init(struct bd_info *bd)
{
return ftmac100_initialize(bd);
}
{
/* Pointer is writable since we allocated a register for it */
gd = (gd_t *)CONFIG_SPL_GD_ADDR;
- bd_t *bd;
+ struct bd_info *bd;
memset(gd, 0, sizeof(gd_t));
- bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
- memset(bd, 0, sizeof(bd_t));
+ bd = (struct bd_info *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
+ memset(bd, 0, sizeof(struct bd_info));
gd->bd = bd;
bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
bd->bi_memsize = CONFIG_SYS_L2_SIZE;
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
struct fsl_pq_mdio_info mdio_info;
struct tsec_info_struct tsec_info[4];
}
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
phys_addr_t base;
phys_size_t size;
void enable_uart0_pin_mux(void);
void enable_i2c_pin_mux(void);
void enable_board_pin_mux(void);
-int board_eth_init(bd_t *bis);
+int board_eth_init(struct bd_info *bis);
int brdefaultip_setup(int bus, int chip);
}
#endif /* CONFIG_LCD */
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
int nodeoffset;
return 0;
}
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
int node, phandle, res;
* called prior to booting kernel or by 'fdt boardsetup' command
*
*/
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
static const struct node_info nodes[] = {
{ "physmap-flash.0", MTD_DEV_TYPE_NOR, }, /* NOR flash */
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
cpu_eth_init(bis); /* Built in controller(s) come first */
return pci_eth_init(bis);
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
cpu_eth_init(bis); /* Built in controller(s) come first */
return pci_eth_init(bis);
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
cpu_eth_init(bis); /* Built in controller(s) come first */
return pci_eth_init(bis);
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
cpu_eth_init(bis); /* Built in controller(s) come first */
return pci_eth_init(bis);
}
#ifdef CONFIG_ARMADA100_FEC
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
struct armd1apmu_registers *apmu_regs =
(struct armd1apmu_registers *)ARMD1_APMU_BASE;
writel(0x1, (void *)CRM_SWRESET);
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
if (designware_initialize(ETH0_BASE_ADDRESS, 0) >= 0)
return 1;
return ret;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int ret;
int i;
return 1;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
setup_iomux_enet();
setup_pcie();
SC_P_USDHC2_CD_B | MUX_MODE_ALT(3) | MUX_PAD_CTRL(ESDHC_PAD_CTRL),
};
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int i, ret;
return omap_reboot_mode_store("b");
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
return omap_mmc_init(1, 0, 0, -1, -1);
}
}
#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rc = 0;
#ifdef CONFIG_SMC91111
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rc = 0;
#ifdef CONFIG_SMC911X
return rc;
}
-int cpu_mmc_init(bd_t *bis)
+int cpu_mmc_init(struct bd_info *bis)
{
int rc = 0;
(void) bis;
}
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *fdt, bd_t *bd)
+int ft_board_setup(void *fdt, struct bd_info *bd)
{
int offset, tmp, len;
const struct fdt_property *prop;
/*
* Board specific ethernet initialization routine.
*/
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rc = 0;
#ifndef CONFIG_DM_ETH
}
#ifdef CONFIG_DRIVER_AT91EMAC
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return at91emac_register(bis, (u32) ATMEL_BASE_EMAC);
}
}
#ifdef CONFIG_DRIVER_DM9000
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return dm9000_initialize(bis);
}
}
#ifdef CONFIG_KS8851_MLL
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return ks8851_mll_initialize(0, CONFIG_KS8851_MLL_BASEADDR);
}
{USDHC4_BASE_ADDR},
};
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int ret;
u32 index = 0;
gpio_direction_output(gpio, 0);
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
uint32_t base = IMX_FEC_BASE;
struct mii_dev *bus = NULL;
return 0;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
return platinum_phy_config(phydev);
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return cpu_eth_init(bis);
}
return 0;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
/*
* Only one USDHC controller on titianium
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
setup_iomux_enet();
}
#ifdef CONFIG_CMD_MMC
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
return mxsmmc_initialize(bis, 0, NULL, NULL);
}
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int ret;
struct eth_device *dev;
#endif
#ifdef CONFIG_GENERIC_ATMEL_MCI
-int cpu_mmc_init(bd_t *bis)
+int cpu_mmc_init(struct bd_info *bis)
{
return atmel_mci_init((void *)ATMEL_BASE_MCI0);
}
}
#ifndef CONFIG_DM_ETH
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0);
}
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x1f);
}
#if defined(CONFIG_USB_ETHER) && \
(!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USB_ETHER))
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return usb_eth_initialize(bis);
}
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
uint32_t base = IMX_FEC_BASE;
struct mii_dev *bus = NULL;
/*
* mmc_init - Initializes mmc
*/
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int ret = 0;
/*
* mmc_init - Initializes mmc
*/
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int ret = 0;
#endif
#ifdef CONFIG_BCM_SF2_ETH
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rc = -1;
printf("Registering BCM sf2 eth\n");
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rc = 0;
/*
* Board specific ethernet initialization routine.
*/
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rc = 0;
return 1;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
#define ENET_PHY_RESET_GPIO IMX_GPIO_NR(4, 17)
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int ret;
return 0;
}
-int board_eth_init(bd_t *bd)
+int board_eth_init(struct bd_info *bd)
{
return ep93xx_eth_initialize(0, MAC_BASE);
}
{USDHC3_BASE_ADDR},
};
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int i, ret;
/*
#define CL_SOM_IMX7_FEC_DEV_ID_PRI 0
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
/* set Ethernet MAC address environment */
cl_som_imx7_handle_mac_address("ethaddr", CONFIG_SYS_I2C_EEPROM_BUS);
static struct fsl_esdhc_cfg cl_som_imx7_spl_usdhc_cfg = {
USDHC1_BASE_ADDR, 0, 4};
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
cl_som_imx7_usdhc1_pads_set();
cl_som_imx7_spl_usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
#define SB_FX6_I2C_EEPROM_BUS 0
#define NO_MAC_ADDR "No MAC address found for %s\n"
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int err;
{ "jedec,spi-nor", MTD_DEV_TYPE_NOR, },
};
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
u32 baseboard_rev;
int nodeoffset;
.max_bus_width = 4,
};
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
cm_fx6_set_usdhc_iomux();
#define AR8051_DEBUG_RGMII_CLK_DLY_REG 0x5
#define AR8051_RGMII_TX_CLK_DLY 0x100
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rv, n = 0;
const char *devname;
mdelay(2);
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rv;
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
struct phy_device *phydev;
struct mii_dev *bus;
return ret;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
#ifndef CONFIG_SPL_BUILD
s32 status = 0;
}
#if defined(CONFIG_MMC)
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
return omap_mmc_init(0, 0, 0, -1, -1);
}
}
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int ret;
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
usb_eth_initialize(bis);
return 0;
0xFFFFFC05, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
};
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
const char *sync = "receive";
/*
* Initializes on-board ethernet controllers.
*/
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
/* Select RMII fucntion through the expander */
.voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
};
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID);
return 1; /* eMMC/uSDHC4 is always present */
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
SETUP_IOMUX_PADS(usdhc4_pads);
usdhc_cfg[0].esdhc_base = USDHC4_BASE_ADDR;
}
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
return 0;
}
/*
* This is optionally called last during late initialization.
*/
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
const char *devname;
unsigned short mode;
#endif
#ifdef CONFIG_GENERIC_ATMEL_MCI
-int board_mmc_init(bd_t *bd)
+int board_mmc_init(struct bd_info *bd)
{
at91_periph_clk_enable(ATMEL_ID_MCI);
return ret;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
#ifndef CONFIG_SPL_BUILD
int ret;
return 1;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
setup_iomux_enet();
enable_enet_clk(1);
return ret;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int ret;
int i;
return 1;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
setup_iomux_enet();
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rc = 0;
#ifdef CONFIG_MACB
}
#ifdef CONFIG_TARGET_CADDY2
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return pci_eth_init(bis);
}
#endif
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
}
#endif
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
#if defined(CONFIG_PCI) && !defined(CONFIG_DM_PCI)
fsl_pcie_init_board(0);
}
-void pci_of_setup(void *blob, bd_t *bd)
+void pci_of_setup(void *blob, struct bd_info *bd)
{
FT_FSL_PCI_SETUP;
}
return 0;
}
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
phys_addr_t base;
phys_size_t size;
#define __CORENET_DS_H__
void fdt_fixup_board_enet(void *blob);
-void pci_of_setup(void *blob, bd_t *bd);
+void pci_of_setup(void *blob, struct bd_info *bd);
#endif
#endif
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#ifdef CONFIG_FMAN_ENET
struct fsl_pq_mdio_info dtsec_mdio_info;
}
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#ifdef CONFIG_FMAN_ENET
ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
* 0x36 | | |
*/
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#ifdef CONFIG_FMAN_ENET
struct fsl_pq_mdio_info dtsec_mdio_info;
{USDHC2_BASE_ADDR, 0, 4},
};
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int i, ret;
/*
}
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
return 0;
}
}
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
return 0;
}
return 0;
}
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
arch_fixup_fdt(blob);
}
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
arch_fixup_fdt(blob);
}
#endif
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
arch_fixup_fdt(blob);
}
#ifdef CONFIG_TSEC_ENET
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
struct fsl_pq_mdio_info mdio_info;
struct tsec_info_struct tsec_info[4];
}
#endif
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
return mdio_register(bus);
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
struct fsl_pq_mdio_info mdio_info;
struct tsec_info_struct tsec_info[3];
}
#endif
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return pci_eth_init(bis);
}
}
#endif
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return pci_eth_init(bis);
}
}
#endif
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return pci_eth_init(bis);
}
}
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
u64 base[CONFIG_NR_DRAM_BANKS];
u64 size[CONFIG_NR_DRAM_BANKS];
}
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#ifdef CONFIG_FMAN_ENET
int i, idx, lane, slot, interface;
}
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
u64 base[CONFIG_NR_DRAM_BANKS];
u64 size[CONFIG_NR_DRAM_BANKS];
#include "../common/fman.h"
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#ifdef CONFIG_FMAN_ENET
int i;
}
}
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
u64 base[CONFIG_NR_DRAM_BANKS];
u64 size[CONFIG_NR_DRAM_BANKS];
#include "../common/fman.h"
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#ifdef CONFIG_FMAN_ENET
struct memac_mdio_info dtsec_mdio_info;
}
#endif
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
u64 base[CONFIG_NR_DRAM_BANKS];
u64 size[CONFIG_NR_DRAM_BANKS];
}
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#ifdef CONFIG_FMAN_ENET
int i, idx, lane, slot, interface;
}
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
u64 base[CONFIG_NR_DRAM_BANKS];
u64 size[CONFIG_NR_DRAM_BANKS];
#include "../common/fman.h"
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#ifdef CONFIG_FMAN_ENET
int i;
}
#endif
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
u64 base[CONFIG_NR_DRAM_BANKS];
u64 size[CONFIG_NR_DRAM_BANKS];
}
#endif
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int error = 0, i;
#ifdef CONFIG_FSL_MC_ENET
#include <fsl-mc/ldpaa_wriop.h>
#ifndef CONFIG_DM_ETH
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#if defined(CONFIG_FSL_MC_ENET)
int i, interface;
fdt_status_disabled(fdt, offset);
}
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
int i;
u16 mc_memory_bank = 0;
#endif
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int error = 0;
#endif
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
u64 base[CONFIG_NR_DRAM_BANKS];
u64 size[CONFIG_NR_DRAM_BANKS];
#endif
#endif // !CONFIG_DM_ETH
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#ifndef CONFIG_DM_ETH
#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
#endif
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
u64 base[CONFIG_NR_DRAM_BANKS];
u64 size[CONFIG_NR_DRAM_BANKS];
DECLARE_GLOBAL_DATA_PTR;
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#ifndef CONFIG_DM_ETH
#if defined(CONFIG_FSL_MC_ENET)
fdt_status_disabled(fdt, offset);
}
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
int i;
u16 mc_memory_bank = 0;
#endif
#endif /* !CONFIG_DM_ETH */
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#ifndef CONFIG_DM_ETH
#if defined(CONFIG_FSL_MC_ENET)
return false;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#if defined(CONFIG_FSL_MC_ENET)
struct memac_mdio_info mdio_info;
#endif
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
int i;
u16 mc_memory_bank = 0;
#ifdef CONFIG_DRIVER_DM9000
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return dm9000_initialize(bis);
}
#endif /* CONFIG_MPC8XXX_SPI */
#ifdef CONFIG_FSL_ESDHC
-int board_mmc_init(bd_t *bd)
+int board_mmc_init(struct bd_info *bd)
{
return fsl_esdhc_mmc_init(bd);
}
return 0;
}
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
fsl_fdt_fixup_dr_usb(blob, bd);
}
#endif
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rv, num_if = 0;
}
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
#ifdef CONFIG_PCI
}
#if defined(CONFIG_OF_BOARD_SETUP)
-void fdt_tsec1_fixup(void *fdt, bd_t *bd)
+void fdt_tsec1_fixup(void *fdt, struct bd_info *bd)
{
const char disabled[] = "disabled";
const char *path;
do_fixup_by_path(fdt, path, "status", disabled, sizeof(disabled), 1);
}
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
#ifdef CONFIG_PCI
}
#endif
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
cpu_eth_init(bis); /* Initialize TSECs first */
return pci_eth_init(bis);
}
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
#ifdef CONFIG_PCI
}
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
#ifdef CONFIG_PCI
#endif
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
#ifdef CONFIG_PCI
}
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
#ifdef CONFIG_PCI
}
#ifdef CONFIG_FSL_ESDHC
-int board_mmc_init(bd_t *bd)
+int board_mmc_init(struct bd_info *bd)
{
struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR;
u8 *bcsr = (u8 *)CONFIG_SYS_BCSR;
#endif
#if defined(CONFIG_TSEC1) || defined(CONFIG_TSEC2)
-int board_eth_init(bd_t *bd)
+int board_eth_init(struct bd_info *bd)
{
struct fsl_pq_mdio_info mdio_info;
struct tsec_info_struct tsec_info[2];
return tsec_eth_init(bd, tsec_info, num);
}
-static void __ft_tsec_fixup(void *blob, bd_t *bd, const char *alias,
+static void __ft_tsec_fixup(void *blob, struct bd_info *bd, const char *alias,
int phy_addr)
{
const u32 *ph;
}
}
-static void ft_tsec_fixup(void *blob, bd_t *bd)
+static void ft_tsec_fixup(void *blob, struct bd_info *bd)
{
struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR;
u32 rcwh = in_be32(&im->reset.rcwh);
#endif
}
#else
-static inline void ft_tsec_fixup(void *blob, bd_t *bd) {}
+static inline void ft_tsec_fixup(void *blob, struct bd_info *bd) {}
#endif /* defined(CONFIG_TSEC1) || defined(CONFIG_TSEC2) */
int board_early_init_r(void)
return 0;
}
-static void ft_pci_fixup(void *blob, bd_t *bd)
+static void ft_pci_fixup(void *blob, struct bd_info *bd)
{
const char *status = "broken (no arbiter)";
int off;
#endif
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
ft_tsec_fixup(blob, bd);
mpc83xx_pcie_init(pex2 ? 1 : 2, pcie_reg);
}
-void ft_pcie_fixup(void *blob, bd_t *bd)
+void ft_pcie_fixup(void *blob, struct bd_info *bd)
{
const char *status = "disabled (PCIE1 is x2)";
#ifndef __BOARD_MPC837XEMDS_PCI_H
#define __BOARD_MPC837XEMDS_PCI_H
-extern void ft_pcie_fixup(void *blob, bd_t *bd);
+extern void ft_pcie_fixup(void *blob, struct bd_info *bd);
#endif /* __BOARD_MPC837XEMDS_PCI_H */
}
#ifdef CONFIG_FSL_ESDHC
-int board_mmc_init(bd_t *bd)
+int board_mmc_init(struct bd_info *bd)
{
struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR;
char buffer[HWCONFIG_BUFFER_SIZE] = {0};
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
#ifdef CONFIG_PCI
ft_pci_setup(blob, bd);
#if defined(CONFIG_OF_BOARD_SETUP)
void
-ft_pci_setup(void *blob, bd_t *bd)
+ft_pci_setup(void *blob, struct bd_info *bd)
{
int node, tmp[2];
const char *path;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#ifdef CONFIG_TSEC_ENET
struct fsl_pq_mdio_info mdio_info;
}
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
return;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#ifdef CONFIG_TSEC_ENET
struct fsl_pq_mdio_info mdio_info;
}
#if defined(CONFIG_OF_BOARD_SETUP) && !defined(CONFIG_DM_PCI)
-void ft_pci_setup(void *blob, bd_t *bd)
+void ft_pci_setup(void *blob, struct bd_info *bd)
{
FT_FSL_PCI_SETUP;
}
#if defined(CONFIG_OF_BOARD_SETUP)
void
-ft_pci_setup(void *blob, bd_t *bd)
+ft_pci_setup(void *blob, struct bd_info *bd)
{
int node, tmp[2];
const char *path;
#endif /* CONFIG_PCI */
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
out_be32(&lbc->lcrr, (u32)in_be32(&lbc->lcrr)| 0x00030000);
}
-static void fdt_board_disable_serial(void *blob, bd_t *bd, const char *alias)
+static void fdt_board_disable_serial(void *blob, struct bd_info *bd,
+ const char *alias)
{
const char *status = "disabled";
int off;
hwconfig_subarg_cmp("esdhc", "mode", "4-bits");
}
-static void fdt_board_fixup_qe_uart(void *blob, bd_t *bd)
+static void fdt_board_fixup_qe_uart(void *blob, struct bd_info *bd)
{
u8 *bcsr = (u8 *)CONFIG_SYS_BCSR_BASE;
const char *devtype = "serial";
#ifdef CONFIG_FSL_ESDHC
-int board_mmc_init(bd_t *bd)
+int board_mmc_init(struct bd_info *bd)
{
struct ccsr_gur *gur = (struct ccsr_gur *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
u8 *bcsr = (u8 *)CONFIG_SYS_BCSR_BASE;
return fsl_esdhc_mmc_init(bd);
}
-static void fdt_board_fixup_esdhc(void *blob, bd_t *bd)
+static void fdt_board_fixup_esdhc(void *blob, struct bd_info *bd)
{
const char *status = "disabled";
int off = -1;
}
}
#else
-static inline void fdt_board_fixup_esdhc(void *blob, bd_t *bd) {}
+static inline void fdt_board_fixup_esdhc(void *blob, struct bd_info *bd) {}
#endif
-static void fdt_board_fixup_qe_usb(void *blob, bd_t *bd)
+static void fdt_board_fixup_qe_usb(void *blob, struct bd_info *bd)
{
u8 *bcsr = (u8 *)CONFIG_SYS_BCSR_BASE;
#endif /* CONFIG_PCI */
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
#if defined(CONFIG_SYS_UCC_RMII_MODE)
int nodeoff, off, err;
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#ifdef CONFIG_TSEC_ENET
struct fsl_pq_mdio_info mdio_info;
}
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
phys_addr_t base;
phys_size_t size;
}
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
return val;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return pci_eth_init(bis);
}
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
int off;
u64 *tmp;
return val;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
/* Initialize TSECs */
cpu_eth_init(bis);
return gpio_get_value(MX23_PAD_PWM4__GPIO_1_30);
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
/* Configure WP as input */
gpio_direction_input(MX23_PAD_PWM4__GPIO_1_30);
return !gpio_get_value(CARD_DETECT);
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
static const iomux_v3_cfg_t sdhc1_pads[] = {
NEW_PAD_CTRL(MX25_PAD_SD1_CMD__SD1_CMD, NO_PAD_CTRL),
return gpio_get_value(MX28_PAD_SSP1_SCK__GPIO_2_12);
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
/* Configure WP as input */
gpio_direction_input(MX28_PAD_SSP1_SCK__GPIO_2_12);
#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#if defined(CONFIG_SMC911X)
int rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
struct fsl_esdhc_cfg esdhc_cfg = {MMC_SDHC1_BASE_ADDR};
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
static const iomux_v3_cfg_t sdhc1_pads[] = {
MX35_PAD_SD1_CMD__ESDHC1_CMD,
return ret;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
static const iomux_v3_cfg_t sd1_pads[] = {
NEW_PAD_CTRL(MX51_PAD_SD1_CMD__SD1_CMD, PAD_CTL_DSE_MAX |
#define SD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | \
PAD_CTL_DSE_HIGH)
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
static const iomux_v3_cfg_t sd1_pads[] = {
NEW_PAD_CTRL(MX53_PAD_SD1_CMD__ESDHC1_CMD, SD_CMD_PAD_CTRL),
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rc = -ENODEV;
#define SD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | \
PAD_CTL_DSE_HIGH)
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
static const iomux_v3_cfg_t sd1_pads[] = {
NEW_PAD_CTRL(MX53_PAD_SD1_CMD__ESDHC1_CMD, SD_CMD_PAD_CTRL),
#define SD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | \
PAD_CTL_DSE_HIGH)
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
static const iomux_v3_cfg_t sd1_pads[] = {
NEW_PAD_CTRL(MX53_PAD_SD1_CMD__ESDHC1_CMD, SD_CMD_PAD_CTRL),
#define SD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | \
PAD_CTL_DSE_HIGH)
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
static const iomux_v3_cfg_t sd1_pads[] = {
NEW_PAD_CTRL(MX53_PAD_SD1_CMD__ESDHC1_CMD, SD_CMD_PAD_CTRL),
return ret;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int ret;
u32 index = 0;
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
struct eth_device *dev;
int ret = cpu_eth_init(bis);
return !gpio_get_value(IMX_GPIO_NR(6, 15));
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
SETUP_IOMUX_PADS(usdhc3_pads);
return ret;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
struct src *psrc = (struct src *)SRC_BASE_ADDR;
unsigned reg = readl(&psrc->sbmr1) >> 11;
return ret;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
struct src *src_regs = (struct src *)SRC_BASE_ADDR;
u32 val;
return enable_fec_anatop_clock(1, ENET_125MHZ);
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int ret;
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
imx_iomux_v3_setup_multiple_pads(fec1_pads, ARRAY_SIZE(fec1_pads));
setup_fec();
return 1;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
}
#if IS_ENABLED(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
const char *path;
int rc, nodeoff;
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#ifdef CONFIG_TSEC_ENET
struct fsl_pq_mdio_info mdio_info;
}
}
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
phys_addr_t base;
phys_size_t size;
#endif
#ifdef CONFIG_SDCARD
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
config_board_mux(MUX_TYPE_SDHC);
return -1;
{
/* Pointer is writable since we allocated a register for it */
gd = (gd_t *)CONFIG_SPL_GD_ADDR;
- bd_t *bd;
+ struct bd_info *bd;
memset(gd, 0, sizeof(gd_t));
- bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
- memset(bd, 0, sizeof(bd_t));
+ bd = (struct bd_info *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
+ memset(bd, 0, sizeof(struct bd_info));
gd->bd = bd;
bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
bd->bi_memsize = CONFIG_SYS_L2_SIZE;
return gd->mem_clk;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
ccsr_gur_t *gur = (ccsr_gur_t *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
struct fsl_pq_mdio_info dtsec_mdio_info;
}
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
phys_addr_t base;
phys_size_t size;
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
struct fsl_pq_mdio_info mdio_info;
struct tsec_info_struct tsec_info[4];
#endif
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
phys_addr_t base;
phys_size_t size;
{
/* Pointer is writable since we allocated a register for it */
gd = (gd_t *)CONFIG_SPL_GD_ADDR;
- bd_t *bd;
+ struct bd_info *bd;
memset(gd, 0, sizeof(gd_t));
- bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
- memset(bd, 0, sizeof(bd_t));
+ bd = (struct bd_info *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
+ memset(bd, 0, sizeof(struct bd_info));
gd->bd = bd;
bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
bd->bi_memsize = CONFIG_SYS_L2_SIZE;
}
#endif /* #ifdef CONFIG_FMAN_ENET */
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#ifdef CONFIG_FMAN_ENET
struct fsl_pq_mdio_info dtsec_mdio_info;
#include <asm/fsl_liodn.h>
#include <fm_eth.h>
-extern void pci_of_setup(void *blob, bd_t *bd);
+extern void pci_of_setup(void *blob, struct bd_info *bd);
#include "cpld.h"
return 0;
}
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
phys_addr_t base;
phys_size_t size;
panic("Couldn't determine RAM size");
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return pci_eth_init(bis);
}
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
FT_FSL_PCI_SETUP;
return 1;
}
-int board_mmc_init(bd_t * bis)
+int board_mmc_init(struct bd_info * bis)
{
esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_USDHC_CLK);
#include <asm/fsl_serdes.h>
#include "../common/fman.h"
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#if defined(CONFIG_FMAN_ENET)
int i, interface;
fsl_pcie_init_board(0);
}
-void pci_of_setup(void *blob, bd_t *bd)
+void pci_of_setup(void *blob, struct bd_info *bd)
{
FT_FSL_PCI_SETUP;
}
void board_init_r(gd_t *gd, ulong dest_addr)
{
- bd_t *bd;
+ struct bd_info *bd;
- bd = (bd_t *)(gd + sizeof(gd_t));
- memset(bd, 0, sizeof(bd_t));
+ bd = (struct bd_info *)(gd + sizeof(gd_t));
+ memset(bd, 0, sizeof(struct bd_info));
gd->bd = bd;
bd->bi_memstart = CONFIG_SYS_INIT_L3_ADDR;
bd->bi_memsize = CONFIG_SYS_L3_SIZE;
return 0;
}
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
phys_addr_t base;
phys_size_t size;
#define __T1024_RDB_H__
void fdt_fixup_board_enet(void *blob);
-void pci_of_setup(void *blob, bd_t *bd);
+void pci_of_setup(void *blob, struct bd_info *bd);
#ifdef CONFIG_TARGET_T1023RDB
static u32 t1023rdb_ctrl(u32 ctrl_type);
static void fdt_enable_nor(void *blob);
#include "../common/fman.h"
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#ifdef CONFIG_FMAN_ENET
struct memac_mdio_info memac_mdio_info;
fsl_pcie_init_board(0);
}
-void pci_of_setup(void *blob, bd_t *bd)
+void pci_of_setup(void *blob, struct bd_info *bd)
{
FT_FSL_PCI_SETUP;
}
void board_init_r(gd_t *gd, ulong dest_addr)
{
- bd_t *bd;
+ struct bd_info *bd;
- bd = (bd_t *)(gd + sizeof(gd_t));
- memset(bd, 0, sizeof(bd_t));
+ bd = (struct bd_info *)(gd + sizeof(gd_t));
+ memset(bd, 0, sizeof(struct bd_info));
gd->bd = bd;
bd->bi_memstart = CONFIG_SYS_INIT_L3_ADDR;
bd->bi_memsize = CONFIG_SYS_L3_SIZE;
return 0;
}
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
phys_addr_t base;
phys_size_t size;
#define __T104x_RDB_H__
void fdt_fixup_board_enet(void *blob);
-void pci_of_setup(void *blob, bd_t *bd);
+void pci_of_setup(void *blob, struct bd_info *bd);
#endif
}
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#if defined(CONFIG_FMAN_ENET)
int i, idx, lane, slot, interface;
fsl_pcie_init_board(0);
}
-void pci_of_setup(void *blob, bd_t *bd)
+void pci_of_setup(void *blob, struct bd_info *bd)
{
FT_FSL_PCI_SETUP;
}
void board_init_r(gd_t *gd, ulong dest_addr)
{
- bd_t *bd;
+ struct bd_info *bd;
- bd = (bd_t *)(gd + sizeof(gd_t));
- memset(bd, 0, sizeof(bd_t));
+ bd = (struct bd_info *)(gd + sizeof(gd_t));
+ memset(bd, 0, sizeof(struct bd_info));
gd->bd = bd;
bd->bi_memstart = CONFIG_SYS_INIT_L3_ADDR;
bd->bi_memsize = CONFIG_SYS_L3_SIZE;
return 0;
}
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
phys_addr_t base;
phys_size_t size;
#define __CORENET_DS_H__
void fdt_fixup_board_enet(void *blob);
-void pci_of_setup(void *blob, bd_t *bd);
+void pci_of_setup(void *blob, struct bd_info *bd);
#endif
#include <fsl_dtsec.h>
#include <asm/fsl_serdes.h>
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#if defined(CONFIG_FMAN_ENET)
int i, interface;
fsl_pcie_init_board(0);
}
-void pci_of_setup(void *blob, bd_t *bd)
+void pci_of_setup(void *blob, struct bd_info *bd)
{
FT_FSL_PCI_SETUP;
}
void board_init_r(gd_t *gd, ulong dest_addr)
{
- bd_t *bd;
+ struct bd_info *bd;
- bd = (bd_t *)(gd + sizeof(gd_t));
- memset(bd, 0, sizeof(bd_t));
+ bd = (struct bd_info *)(gd + sizeof(gd_t));
+ memset(bd, 0, sizeof(struct bd_info));
gd->bd = bd;
bd->bi_memstart = CONFIG_SYS_INIT_L3_ADDR;
bd->bi_memsize = CONFIG_SYS_L3_SIZE;
return 0;
}
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
phys_addr_t base;
phys_size_t size;
#define __CORENET_DS_H__
void fdt_fixup_board_enet(void *blob);
-void pci_of_setup(void *blob, bd_t *bd);
+void pci_of_setup(void *blob, struct bd_info *bd);
#endif
return;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#if defined(CONFIG_FMAN_ENET)
int i, interface;
fsl_pcie_init_board(0);
}
-void pci_of_setup(void *blob, bd_t *bd)
+void pci_of_setup(void *blob, struct bd_info *bd)
{
FT_FSL_PCI_SETUP;
}
void board_init_r(gd_t *gd, ulong dest_addr)
{
- bd_t *bd;
+ struct bd_info *bd;
- bd = (bd_t *)(gd + sizeof(gd_t));
- memset(bd, 0, sizeof(bd_t));
+ bd = (struct bd_info *)(gd + sizeof(gd_t));
+ memset(bd, 0, sizeof(struct bd_info));
gd->bd = bd;
bd->bi_memstart = CONFIG_SYS_INIT_L3_ADDR;
bd->bi_memsize = CONFIG_SYS_L3_SIZE;
return 0;
}
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
phys_addr_t base;
phys_size_t size;
#define CONFIG_SYS_NUM_FM2_DTSEC 4
void fdt_fixup_board_enet(void *blob);
-void pci_of_setup(void *blob, bd_t *bd);
+void pci_of_setup(void *blob, struct bd_info *bd);
#endif
return 1;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
static const iomux_v3_cfg_t esdhc1_pads[] = {
NEW_PAD_CTRL(VF610_PAD_PTA24__ESDHC1_CLK, ESDHC_PAD_CTRL),
#ifdef CONFIG_FSL_ESDHC_IMX
static struct fsl_esdhc_cfg usdhc_cfg[2];
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
struct ventana_board_info ventana_info;
int board_type = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
}
#endif // CONFIG_MV88E61XX_SWITCH
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#ifdef CONFIG_FEC_MXC
struct ventana_board_info *info = &ventana_info;
* we will walk the PCI bus and add bridge nodes up to the device receiving
* the fixup.
*/
-void ft_board_pci_fixup(void *blob, bd_t *bd)
+void ft_board_pci_fixup(void *blob, struct bd_info *bd)
{
int i, np;
struct pci_dev *dev;
#define GPIO3_ADDR 0x20a4000
#define USDHC3_ADDR 0x2198000
#define PWM0_ADDR 0x2080000
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
struct ventana_board_info *info = &ventana_info;
struct ventana_eeprom_config *cfg;
}
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
fsl_fdt_fixup_dr_usb(blob, bd);
}
#ifdef CONFIG_FSL_ESDHC
-int board_mmc_init(bd_t *bd)
+int board_mmc_init(struct bd_info *bd)
{
immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
sysconf83xx_t *sysconf = &immr->sysconf;
}
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
fsl_fdt_fixup_dr_usb(blob, bd);
}
#ifdef CONFIG_FSL_ESDHC
-int board_mmc_init(bd_t *bd)
+int board_mmc_init(struct bd_info *bd)
{
immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
sysconf83xx_t *sysconf = &immr->sysconf;
}
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
fsl_fdt_fixup_dr_usb(blob, bd);
* 0, no ethernet devices found
* >0, number of ethernet devices initialized
*/
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
struct fsl_pq_mdio_info mdio_info;
struct tsec_info_struct tsec_info[2];
}
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
phys_addr_t base;
phys_size_t size;
}
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
char *rtc_status = env_get("rtc_status");
}
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
char *rtc_status = env_get("rtc_status");
{USDHC2_BASE_ADDR},
};
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int i, ret;
/*
return ret;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int ret;
}
/* We know all the init functions have been run now */
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rc = 0;
}
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *fdt, bd_t *bd)
+int ft_board_setup(void *fdt, struct bd_info *bd)
{
static const char disabled[] = "disabled";
u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
return 0;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int ret;
}
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
#include <common.h>
#include <fdt_support.h>
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
DECLARE_GLOBAL_DATA_PTR;
u64 mem_start[2], mem_size[2];
}
#ifdef CONFIG_DRIVER_DM9000
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
/* Enable clock */
jz4780_clk_ungate_ethernet();
#ifdef CONFIG_SPL_BUILD
#if defined(CONFIG_SPL_MMC_SUPPORT)
-int board_mmc_init(bd_t *bd)
+int board_mmc_init(struct bd_info *bd)
{
ci20_mux_mmc();
return jz_mmc_init((void __iomem *)MSC0_BASE);
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return pci_eth_init(bis);
}
return 1;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int ret = 0;
#endif
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
#ifdef CONFIG_FDT_FIXUP_PARTITIONS
static const struct node_info nodes[] = {
.version = CPSW_CTRL_VERSION_2,
};
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rv, ret = 0;
uint8_t mac_addr[6];
}
#if defined(CONFIG_MMC)
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
return omap_mmc_init(0, 0, 0, -1, -1);
}
reset_net_chip(64);
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#ifdef CONFIG_SMC911X
return smc911x_initialize(0, CONFIG_SMC911X_BASE);
return 0;
}
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
#ifdef CONFIG_FDT_FIXUP_PARTITIONS
static const struct node_info nodes[] = {
#endif
#if defined(CONFIG_KM_COMMON_ETH_INIT)
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
if (ethernet_present())
return cpu_eth_init(bis);
return 0;
}
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
#include <fsl_mdio.h>
#include <phy.h>
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int ret = 0;
#ifdef CONFIG_FMAN_ENET
}
#endif
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
phys_addr_t base;
phys_size_t size;
*/
-void pci_of_setup(void *blob, bd_t *bd);
+void pci_of_setup(void *blob, struct bd_info *bd);
fsl_pcie_init_board(0);
}
-void pci_of_setup(void *blob, bd_t *bd)
+void pci_of_setup(void *blob, struct bd_info *bd)
{
FT_FSL_PCI_SETUP;
}
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int ret = 0;
#ifdef CONFIG_SMC911X
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
cpu_eth_init(bis); /* Built in controller(s) come first */
return pci_eth_init(bis);
return 1;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
return fsl_esdhc_initialize(bis, &usdhc_cfg);
at91_periph_clk_enable(ATMEL_ID_MCI0);
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
/* Enable power for MCI0 interface */
at91_set_pio_output(AT91_PIO_PORTE, 7, 1);
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rc = 0;
at91_set_gpio_deglitch(AT91_PIN_PB18, 1);
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rc = 0;
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rc = 0;
return omap_reboot_mode_store("b");
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
return omap_mmc_init(1, 0, 0, -1, -1);
}
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
fdt_fixup_ethernet(blob);
return 0;
.max_bus_width = 8,
};
-int board_mmc_init(bd_t *bd)
+int board_mmc_init(struct bd_info *bd)
{
displ5_set_iomux_usdhc_spl();
return ret;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int ret;
u32 index = 0;
return 0;
}
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
/*
* i.MX28 L2 switch needs manual update (fixup) of eth MAC address
#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rv, n = 0;
#define SD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | \
PAD_CTL_DSE_HIGH)
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
static const iomux_v3_cfg_t sd1_pads[] = {
NEW_PAD_CTRL(MX53_PAD_SD1_CMD__ESDHC1_CMD, SD_CMD_PAD_CTRL),
gpio_direction_output(IMX_GPIO_NR(6, 0), 0);
}
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
if (lvds_compat_string)
do_fixup_by_path_string(blob, "/panel", "compatible",
#endif
#ifdef CONFIG_GENERIC_ATMEL_MCI
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
at91_mci_hw_init();
}
#endif
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rc = 0;
#ifdef CONFIG_MACB
}
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
fsl_fdt_fixup_dr_usb(blob, bd);
}
#endif
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rv, num_if = 0;
* Routine: board_mmc_init
* Description: Initialize mmc devices.
*/
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
omap_mmc_init(0, 0, 0, -1, -1);
omap_mmc_init(1, 0, 0, -1, -1);
}
}
-int ft_board_setup(void *fdt, bd_t *bd)
+int ft_board_setup(void *fdt, struct bd_info *bd)
{
ft_mac_address_setup(fdt);
ft_carveout_setup(fdt);
}
}
-int ft_board_setup(void *fdt, bd_t *bd)
+int ft_board_setup(void *fdt, struct bd_info *bd)
{
ft_mac_address_setup(fdt);
ft_carveout_setup(fdt);
}
}
-int ft_board_setup(void *fdt, bd_t *bd)
+int ft_board_setup(void *fdt, struct bd_info *bd)
{
ft_mac_address_setup(fdt);
ft_carveout_setup(fdt);
return 1; /* Card always present */
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
return mxsmmc_initialize(bis, 0, NULL, mx23_olx_mmc_cd);
}
return 1;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int i, ret;
}
#ifndef CONFIG_SPL_BUILD
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int ret;
int i;
return IMX_GPIO_NR(4, 24);
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
setup_iomux_enet();
mx6_dram_cfg(sysinfo, &mx6_mmcd_calib, mem_ddr);
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
if (spl_boot_device() == BOOT_DEVICE_SPI)
printf("MMC SEtup, Boot SPI");
}
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
#ifdef CONFIG_FDT_FIXUP_PARTITIONS
static const struct node_info nodes[] = {
}
#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return ne2k_register();
}
* variables wlanaddr,btaddr. if not, generate a unique address.
*/
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
u8 mac[ARP_HLEN];
return (void *)fw_dtb_pointer;
}
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
/*
* For now, we simply always add the simplefb DT node. Later, we
}
#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rc = 0;
#ifdef CONFIG_SMC91111
/* Added for BLANCHE(R-CarV2H board) */
#ifndef CONFIG_DM_ETH
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rc = 0;
}
#ifndef CONFIG_DM_ETH
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return pci_eth_init(bis);
}
pci_sh7780_init(&hose);
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
/* return >= 0 if a chip is found, the board's AX88796L is n2k-based */
return ne2k_register() + pci_eth_init(bis);
}
#if CONFIG_IS_ENABLED(OF_BOARD_SETUP) && CONFIG_IS_ENABLED(PCI)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
struct udevice *dev;
struct uclass *uc;
return 0;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
struct gpio_regs *gpio = GPIO_BASE;
return 0;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
struct gpio_regs *gpio = GPIO_BASE;
return 0;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
return mmcif_mmc_init();
}
}
#ifdef CONFIG_DRIVER_DM9000
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return dm9000_initialize(bis);
}
}
#endif
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rc = 0;
#ifdef CONFIG_MACB
}
#endif
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rc = 0;
#ifdef CONFIG_MACB
}
#ifdef CONFIG_MMC
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int ret;
/* dwmmc initializattion for available channels */
}
#endif
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#ifdef CONFIG_SMC911X
u32 smc_bw_conf, smc_bc_conf;
#endif
#ifdef CONFIG_MMC
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int i, ret, ret_sd = 0;
}
#endif
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rc = 0;
#ifdef CONFIG_SMC911X
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rc = 0;
#ifdef CONFIG_SMC911X
#endif
#ifdef CONFIG_MMC
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int i, err;
return 0;
}
-int ft_board_setup(void *fdt, bd_t *bd)
+int ft_board_setup(void *fdt, struct bd_info *bd)
{
/* Create an arbitrary reservation to allow testing OF_BOARD_SETUP.*/
return fdt_add_mem_rsv(fdt, 0x00d02000, 0x4000);
}
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int ret;
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
usb_eth_initialize(bis);
return 0;
#endif
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
#ifdef CONFIG_PCI
}
#endif
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
tsec_standard_init(bis);
pci_eth_init(bis);
}
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
}
#ifdef CONFIG_CMD_MMC
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
return mxsmmc_initialize(bis, 0, NULL, NULL);
}
#endif
#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
uint32_t base = IMX_FEC_BASE;
struct mii_dev *bus = NULL;
return ret;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
u32 index = 0;
int ret;
}
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
return 0;
}
}
#ifndef CONFIG_DM_ETH
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rc = 0;
#ifdef CONFIG_MACB
#if defined(CONFIG_DRIVER_TI_CPSW) || \
(defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET))
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
int n = 0;
#if defined(CONFIG_DRIVER_TI_CPSW) || \
(defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET))
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int n = 0;
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
#if defined(CONFIG_DRIVER_TI_CPSW) || \
(defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET))
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
int n = 0;
#ifndef CONFIG_DM_ETH
#ifdef CONFIG_MACB
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
}
#endif
#ifdef CONFIG_GENERIC_ATMEL_MCI
-int board_mmc_init(bd_t *bd)
+int board_mmc_init(struct bd_info *bd)
{
at91_mci_hw_init();
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
uint32_t base = IMX_FEC_BASE;
struct mii_dev *bus = NULL;
return ret;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int ret;
#endif /* CONFIG_BOARD_EARLY_INIT_R */
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
u32 val[12];
int rc, i = 0;
static struct fsl_esdhc_cfg usdhc_cfg = { USDHC4_BASE_ADDR };
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
imx_iomux_v3_setup_multiple_pads(usdhc4_pads, ARRAY_SIZE(usdhc4_pads));
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
cpu_eth_init(bis); /* Built in controller(s) come first */
return pci_eth_init(bis);
return;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int ret = 0;
return;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int ret = 0;
return;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int ret = 0;
return;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int ret = 0;
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int ret = 0;
#endif
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
#ifdef CONFIG_FDT_FIXUP_PARTITIONS
struct node_info nodes[] = {
}
#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int ret = 0;
}
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
__maybe_unused struct mmc *mmc0, *mmc1;
return 0;
}
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
int __maybe_unused r;
((defined(CONFIG_DRIVER_TI_CPSW) || \
defined(CONFIG_USB_ETHER) && defined(CONFIG_MUSB_GADGET)) && \
!defined(CONFIG_SPL_BUILD))
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rv, n = 0;
uint8_t mac_addr[6];
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
setup_iomux_enet();
return 1;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
SETUP_IOMUX_PADS(usdhc3_pads);
usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
setup_iomux_fec();
return 1;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
imx_iomux_v3_setup_multiple_pads(usdhc1_pads, ARRAY_SIZE(usdhc1_pads));
usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
return 1;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
{USDHC2_BASE_ADDR, 0, 4},
};
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int ret;
/*
}
#if defined(CONFIG_MMC)
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
omap_mmc_init(0, 0, 0, -1, -1);
return 1;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int ret;
return ret;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
static const iomux_v3_cfg_t sd1_pads[] = {
NEW_PAD_CTRL(MX51_PAD_SD1_CMD__SD1_CMD, PAD_CTL_DSE_MAX |
}
#define TS4800_GPIO_FEC_PHY_RES IMX_GPIO_NR(2, 14)
-int board_eth_init(bd_t *bd)
+int board_eth_init(struct bd_info *bd)
{
int dev_id = -1;
int phy_id = 0xFF;
}
#ifdef CONFIG_NET
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
cpu_eth_init(bis); /* Built in controller(s) come first */
return pci_eth_init(bis);
#define MAX_CPSW_SLAVES 2
/* At the moment, we do not want to stop booting for any failures here */
-int ft_board_setup(void *fdt, bd_t *bd)
+int ft_board_setup(void *fdt, struct bd_info *bd)
{
const char *slave_path, *enet_name;
int enetnode, slavenode, phynode;
}
#if defined(CONFIG_MMC)
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
return omap_mmc_init(0, 0, 0, -1, -1);
}
#endif /* !CONFIG_IS_ENABLED(DM_USB_GADGET) */
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
#endif
#if defined(CONFIG_MMC)
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
omap_mmc_init(0, 0, 0, -1, -1);
omap_mmc_init(1, 0, 0, -1, -1);
mac[0] = addr >> 40;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int ret;
uint8_t mac_addr[6];
#endif
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
#endif
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
int ret;
}
#if defined(CONFIG_MMC)
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
return omap_mmc_init(0, 0, 0, -1, -1);
}
#endif
#if defined(CONFIG_MMC)
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
omap_mmc_init(0, 0, 0, -1, -1);
omap_mmc_init(1, 0, 0, -1, -1);
#endif
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
gpio_set_value(rst_gpio, 1);
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#if defined(CONFIG_SMC911X)
env_set("ethaddr", NULL);
#endif /* CONFIG_CMD_NET */
#if defined(CONFIG_MMC)
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
return omap_mmc_init(0, 0, 0, -1, -1);
}
#endif /* CONFIG_MMC */
#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET) && !defined(CONFIG_CMD_NET)
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return usb_eth_initialize(bis);
}
#endif
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
int ret;
#endif
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
int lpae;
char *env;
return 0;
}
-void ft_board_setup_ex(void *blob, bd_t *bd)
+void ft_board_setup_ex(void *blob, struct bd_info *bd)
{
int lpae;
u64 size;
};
#if defined(CONFIG_MMC)
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
if (psc_enable_module(KS2_LPSC_MMC)) {
printf("%s module enabled failed\n", __func__);
}
#endif /* CONFIG_SPL_OS_BOOT */
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return 0;
}
}
#if defined(CONFIG_MMC)
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
omap_mmc_init(0, 0, 0, -1, -1);
omap_mmc_init(1, 0, 0, -1, -1);
}
#endif /* CONFIG_SPL_OS_BOOT */
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return 0;
}
}
#if defined(CONFIG_MMC)
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
return omap_mmc_init(0, 0, 0, -1, -1);
}
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return 0;
}
}
#if defined(CONFIG_MMC)
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
omap_mmc_init(0, 0, 0, -1, -1);
omap_mmc_init(1, 0, 0, -1, -1);
return 0;
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
uint8_t mac_addr[6];
uint32_t mac_hi, mac_lo;
}
#if defined(CONFIG_MMC)
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
return omap_mmc_init(0, 0, 0, -1, -1);
}
* Routine: board_eth_init
* Description: Setting up the Ethernet hardware.
*/
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return dm9000_initialize(bis);
}
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
return ft_common_board_setup(blob, bd);
}
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
return ft_common_board_setup(blob, bd);
}
return ret;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
struct src *psrc = (struct src *)SRC_BASE_ADDR;
unsigned reg = readl(&psrc->sbmr1) >> 11;
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
return ft_common_board_setup(blob, bd);
}
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
return ft_common_board_setup(blob, bd);
}
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
#if defined(CONFIG_FDT_FIXUP_PARTITIONS)
static struct node_info nodes[] = {
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
return ft_common_board_setup(blob, bd);
}
return ret;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
struct src *psrc = (struct src *)SRC_BASE_ADDR;
unsigned reg = readl(&psrc->sbmr1) >> 11;
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
u32 cma_size;
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
#if defined(CONFIG_IMX_BOOTAUX) && defined(CONFIG_ARCH_FIXUP_FDT_MEMORY)
int up;
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
return ft_common_board_setup(blob, bd);
}
#endif
#ifdef CONFIG_DRIVER_DM9000
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return dm9000_initialize(bis);
}
#ifdef CONFIG_CMD_MMC
#if !CONFIG_IS_ENABLED(DM_MMC)
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
pxa_mmc_register(0);
return 0;
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
return ft_common_board_setup(blob, bd);
}
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
return ft_common_board_setup(blob, bd);
}
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
#ifndef CONFIG_DM_VIDEO
int ret = 0;
#endif
#if defined(CONFIG_OF_LIBFDT)
-int ft_common_board_setup(void *blob, bd_t *bd)
+int ft_common_board_setup(void *blob, struct bd_info *bd)
{
if (tdx_serial) {
fdt_setprop(blob, 0, "serial-number", tdx_serial_str,
}
#endif /* CONFIG_SERIAL_TAG */
-int ft_common_board_setup(void *blob, bd_t *bd)
+int ft_common_board_setup(void *blob, struct bd_info *bd)
{
return 0;
}
#define TORADEX_USB_PRODUCT_NUM_OFFSET 0x4000
#define TDX_USB_VID 0x1B67
-int ft_common_board_setup(void *blob, bd_t *bd);
+int ft_common_board_setup(void *blob, struct bd_info *bd);
#endif /* _TDX_COMMON_H */
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
return 0;
}
}
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
return ret;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
imx_iomux_v3_setup_multiple_pads(tqma6_usdhc3_pads,
ARRAY_SIZE(tqma6_usdhc3_pads));
*/
#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
#define MODELSTRLEN 32u
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
char modelstr[MODELSTRLEN];
int tqma6_bb_board_mmc_getwp(struct mmc *mmc);
int tqma6_bb_board_mmc_getcd(struct mmc *mmc);
-int tqma6_bb_board_mmc_init(bd_t *bis);
+int tqma6_bb_board_mmc_init(struct bd_info *bis);
int tqma6_bb_board_early_init_f(void);
int tqma6_bb_board_init(void);
* Device Tree Support
*/
#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
-void tqma6_bb_ft_board_setup(void *blob, bd_t *bd);
+void tqma6_bb_ft_board_setup(void *blob, struct bd_info *bd);
#endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */
#endif
* Device Tree Support
*/
#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
-void tqma6_bb_ft_board_setup(void *blob, bd_t *bd)
+void tqma6_bb_ft_board_setup(void *blob, struct bd_info *bd)
{
/* TBD */
}
return ret;
}
-int tqma6_bb_board_mmc_init(bd_t *bis)
+int tqma6_bb_board_mmc_init(struct bd_info *bis)
{
int ret;
gpio_set_value(ENET_PHY_RESET_GPIO, 1);
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
return cpu_eth_init(bis);
}
* Device Tree Support
*/
#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
-void tqma6_bb_ft_board_setup(void *blob, bd_t *bd)
+void tqma6_bb_ft_board_setup(void *blob, struct bd_info *bd)
{
/* TBD */
}
return enable_fec_anatop_clock(fec_id, ENET_25MHZ);
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
uint32_t base = IMX_FEC_BASE;
struct mii_dev *bus = NULL;
return !gpio_get_value(USDHC2_CD_GPIO);
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
return 1; /* Always present */
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
uint32_t base = IMX_FEC_BASE;
struct mii_dev *bus = NULL;
return ret;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
SETUP_IOMUX_PADS(usdhc3_pads);
usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
ARRAY_SIZE(fec2_pads));
}
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int ret = 0;
return 1;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int i, ret;
return 0;
}
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
phys_addr_t base;
phys_size_t size;
#define __CYRUS_H
void fdt_fixup_board_enet(void *blob);
-void pci_of_setup(void *blob, bd_t *bd);
+void pci_of_setup(void *blob, struct bd_info *bd);
#endif
}
#endif
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
#ifdef CONFIG_FMAN_ENET
struct fsl_pq_mdio_info dtsec_mdio_info;
fsl_pcie_init_board(0);
}
-void pci_of_setup(void *blob, bd_t *bd)
+void pci_of_setup(void *blob, struct bd_info *bd)
{
FT_FSL_PCI_SETUP;
}
#endif
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
ft_cpu_setup(blob, bd);
#ifdef CONFIG_PCI
return 0;
}
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
int node, ret;
unsigned char mac_addr[6];
((defined(CONFIG_DRIVER_TI_CPSW) || \
defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)) && \
!defined(CONFIG_SPL_BUILD))
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int rv, n = 0;
uint8_t mac_addr[6];
return ret;
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
int ret;
u32 index = 0;
return 1; /* Assume boot SD always present */
}
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
{
static iomux_v3_cfg_t const usdhc2_pads[] = {
MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
}
#endif
-int board_eth_init(bd_t *bis)
+int board_eth_init(struct bd_info *bis)
{
int ret = 0;
}
#if defined(CONFIG_OF_BOARD_SETUP)
-void ft_board_pci_setup(void *blob, bd_t *bd)
+void ft_board_pci_setup(void *blob, struct bd_info *bd)
{
FT_FSL_PCI_SETUP;
}
DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_PCI)
-extern void ft_board_pci_setup(void *blob, bd_t *bd);
+extern void ft_board_pci_setup(void *blob, struct bd_info *bd);
#endif
/*
}
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
#ifdef CONFIG_PCI
ft_board_pci_setup(blob, bd);
#include <fdt_support.h>
#include <pca953x.h>
-extern void ft_board_pci_setup(void *blob, bd_t *bd);
+extern void ft_board_pci_setup(void *blob, struct bd_info *bd);
static void flash_cs_fixup(void)
{
}
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
#ifdef CONFIG_PCI
ft_board_pci_setup(blob, bd);
#include <fdt_support.h>
#include <pca953x.h>
-extern void ft_board_pci_setup(void *blob, bd_t *bd);
+extern void ft_board_pci_setup(void *blob, struct bd_info *bd);
static void flash_cs_fixup(void)
{
}
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
#ifdef CONFIG_PCI
ft_board_pci_setup(blob, bd);
#include <fdt_support.h>
#include <pca953x.h>
-extern void ft_board_pci_setup(void *blob, bd_t *bd);
+extern void ft_board_pci_setup(void *blob, struct bd_info *bd);
static void flash_cs_fixup(void)
{
}
#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
{
#ifdef CONFIG_PCI
ft_board_pci_setup(blob, bd);
printf("%-12s= %6s MHz\n", name, strmhz(buf, hz));
}
-static void print_bi_dram(const bd_t *bd)
+static void print_bi_dram(const struct bd_info *bd)
{
#ifdef CONFIG_NR_DRAM_BANKS
int i;
int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
- bd_t *bd = gd->bd;
+ struct bd_info *bd = gd->bd;
#ifdef DEBUG
bdinfo_print_num("bd address", (ulong)bd);
static int reserve_board(void)
{
if (!gd->bd) {
- gd->start_addr_sp = reserve_stack_aligned(sizeof(bd_t));
- gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
- memset(gd->bd, '\0', sizeof(bd_t));
+ gd->start_addr_sp = reserve_stack_aligned(sizeof(struct bd_info));
+ gd->bd = (struct bd_info *)map_sysmem(gd->start_addr_sp,
+ sizeof(struct bd_info));
+ memset(gd->bd, '\0', sizeof(struct bd_info));
debug("Reserving %zu Bytes for Board Info at: %08lx\n",
- sizeof(bd_t), gd->start_addr_sp);
+ sizeof(struct bd_info), gd->start_addr_sp);
}
return 0;
}
defined(CONFIG_SH)
static int setup_board_part1(void)
{
- bd_t *bd = gd->bd;
+ struct bd_info *bd = gd->bd;
/*
* Save local variables to board info struct
#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
static int setup_board_part2(void)
{
- bd_t *bd = gd->bd;
+ struct bd_info *bd = gd->bd;
bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
static int initr_flash(void)
{
ulong flash_size = 0;
- bd_t *bd = gd->bd;
+ struct bd_info *bd = gd->bd;
if (!is_flash_available())
return 0;
#ifdef CONFIG_CMD_NET
static int initr_ethaddr(void)
{
- bd_t *bd = gd->bd;
+ struct bd_info *bd = gd->bd;
/* kept around for legacy kernels only ... ignore the next section */
eth_env_get_enetaddr("ethaddr", bd->bi_enetaddr);
static int do_bootm_netbsd(int flag, int argc, char *const argv[],
bootm_headers_t *images)
{
- void (*loader)(bd_t *, image_header_t *, char *, char *);
+ void (*loader)(struct bd_info *, image_header_t *, char *, char *);
image_header_t *os_hdr, *hdr;
ulong kernel_data, kernel_len;
char *cmdline;
cmdline = "";
}
- loader = (void (*)(bd_t *, image_header_t *, char *, char *))images->ep;
+ loader = (void (*)(struct bd_info *, image_header_t *, char *, char *))images->ep;
printf("## Transferring control to NetBSD stage-2 loader (at address %08lx) ...\n",
(ulong)loader);
static int do_bootm_rtems(int flag, int argc, char *const argv[],
bootm_headers_t *images)
{
- void (*entry_point)(bd_t *);
+ void (*entry_point)(struct bd_info *);
if (flag != BOOTM_STATE_OS_GO)
return 0;
}
#endif
- entry_point = (void (*)(bd_t *))images->ep;
+ entry_point = (void (*)(struct bd_info *))images->ep;
printf("## Transferring control to RTEMS (at address %08lx) ...\n",
(ulong)entry_point);
* 0 - success
* -1 - failure
*/
-int boot_get_kbd(struct lmb *lmb, bd_t **kbd)
+int boot_get_kbd(struct lmb *lmb, struct bd_info **kbd)
{
- *kbd = (bd_t *)(ulong)lmb_alloc_base(lmb, sizeof(bd_t), 0xf,
- env_get_bootm_mapsize() + env_get_bootm_low());
+ *kbd = (struct bd_info *)(ulong)lmb_alloc_base(lmb,
+ sizeof(struct bd_info),
+ 0xf,
+ env_get_bootm_mapsize() + env_get_bootm_low());
if (*kbd == NULL)
return -1;
#endif
/* Define board data structure */
-static bd_t bdata __attribute__ ((section(".data")));
+static struct bd_info bdata __attribute__ ((section(".data")));
/*
* Board-specific Platform code can reimplement show_boot_progress () if needed
u32 i;
int ret;
phys_size_t hw_size;
- bd_t bd = {0};
+ struct bd_info bd = {0};
/* Ensure HMC clock is running */
if (poll_hmc_clock_status()) {
u32 i;
int ret;
phys_size_t hw_size;
- bd_t bd = {0};
+ struct bd_info bd = {0};
/* Enable access to DDR from CPU master */
clrbits_le32(CCU_REG_ADDR(CCU_CPU0_MPRT_ADBASE_DDRREG),
}
}
-void sdram_init_ecc_bits(bd_t *bd)
+void sdram_init_ecc_bits(struct bd_info *bd)
{
phys_size_t size, size_init;
phys_addr_t start_addr;
(unsigned int)get_timer(start));
}
-void sdram_size_check(bd_t *bd)
+void sdram_size_check(struct bd_info *bd)
{
phys_size_t total_ram_check = 0;
phys_size_t ram_check = 0;
int emif_reset(struct altera_sdram_platdata *plat);
int poll_hmc_clock_status(void);
void sdram_clear_mem(phys_addr_t addr, phys_size_t size);
-void sdram_init_ecc_bits(bd_t *bd);
-void sdram_size_check(bd_t *bd);
+void sdram_init_ecc_bits(struct bd_info *bd);
+void sdram_size_check(struct bd_info *bd);
phys_size_t sdram_calculate_size(struct altera_sdram_platdata *plat);
int sdram_mmr_init_full(struct udevice *dev);
/* Called from board_mmc_init during startup. Can be called multiple times
* depending on the number of slots available on board and controller
*/
-int davinci_mmc_init(bd_t *bis, struct davinci_mmc *host)
+int davinci_mmc_init(struct bd_info *bis, struct davinci_mmc *host)
{
host->cfg.name = "davinci";
host->cfg.ops = &dmmc_ops;
}
#endif
-void fdt_fixup_esdhc(void *blob, bd_t *bd)
+void fdt_fixup_esdhc(void *blob, struct bd_info *bd)
{
const char *compat = "fsl,esdhc";
.set_ios = esdhc_set_ios,
};
-int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
+int fsl_esdhc_initialize(struct bd_info *bis, struct fsl_esdhc_cfg *cfg)
{
struct fsl_esdhc_plat *plat;
struct fsl_esdhc_priv *priv;
return 0;
}
-int fsl_esdhc_mmc_init(bd_t *bis)
+int fsl_esdhc_mmc_init(struct bd_info *bis)
{
struct fsl_esdhc_cfg *cfg;
return 0;
};
-int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
+int fsl_esdhc_initialize(struct bd_info *bis, struct fsl_esdhc_cfg *cfg)
{
struct fsl_esdhc_plat *plat;
struct fsl_esdhc_priv *priv;
return 0;
}
-int fsl_esdhc_mmc_init(bd_t *bis)
+int fsl_esdhc_mmc_init(struct bd_info *bis)
{
struct fsl_esdhc_cfg *cfg;
return 0;
}
-void fdt_fixup_esdhc(void *blob, bd_t *bd)
+void fdt_fixup_esdhc(void *blob, struct bd_info *bd)
{
const char *compat = "fsl,esdhc";
}
/* CPU-specific MMC initializations */
-__weak int cpu_mmc_init(bd_t *bis)
+__weak int cpu_mmc_init(struct bd_info *bis)
{
return -1;
}
/* board-specific MMC initializations. */
-__weak int board_mmc_init(bd_t *bis)
+__weak int board_mmc_init(struct bd_info *bis)
{
return -1;
}
}
#if CONFIG_IS_ENABLED(DM_MMC)
-static int mmc_probe(bd_t *bis)
+static int mmc_probe(struct bd_info *bis)
{
int ret, i;
struct uclass *uc;
return 0;
}
#else
-static int mmc_probe(bd_t *bis)
+static int mmc_probe(struct bd_info *bis)
{
if (board_mmc_init(bis) < 0)
cpu_mmc_init(bis);
}
#endif
-int mmc_initialize(bd_t *bis)
+int mmc_initialize(struct bd_info *bis)
{
static int initialized = 0;
int ret;
.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT,
};
-int mvebu_mmc_init(bd_t *bis)
+int mvebu_mmc_init(struct bd_info *bis)
{
struct mmc *mmc;
.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT,
};
-static int mxcmci_initialize(bd_t *bis)
+static int mxcmci_initialize(struct bd_info *bis)
{
host->base = (struct mxcmci_regs *)CONFIG_MXC_MCI_REGS_BASE;
return 0;
}
-int mxc_mmc_init(bd_t *bis)
+int mxc_mmc_init(struct bd_info *bis)
{
return mxcmci_initialize(bis);
}
.init = mxsmmc_init,
};
-int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int), int (*cd)(int))
+int mxsmmc_initialize(struct bd_info *bis, int id, int (*wp)(int),
+ int (*cd)(int))
{
struct mmc *mmc = NULL;
struct mxsmmc_priv *priv = NULL;
darmdfec->p_rxdesc_curr = darmdfec->p_rxdesc;
}
-static int armdfec_init(struct eth_device *dev, bd_t *bd)
+static int armdfec_init(struct eth_device *dev, struct bd_info *bd)
{
struct armdfec_device *darmdfec = to_darmdfec(dev);
struct armdfec_reg *regs = darmdfec->regs;
return 0;
}
-static int at91emac_init(struct eth_device *netdev, bd_t *bd)
+static int at91emac_init(struct eth_device *netdev, struct bd_info *bd)
{
int i;
u32 value;
return 0;
}
-int at91emac_register(bd_t *bis, unsigned long iobase)
+int at91emac_register(struct bd_info *bis, unsigned long iobase)
{
emac_device *emac;
emac_device *emacfix;
OUTW (dev, WAKEMOD, CMD);
}
-static int ax88180_init (struct eth_device *dev, bd_t * bd)
+static int ax88180_init (struct eth_device *dev, struct bd_info * bd)
{
struct ax88180_private *priv = (struct ax88180_private *)dev->priv;
unsigned short tmp_regval;
}
/* Exported SubProgram Bodies */
-int ax88180_initialize (bd_t * bis)
+int ax88180_initialize (struct bd_info * bis)
{
struct eth_device *dev;
struct ax88180_private *priv;
return eth->set_mac_addr(dev->enetaddr);
}
-static int bcm_sf2_eth_open(struct eth_device *dev, bd_t *bt)
+static int bcm_sf2_eth_open(struct eth_device *dev, struct bd_info *bt)
{
struct eth_info *eth = (struct eth_info *)(dev->priv);
struct eth_dma *dma = &(eth->dma);
eth->disable_mac();
}
-int bcm_sf2_eth_register(bd_t *bis, u8 dev_num)
+int bcm_sf2_eth_register(struct bd_info *bis, u8 dev_num)
{
struct eth_device *dev;
struct eth_info *eth;
writel(macaddr[0], ®s->macaddr[0].lo);
}
-static int xgmac_init(struct eth_device *dev, bd_t * bis)
+static int xgmac_init(struct eth_device *dev, struct bd_info * bis)
{
struct xgmac_regs *regs = (struct xgmac_regs *)dev->iobase;
struct calxeda_eth_dev *priv = dev->priv;
get_reg_init_bus(dev, PP_ChipID);
}
-static int cs8900_init(struct eth_device *dev, bd_t * bd)
+static int cs8900_init(struct eth_device *dev, struct bd_info * bd)
{
uchar *enetaddr = dev->enetaddr;
u16 id;
return 1;
}
-static void update_srom(struct eth_device *dev, bd_t *bis)
+static void update_srom(struct eth_device *dev, struct bd_info *bis)
{
static unsigned short eeprom[0x40] = {
0x140b, 0x6610, 0x0000, 0x0000, /* 00 */
}
#endif /* UPDATE_SROM */
-static void send_setup_frame(struct eth_device *dev, bd_t *bis)
+static void send_setup_frame(struct eth_device *dev, struct bd_info *bis)
{
char setup_frame[SETUP_FRAME_LEN];
char *pa = &setup_frame[0];
return length;
}
-static int dc21x4x_init(struct eth_device *dev, bd_t *bis)
+static int dc21x4x_init(struct eth_device *dev, struct bd_info *bis)
{
int i;
int devbusfn = (int)dev->priv;
pci_write_config_byte(devbusfn, PCI_CFDA_PSM, SLEEP);
}
-static void read_hw_addr(struct eth_device *dev, bd_t *bis)
+static void read_hw_addr(struct eth_device *dev, struct bd_info *bis)
{
u_short tmp, *p = (u_short *)(&dev->enetaddr[0]);
int i, j = 0;
{ }
};
-int dc21x4x_initialize(bd_t *bis)
+int dc21x4x_initialize(struct bd_info *bis)
{
struct eth_device *dev;
unsigned short status;
}
#ifndef CONFIG_DM_ETH
-static int dw_eth_init(struct eth_device *dev, bd_t *bis)
+static int dw_eth_init(struct eth_device *dev, struct bd_info *bis)
{
int ret;
/* Initialize dm9000 board
*/
-static int dm9000_init(struct eth_device *dev, bd_t *bd)
+static int dm9000_init(struct eth_device *dev, struct bd_info *bd)
{
int i, oft, lnk;
u8 io_mode;
DM9000_DBG("dm9000_phy_write(reg:0x%x, value:0x%x)\n", reg, value);
}
-int dm9000_initialize(bd_t *bis)
+int dm9000_initialize(struct bd_info *bis)
{
struct eth_device *dev = &(dm9000_info.netdev);
}
}
-static int dnet_init(struct eth_device *netdev, bd_t *bd)
+static int dnet_init(struct eth_device *netdev, struct bd_info *bd)
{
struct dnet_device *dnet = to_dnet(netdev);
u32 config;
INIT - set up ethernet interface(s)
***************************************************************************/
static int
-e1000_init(struct eth_device *nic, bd_t *bis)
+e1000_init(struct eth_device *nic, struct bd_info *bis)
{
struct e1000_hw *hw = nic->priv;
You should omit the last argument struct pci_device * for a non-PCI NIC
***************************************************************************/
int
-e1000_initialize(bd_t * bis)
+e1000_initialize(struct bd_info * bis)
{
unsigned int i;
pci_dev_t devno;
}
#ifndef CONFIG_DM_ETH
-static int eepro100_init(struct eth_device *dev, bd_t *bis)
+static int eepro100_init(struct eth_device *dev, struct bd_info *bis)
{
struct eepro100_priv *priv =
container_of(dev, struct eepro100_priv, dev);
return ret;
}
-int eepro100_initialize(bd_t *bis)
+int eepro100_initialize(struct bd_info *bis)
{
struct eepro100_priv *priv;
struct eth_device *dev;
}
/* Eth device open */
-static int ep93xx_eth_open(struct eth_device *dev, bd_t *bd)
+static int ep93xx_eth_open(struct eth_device *dev, struct bd_info *bd)
{
struct ep93xx_priv *priv = GET_PRIV(dev);
struct mac_regs *mac = GET_REGS(dev);
}
#if defined(CONFIG_MII)
-int ep93xx_miiphy_initialize(bd_t * const bd)
+int ep93xx_miiphy_initialize(struct bd_info * const bd)
{
int retval;
struct mii_dev *mdiodev = mdio_alloc();
#else
-static int ethoc_init(struct eth_device *dev, bd_t *bd)
+static int ethoc_init(struct eth_device *dev, struct bd_info *bd)
{
struct ethoc *priv = (struct ethoc *)dev->priv;
#ifndef CONFIG_DM_ETH
#ifdef CONFIG_PHYLIB
-int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr,
+int fec_probe(struct bd_info *bd, int dev_id, uint32_t base_addr,
struct mii_dev *bus, struct phy_device *phydev)
#else
static int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr,
return ret;
}
-int fecmxc_initialize_multi(bd_t *bd, int dev_id, int phy_id, uint32_t addr)
+int fecmxc_initialize_multi(struct bd_info *bd, int dev_id, int phy_id,
+ uint32_t addr)
{
uint32_t base_mii;
struct mii_dev *bus = NULL;
}
#ifdef CONFIG_FEC_MXC_PHYADDR
-int fecmxc_initialize(bd_t *bd)
+int fecmxc_initialize(struct bd_info *bd)
{
return fecmxc_initialize_multi(bd, -1, CONFIG_FEC_MXC_PHYADDR,
IMX_FEC_BASE);
int rbd_index; /* next receive BD to read */
struct fec_bd *tbd_base; /* TBD ring */
int tbd_index; /* next transmit BD to write */
- bd_t *bd;
+ struct bd_info *bd;
uint8_t *tdb_ptr;
int dev_id;
struct mii_dev *bus;
}
#ifndef CONFIG_DM_ETH
-static int fm_eth_open(struct eth_device *dev, bd_t *bd)
+static int fm_eth_open(struct eth_device *dev, struct bd_info *bd)
#else
static int fm_eth_open(struct udevice *dev)
#endif
#endif
};
-int fm_standard_init(bd_t *bis)
+int fm_standard_init(struct bd_info *bis)
{
int i;
struct ccsr_fman *reg;
}
#ifndef CONFIG_DM_ETH
-int fm_memac_mdio_init(bd_t *bis, struct memac_mdio_info *info)
+int fm_memac_mdio_init(struct bd_info *bis, struct memac_mdio_info *info)
{
struct mii_dev *bus = mdio_alloc();
return 0;
}
-int fm_tgec_mdio_init(bd_t *bis, struct tgec_mdio_info *info)
+int fm_tgec_mdio_init(struct bd_info *bis, struct tgec_mdio_info *info)
{
struct mii_dev *bus = mdio_alloc();
return dram_block_size;
}
-int fsl_mc_ldpaa_init(bd_t *bis)
+int fsl_mc_ldpaa_init(struct bd_info *bis)
{
int i;
return err;
}
-int fsl_mc_ldpaa_exit(bd_t *bd)
+int fsl_mc_ldpaa_exit(struct bd_info *bd)
{
int err = 0;
bool is_dpl_apply_status = false;
static void set_fec_duplex_speed(volatile fecdma_t *fecp, int dup_spd)
{
- bd_t *bd = gd->bd;
+ struct bd_info *bd = gd->bd;
if ((dup_spd >> 16) == FULL) {
/* Set maximum frame length */
}
#ifndef CONFIG_DM_MDIO
-int fsl_pq_mdio_init(bd_t *bis, struct fsl_pq_mdio_info *info)
+int fsl_pq_mdio_init(struct bd_info *bis, struct fsl_pq_mdio_info *info)
{
struct mii_dev *bus = mdio_alloc();
return _ftmac100_halt(priv);
}
-static int ftmac100_init(struct eth_device *dev, bd_t *bd)
+static int ftmac100_init(struct eth_device *dev, struct bd_info *bd)
{
struct ftmac100_data *priv = dev->priv;
return _ftmac100_init(priv , dev->enetaddr);
return _ftmac100_send(priv , packet , length);
}
-int ftmac100_initialize (bd_t *bd)
+int ftmac100_initialize (struct bd_info *bd)
{
struct eth_device *dev;
struct ftmac100_data *priv;
return 0;
}
-static int ftmac110_probe(struct eth_device *dev, bd_t *bis)
+static int ftmac110_probe(struct eth_device *dev, struct bd_info *bis)
{
debug("ftmac110: probe\n");
#endif /* #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) */
-int ftmac110_initialize(bd_t *bis)
+int ftmac110_initialize(struct bd_info *bis)
{
int i, card_nr = 0;
struct eth_device *dev;
}
#ifndef CONFIG_DM_ETH
-static int ks8851_mll_init(struct eth_device *dev, bd_t *bd)
+static int ks8851_mll_init(struct eth_device *dev, struct bd_info *bd)
{
struct ks_net *ks = container_of(dev, struct ks_net, dev);
. print a warning and set the environment and other globals with the default.
. If an EEPROM is present it really should be consulted.
*/
-static int smc_get_ethaddr(bd_t *bd, struct eth_device *dev);
+static int smc_get_ethaddr(struct bd_info *bd, struct eth_device *dev);
static int get_rom_mac(struct eth_device *dev, unsigned char *v_rom_mac);
/* ------------------------------------------------------------
* Set up everything, reset the card, etc ..
*
*/
-static int smc_open(bd_t *bd, struct eth_device *dev)
+static int smc_open(struct bd_info *bd, struct eth_device *dev)
{
int i, err; /* used to set hw ethernet address */
}
#endif /* SMC_DEBUG > 2 */
-static int lan91c96_init(struct eth_device *dev, bd_t *bd)
+static int lan91c96_init(struct eth_device *dev, struct bd_info *bd)
{
return smc_open(bd, dev);
}
* found, the environment takes precedence.
*/
-static int smc_get_ethaddr(bd_t *bd, struct eth_device *dev)
+static int smc_get_ethaddr(struct bd_info *bd, struct eth_device *dev)
{
uchar v_mac[6];
}
#endif
-int lpc32xx_eth_initialize(bd_t *bis)
+int lpc32xx_eth_initialize(struct bd_info *bis)
{
struct eth_device *dev = &lpc32xx_eth.dev;
struct lpc32xx_eth_registers *regs = lpc32xx_eth.regs;
}
}
-static int macb_init(struct eth_device *netdev, bd_t *bd)
+static int macb_init(struct eth_device *netdev, struct bd_info *bd)
{
struct macb_device *macb = to_macb(netdev);
static void set_fec_duplex_speed(volatile fec_t *fecp, int dup_spd)
{
- bd_t *bd = gd->bd;
+ struct bd_info *bd = gd->bd;
if ((dup_spd >> 16) == FULL) {
/* Set maximum frame length */
static int fec_send(struct eth_device *dev, void *packet, int length);
static int fec_recv(struct eth_device *dev);
-static int fec_init(struct eth_device *dev, bd_t *bd);
+static int fec_init(struct eth_device *dev, struct bd_info *bd);
static void fec_halt(struct eth_device *dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
static void __mii_init(void);
#endif
-int fec_initialize(bd_t *bis)
+int fec_initialize(struct bd_info *bis)
{
struct eth_device *dev;
struct ether_fcc_info_s *efis;
static void fec_pin_init(int fecidx)
{
- bd_t *bd = gd->bd;
+ struct bd_info *bd = gd->bd;
immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
/*
return 0;
}
-static int fec_init(struct eth_device *dev, bd_t *bd)
+static int fec_init(struct eth_device *dev, struct bd_info *bd)
{
struct ether_fcc_info_s *efis = dev->priv;
immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
}
#ifndef CONFIG_DM_ETH
-int mvgbe_initialize(bd_t *bis)
+int mvgbe_initialize(struct bd_info *bis)
{
struct mvgbe_device *dmvgbe;
struct eth_device *dev;
#endif
static int read_eeprom(struct eth_device *dev, long addr, int location);
static int mdio_read(struct eth_device *dev, int phy_id, int location);
-static int natsemi_init(struct eth_device *dev, bd_t * bis);
+static int natsemi_init(struct eth_device *dev, struct bd_info * bis);
static void natsemi_reset(struct eth_device *dev);
static void natsemi_init_rxfilter(struct eth_device *dev);
static void natsemi_init_txd(struct eth_device *dev);
*/
int
-natsemi_initialize(bd_t * bis)
+natsemi_initialize(struct bd_info * bis)
{
pci_dev_t devno;
int card_number = 0;
*/
static int
-natsemi_init(struct eth_device *dev, bd_t * bis)
+natsemi_init(struct eth_device *dev, struct bd_info * bis)
{
natsemi_reset(dev);
return 0;
}
-static int ne2k_init(struct eth_device *dev, bd_t *bd)
+static int ne2k_init(struct eth_device *dev, struct bd_info *bd)
{
dp83902a_start(dev->enetaddr);
initialized = 1;
static int mdio_read(struct eth_device *dev, int phy_id, int addr);
static void mdio_write(struct eth_device *dev, int phy_id, int addr, int value);
static void mdio_sync(struct eth_device *dev, u32 offset);
-static int ns8382x_init(struct eth_device *dev, bd_t * bis);
+static int ns8382x_init(struct eth_device *dev, struct bd_info * bis);
static void ns8382x_reset(struct eth_device *dev);
static void ns8382x_init_rxfilter(struct eth_device *dev);
static void ns8382x_init_txd(struct eth_device *dev);
*/
int
-ns8382x_initialize(bd_t * bis)
+ns8382x_initialize(struct bd_info * bis)
{
pci_dev_t devno;
int card_number = 0;
*/
static int
-ns8382x_init(struct eth_device *dev, bd_t * bis)
+ns8382x_init(struct eth_device *dev, struct bd_info * bis)
{
u32 config;
}
#ifndef CONFIG_DM_ETH
-static int pcnet_init(struct eth_device *dev, bd_t *bis)
+static int pcnet_init(struct eth_device *dev, struct bd_info *bis)
{
struct pcnet_priv *lp = dev->priv;
pcnet_halt_common(lp);
}
-int pcnet_initialize(bd_t *bis)
+int pcnet_initialize(struct bd_info *bis)
{
pci_dev_t devbusfn;
struct eth_device *dev;
return 0;
}
-static int rtl8139_init(struct eth_device *dev, bd_t *bis)
+static int rtl8139_init(struct eth_device *dev, struct bd_info *bis)
{
struct rtl8139_priv *priv = container_of(dev, struct rtl8139_priv, dev);
return ret;
}
-int rtl8139_initialize(bd_t *bis)
+int rtl8139_initialize(struct bd_info *bis)
{
struct rtl8139_priv *priv;
struct eth_device *dev;
/**************************************************************************
RESET - Finish setting up the ethernet interface
***************************************************************************/
-static int rtl_reset(struct eth_device *dev, bd_t *bis)
+static int rtl_reset(struct eth_device *dev, struct bd_info *bis)
{
rtl8169_common_start((pci_dev_t)(unsigned long)dev->priv,
dev->enetaddr, dev->iobase);
}
#ifndef CONFIG_DM_ETH
-int rtl8169_initialize(bd_t *bis)
+int rtl8169_initialize(struct bd_info *bis)
{
pci_dev_t devno;
int card_number = 0;
return sh_eth_recv_common(eth);
}
-static int sh_eth_init_legacy(struct eth_device *dev, bd_t *bd)
+static int sh_eth_init_legacy(struct eth_device *dev, struct bd_info *bd)
{
struct sh_eth_dev *eth = dev->priv;
int ret;
sh_eth_stop(eth);
}
-int sh_eth_initialize(bd_t *bd)
+int sh_eth_initialize(struct bd_info *bd)
{
int ret = 0;
struct sh_eth_dev *eth = NULL;
* Set up everything, reset the card, etc ..
*
*/
-static int smc_init(struct eth_device *dev, bd_t *bd)
+static int smc_init(struct eth_device *dev, struct bd_info *bd)
{
swap_to(ETHERNET);
}
#ifndef CONFIG_DM_ETH
-static int cpsw_init(struct eth_device *dev, bd_t *bis)
+static int cpsw_init(struct eth_device *dev, struct bd_info *bis)
{
struct cpsw_priv *priv = dev->priv;
* This allows U-Boot to find the first active controller.
*/
#ifndef CONFIG_DM_ETH
-static int tsec_init(struct eth_device *dev, bd_t *bd)
+static int tsec_init(struct eth_device *dev, struct bd_info *bd)
#else
static int tsec_init(struct udevice *dev)
#endif
* Initialize device structure. Returns success if PHY
* initialization succeeded (i.e. if it recognizes the PHY)
*/
-static int tsec_initialize(bd_t *bis, struct tsec_info_struct *tsec_info)
+static int tsec_initialize(struct bd_info *bis,
+ struct tsec_info_struct *tsec_info)
{
struct tsec_private *priv;
struct eth_device *dev;
*
* Returns the number of TSEC devices that were initialized
*/
-int tsec_eth_init(bd_t *bis, struct tsec_info_struct *tsecs, int num)
+int tsec_eth_init(struct bd_info *bis, struct tsec_info_struct *tsecs,
+ int num)
{
int i;
int count = 0;
return count;
}
-int tsec_standard_init(bd_t *bis)
+int tsec_standard_init(struct bd_info *bis)
{
struct fsl_pq_mdio_info info;
static void uli526x_set_phyxcer(struct uli526x_board_info *);
-static int uli526x_init_one(struct eth_device *, bd_t *);
+static int uli526x_init_one(struct eth_device *, struct bd_info *);
static void uli526x_disable(struct eth_device *);
static void set_mac_addr(struct eth_device *);
* Search ULI526X board, register it
*/
-int uli526x_initialize(bd_t *bis)
+int uli526x_initialize(struct bd_info *bis)
{
pci_dev_t devno;
int card_number = 0;
return card_number;
}
-static int uli526x_init_one(struct eth_device *dev, bd_t *bis)
+static int uli526x_init_one(struct eth_device *dev, struct bd_info *bis)
{
struct uli526x_board_info *db = dev->priv;
__LINE__);
}
-void vsc9953_init(bd_t *bis)
+void vsc9953_init(struct bd_info *bis)
{
u32 i;
u32 hdx_cfg = 0;
/* Add a region for our local memory */
#ifdef CONFIG_NR_DRAM_BANKS
- bd_t *bd = gd->bd;
+ struct bd_info *bd = gd->bd;
if (!bd)
return;
}
/* Fixup Kernel DT for PCIe */
-void pci_of_setup(void *blob, bd_t *bd)
+void pci_of_setup(void *blob, struct bd_info *bd)
{
struct fsl_pcie *pcie;
}
#else
-void pci_of_setup(void *blob, bd_t *bd)
+void pci_of_setup(void *blob, struct bd_info *bd)
{
}
#endif
}
/* Fixup Kernel DT for PCIe */
-void ft_pci_setup_ls(void *blob, bd_t *bd)
+void ft_pci_setup_ls(void *blob, struct bd_info *bd)
{
struct ls_pcie *pcie;
}
#else /* !CONFIG_OF_BOARD_SETUP */
-void ft_pci_setup_ls(void *blob, bd_t *bd)
+void ft_pci_setup_ls(void *blob, struct bd_info *bd)
{
}
#endif
#include <asm/arch/soc.h>
#include "pcie_layerscape_fixup_common.h"
-void ft_pci_setup(void *blob, bd_t *bd)
+void ft_pci_setup(void *blob, struct bd_info *bd)
{
#if defined(CONFIG_PCIE_LAYERSCAPE_GEN4)
uint svr;
#include <common.h>
-void ft_pci_setup_ls(void *blob, bd_t *bd);
+void ft_pci_setup_ls(void *blob, struct bd_info *bd);
#ifdef CONFIG_PCIE_LAYERSCAPE_GEN4
-void ft_pci_setup_ls_gen4(void *blob, bd_t *bd);
+void ft_pci_setup_ls_gen4(void *blob, struct bd_info *bd);
#endif /* CONFIG_PCIE_LAYERSCAPE_GEN4 */
int pcie_next_streamid(int currentid, int id);
int pcie_board_fix_fdt(void *fdt);
}
/* Fixup Kernel DT for PCIe */
-void ft_pci_setup_ls_gen4(void *blob, bd_t *bd)
+void ft_pci_setup_ls_gen4(void *blob, struct bd_info *bd)
{
struct ls_pcie_g4 *pcie;
}
#else /* !CONFIG_OF_BOARD_SETUP */
-void ft_pci_setup_ls_gen4(void *blob, bd_t *bd)
+void ft_pci_setup_ls_gen4(void *blob, struct bd_info *bd)
{
}
#endif
return 0;
}
-static int uec_init(struct eth_device* dev, bd_t *bd)
+static int uec_init(struct eth_device* dev, struct bd_info *bd)
{
uec_private_t *uec;
int err, i;
return 1;
}
-int uec_initialize(bd_t *bis, uec_info_t *uec_info)
+int uec_initialize(struct bd_info *bis, uec_info_t *uec_info)
{
struct eth_device *dev;
int i;
return 1;
}
-int uec_eth_init(bd_t *bis, uec_info_t *uecs, int num)
+int uec_eth_init(struct bd_info *bis, uec_info_t *uecs, int num)
{
int i;
return 0;
}
-int uec_standard_init(bd_t *bis)
+int uec_standard_init(struct bd_info *bis)
{
return uec_eth_init(bis, uec_info, ARRAY_SIZE(uec_info));
}
int oldlink;
} uec_private_t;
-int uec_initialize(bd_t *bis, uec_info_t *uec_info);
-int uec_eth_init(bd_t *bis, uec_info_t *uecs, int num);
-int uec_standard_init(bd_t *bis);
+int uec_initialize(struct bd_info *bis, uec_info_t *uec_info);
+int uec_eth_init(struct bd_info *bis, uec_info_t *uecs, int num);
+int uec_standard_init(struct bd_info *bis);
#endif /* __UEC_H__ */
return 0;
}
-void fsl_fdt_fixup_dr_usb(void *blob, bd_t *bd)
+void fsl_fdt_fixup_dr_usb(void *blob, struct bd_info *bd)
{
static const char * const modes[] = { "host", "peripheral", "otg" };
static const char * const phys[] = { "ulpi", "utmi", "utmi_dual" };
/*
* Asix callbacks
*/
-static int asix_init(struct eth_device *eth, bd_t *bd)
+static int asix_init(struct eth_device *eth, struct bd_info *bd)
{
struct ueth_data *dev = (struct ueth_data *)eth->priv;
/*
* Asix callbacks
*/
-static int asix_init(struct eth_device *eth, bd_t *bd)
+static int asix_init(struct eth_device *eth, struct bd_info *bd)
{
struct ueth_data *dev = (struct ueth_data *)eth->priv;
struct asix_private *dev_priv = (struct asix_private *)dev->dev_priv;
* ensures that the link is up and subsequent send() and recv() calls can
* exchange ethernet frames
*/
-static int mcs7830_init(struct eth_device *eth, bd_t *bd)
+static int mcs7830_init(struct eth_device *eth, struct bd_info *bd)
{
struct ueth_data *dev = eth->priv;
}
#ifndef CONFIG_DM_ETH
-static int r8152_init(struct eth_device *eth, bd_t *bd)
+static int r8152_init(struct eth_device *eth, struct bd_info *bd)
{
struct ueth_data *dev = (struct ueth_data *)eth->priv;
struct r8152 *tp = (struct r8152 *)dev->dev_priv;
/*
* Smsc95xx callbacks
*/
-static int smsc95xx_init(struct eth_device *eth, bd_t *bd)
+static int smsc95xx_init(struct eth_device *eth, struct bd_info *bd)
{
struct ueth_data *dev = (struct ueth_data *)eth->priv;
struct usb_device *udev = dev->pusb_dev;
}
#ifndef CONFIG_DM_ETH
-static int usb_eth_init(struct eth_device *netdev, bd_t *bd)
+static int usb_eth_init(struct eth_device *netdev, struct bd_info *bd)
{
struct ether_priv *priv = (struct ether_priv *)netdev->priv;
_usb_eth_halt(priv);
}
-int usb_eth_initialize(bd_t *bi)
+int usb_eth_initialize(struct bd_info *bi)
{
struct eth_device *netdev = &l_priv->netdev;
static int cfb_fb_is_in_dram(void)
{
- bd_t *bd = gd->bd;
+ struct bd_info *bd = gd->bd;
#if defined(CONFIG_ARM) || defined(CONFIG_NDS32) || \
defined(CONFIG_SANDBOX) || defined(CONFIG_X86)
ulong start, end;
*/
int arch_fixup_fdt(void *blob);
-void ft_cpu_setup(void *blob, bd_t *bd);
+void ft_cpu_setup(void *blob, struct bd_info *bd);
-void ft_pci_setup(void *blob, bd_t *bd);
+void ft_pci_setup(void *blob, struct bd_info *bd);
u32 fdt_getprop_u32_default_node(const void *fdt, int off, int cell,
const char *prop, const u32 dflt);
int fdt_fixup_display(void *blob, const char *path, const char *display);
#if defined(CONFIG_USB_EHCI_FSL) || defined(CONFIG_USB_XHCI_FSL)
-void fsl_fdt_fixup_dr_usb(void *blob, bd_t *bd);
+void fsl_fdt_fixup_dr_usb(void *blob, struct bd_info *bd);
#else
-static inline void fsl_fdt_fixup_dr_usb(void *blob, bd_t *bd) {}
+static inline void fsl_fdt_fixup_dr_usb(void *blob, struct bd_info *bd) {}
#endif /* defined(CONFIG_USB_EHCI_FSL) || defined(CONFIG_USB_XHCI_FSL) */
#if defined(CONFIG_SYS_FSL_SEC_COMPAT)
* @param bd_t Pointer to board data
* @return 0 if ok, or -FDT_ERR_... on error
*/
-int ft_board_setup(void *blob, bd_t *bd);
+int ft_board_setup(void *blob, struct bd_info *bd);
/*
* The keystone2 SOC requires all 32 bit aliased addresses to be converted
* are added or modified by the image_setup_libfdt(). The ft_board_setup_ex()
* called at the end of the image_setup_libfdt() is to do that convertion.
*/
-void ft_board_setup_ex(void *blob, bd_t *bd);
-void ft_cpu_setup(void *blob, bd_t *bd);
-void ft_pci_setup(void *blob, bd_t *bd);
+void ft_board_setup_ex(void *blob, struct bd_info *bd);
+void ft_cpu_setup(void *blob, struct bd_info *bd);
+void ft_pci_setup(void *blob, struct bd_info *bd);
/**
* Add system-specific data to the FDT before booting the OS.
* @param bd_t Pointer to board data
* @return 0 if ok, or -FDT_ERR_... on error
*/
-int ft_system_setup(void *blob, bd_t *bd);
+int ft_system_setup(void *blob, struct bd_info *bd);
void set_working_fdt_addr(ulong addr);
char *name;
};
-int fm_tgec_mdio_init(bd_t *bis, struct tgec_mdio_info *info);
-int fm_memac_mdio_init(bd_t *bis, struct memac_mdio_info *info);
+int fm_tgec_mdio_init(struct bd_info *bis, struct tgec_mdio_info *info);
+int fm_memac_mdio_init(struct bd_info *bis, struct memac_mdio_info *info);
-int fm_standard_init(bd_t *bis);
+int fm_standard_init(struct bd_info *bis);
void fman_enet_init(void);
void fdt_fixup_fman_ethernet(void *fdt);
phy_interface_t fm_info_get_enet_if(enum fm_port port);
#endif
u64 mc_get_dram_addr(void);
unsigned long mc_get_dram_block_size(void);
-int fsl_mc_ldpaa_init(bd_t *bis);
-int fsl_mc_ldpaa_exit(bd_t *bd);
+int fsl_mc_ldpaa_init(struct bd_info *bis);
+int fsl_mc_ldpaa_exit(struct bd_info *bd);
void mc_env_boot(void);
#endif
#endif
#ifdef CONFIG_FSL_ESDHC
-int fsl_esdhc_mmc_init(bd_t *bis);
-int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg);
-void fdt_fixup_esdhc(void *blob, bd_t *bd);
+int fsl_esdhc_mmc_init(struct bd_info *bis);
+int fsl_esdhc_initialize(struct bd_info *bis, struct fsl_esdhc_cfg *cfg);
+void fdt_fixup_esdhc(void *blob, struct bd_info *bd);
#ifdef MMC_SUPPORTS_TUNING
static inline int fsl_esdhc_execute_tuning(struct udevice *dev,
uint32_t opcode) {return 0; }
#endif
#else
-static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; }
-static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {}
+static inline int fsl_esdhc_mmc_init(struct bd_info *bis) { return -ENOSYS; }
+static inline void fdt_fixup_esdhc(void *blob, struct bd_info *bd) {}
#endif /* CONFIG_FSL_ESDHC */
void __noreturn mmc_boot(void);
void mmc_spl_load_image(uint32_t offs, unsigned int size, void *vdst);
#endif
#ifdef CONFIG_FSL_ESDHC_IMX
-int fsl_esdhc_mmc_init(bd_t *bis);
-int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg);
-void fdt_fixup_esdhc(void *blob, bd_t *bd);
+int fsl_esdhc_mmc_init(struct bd_info *bis);
+int fsl_esdhc_initialize(struct bd_info *bis, struct fsl_esdhc_cfg *cfg);
+void fdt_fixup_esdhc(void *blob, struct bd_info *bd);
#else
-static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; }
-static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {}
+static inline int fsl_esdhc_mmc_init(struct bd_info *bis) { return -ENOSYS; }
+static inline void fdt_fixup_esdhc(void *blob, struct bd_info *bd) {}
#endif /* CONFIG_FSL_ESDHC_IMX */
void __noreturn mmc_boot(void);
void mmc_spl_load_image(uint32_t offs, unsigned int size, void *vdst);
struct tsec_mii_mng __iomem *regs;
char *name;
};
-int fsl_pq_mdio_init(bd_t *bis, struct fsl_pq_mdio_info *info);
+int fsl_pq_mdio_init(struct bd_info *bis, struct fsl_pq_mdio_info *info);
#endif /* __FSL_PHY_H__ */
ulong initrd_end;
ulong cmdline_start;
ulong cmdline_end;
- bd_t *kbd;
+ struct bd_info *kbd;
#endif
int verify; /* env_get("verify")[0] != 'n' */
ulong *initrd_start, ulong *initrd_end);
int boot_get_cmdline(struct lmb *lmb, ulong *cmd_start, ulong *cmd_end);
#ifdef CONFIG_SYS_BOOT_GET_KBD
-int boot_get_kbd(struct lmb *lmb, bd_t **kbd);
+int boot_get_kbd(struct lmb *lmb, struct bd_info **kbd);
#endif /* CONFIG_SYS_BOOT_GET_KBD */
#endif /* !USE_HOSTCC */
};
extern void lmb_init(struct lmb *lmb);
-extern void lmb_init_and_reserve(struct lmb *lmb, bd_t *bd, void *fdt_blob);
+extern void lmb_init_and_reserve(struct lmb *lmb, struct bd_info *bd,
+ void *fdt_blob);
extern void lmb_init_and_reserve_range(struct lmb *lmb, phys_addr_t base,
phys_size_t size, void *fdt_blob);
extern long lmb_add(struct lmb *lmb, phys_addr_t base, phys_size_t size);
* Functions prototypes
*/
-int mvebu_mmc_init(bd_t *bis);
+int mvebu_mmc_init(struct bd_info *bis);
#endif /* __MVEBU_MMC_H__ */
struct mii_dev *pfe_mdio_init(struct pfe_mdio_info *mdio_info);
void pfe_set_mdio(int dev_id, struct mii_dev *bus);
void pfe_set_phy_address_mode(int dev_id, int phy_id, int phy_mode);
-int gemac_initialize(bd_t *bis, int dev_id, char *devname);
+int gemac_initialize(struct bd_info *bis, int dev_id, char *devname);
int pfe_init(struct pfe_ddr_address *pfe_addr);
int pfe_eth_board_init(struct udevice *dev);
* -1: failure
*/
-int board_eth_init(bd_t *bis);
+int board_eth_init(struct bd_info *bis);
int board_interface_eth_init(struct udevice *dev,
phy_interface_t interface_type);
-int cpu_eth_init(bd_t *bis);
+int cpu_eth_init(struct bd_info *bis);
/* Driver initialization prototypes */
-int at91emac_register(bd_t *bis, unsigned long iobase);
-int ax88180_initialize(bd_t *bis);
-int bcm_sf2_eth_register(bd_t *bis, u8 dev_num);
-int bfin_EMAC_initialize(bd_t *bis);
+int at91emac_register(struct bd_info *bis, unsigned long iobase);
+int ax88180_initialize(struct bd_info *bis);
+int bcm_sf2_eth_register(struct bd_info *bis, u8 dev_num);
+int bfin_EMAC_initialize(struct bd_info *bis);
int calxedaxgmac_initialize(u32 id, ulong base_addr);
int cs8900_initialize(u8 dev_num, int base_addr);
-int dc21x4x_initialize(bd_t *bis);
+int dc21x4x_initialize(struct bd_info *bis);
int designware_initialize(ulong base_addr, u32 interface);
-int dm9000_initialize(bd_t *bis);
+int dm9000_initialize(struct bd_info *bis);
int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr);
-int e1000_initialize(bd_t *bis);
-int eepro100_initialize(bd_t *bis);
+int e1000_initialize(struct bd_info *bis);
+int eepro100_initialize(struct bd_info *bis);
int ep93xx_eth_initialize(u8 dev_num, int base_addr);
-int eth_3com_initialize (bd_t * bis);
+int eth_3com_initialize (struct bd_info * bis);
int ethoc_initialize(u8 dev_num, int base_addr);
-int fec_initialize (bd_t *bis);
-int fecmxc_initialize(bd_t *bis);
-int fecmxc_initialize_multi(bd_t *bis, int dev_id, int phy_id, uint32_t addr);
-int ftmac100_initialize(bd_t *bits);
-int ftmac110_initialize(bd_t *bits);
-void gt6426x_eth_initialize(bd_t *bis);
+int fec_initialize (struct bd_info *bis);
+int fecmxc_initialize(struct bd_info *bis);
+int fecmxc_initialize_multi(struct bd_info *bis, int dev_id, int phy_id,
+ uint32_t addr);
+int ftmac100_initialize(struct bd_info *bits);
+int ftmac110_initialize(struct bd_info *bits);
+void gt6426x_eth_initialize(struct bd_info *bis);
int ks8851_mll_initialize(u8 dev_num, int base_addr);
int lan91c96_initialize(u8 dev_num, int base_addr);
-int lpc32xx_eth_initialize(bd_t *bis);
+int lpc32xx_eth_initialize(struct bd_info *bis);
int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
-int mcdmafec_initialize(bd_t *bis);
-int mcffec_initialize(bd_t *bis);
-int mvgbe_initialize(bd_t *bis);
-int mvneta_initialize(bd_t *bis, int base_addr, int devnum, int phy_addr);
-int natsemi_initialize(bd_t *bis);
+int mcdmafec_initialize(struct bd_info *bis);
+int mcffec_initialize(struct bd_info *bis);
+int mvgbe_initialize(struct bd_info *bis);
+int mvneta_initialize(struct bd_info *bis, int base_addr, int devnum,
+ int phy_addr);
+int natsemi_initialize(struct bd_info *bis);
int ne2k_register(void);
-int npe_initialize(bd_t *bis);
-int ns8382x_initialize(bd_t *bis);
-int pcnet_initialize(bd_t *bis);
-int ppc_4xx_eth_initialize (bd_t *bis);
-int rtl8139_initialize(bd_t *bis);
-int rtl8169_initialize(bd_t *bis);
-int scc_initialize(bd_t *bis);
-int sh_eth_initialize(bd_t *bis);
-int skge_initialize(bd_t *bis);
+int npe_initialize(struct bd_info *bis);
+int ns8382x_initialize(struct bd_info *bis);
+int pcnet_initialize(struct bd_info *bis);
+int ppc_4xx_eth_initialize (struct bd_info *bis);
+int rtl8139_initialize(struct bd_info *bis);
+int rtl8169_initialize(struct bd_info *bis);
+int scc_initialize(struct bd_info *bis);
+int sh_eth_initialize(struct bd_info *bis);
+int skge_initialize(struct bd_info *bis);
int smc91111_initialize(u8 dev_num, int base_addr);
int smc911x_initialize(u8 dev_num, int base_addr);
-int uec_standard_init(bd_t *bis);
-int uli526x_initialize(bd_t *bis);
+int uec_standard_init(struct bd_info *bis);
+int uli526x_initialize(struct bd_info *bis);
int armada100_fec_register(unsigned long base_addr);
/* Boards with PCI network controllers can call this from their board_eth_init()
* function to initialize whatever's on board.
* Return value is total # of devices found */
-static inline int pci_eth_init(bd_t *bis)
+static inline int pci_eth_init(struct bd_info *bis)
{
int num = 0;
#ifdef CONFIG_PHYLIB
struct phy_device;
-int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr,
+int fec_probe(struct bd_info *bd, int dev_id, uint32_t base_addr,
struct mii_dev *bus, struct phy_device *phydev);
#else
/*
};
#ifndef CONFIG_DM_ETH
-int tsec_standard_init(bd_t *bis);
-int tsec_eth_init(bd_t *bis, struct tsec_info_struct *tsec_info, int num);
+int tsec_standard_init(struct bd_info *bis);
+int tsec_eth_init(struct bd_info *bis, struct tsec_info_struct *tsec_info,
+ int num);
#endif
#endif /* __TSEC_H */
struct vsc9953_port_info port[VSC9953_MAX_PORTS];
};
-void vsc9953_init(bd_t *bis);
+void vsc9953_init(struct bd_info *bis);
void vsc9953_port_info_set_mdio(int port_no, struct mii_dev *bus);
void vsc9953_port_info_set_phy_address(int port_no, int address);
#ifdef CONFIG_NR_DRAM_BANKS
int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
- phys_addr_t *basep, phys_size_t *sizep, bd_t *bd)
+ phys_addr_t *basep, phys_size_t *sizep,
+ struct bd_info *bd)
{
int addr_cells, size_cells;
const u32 *cell, *end;
}
/* Initialize the struct, add memory and call arch/board reserve functions */
-void lmb_init_and_reserve(struct lmb *lmb, bd_t *bd, void *fdt_blob)
+void lmb_init_and_reserve(struct lmb *lmb, struct bd_info *bd, void *fdt_blob)
{
#ifdef CONFIG_NR_DRAM_BANKS
int i;
* CPU and board-specific Ethernet initializations. Aliased function
* signals caller to move on
*/
-static int __def_eth_init(bd_t *bis)
+static int __def_eth_init(struct bd_info *bis)
{
return -1;
}
-int cpu_eth_init(bd_t *bis) __attribute__((weak, alias("__def_eth_init")));
-int board_eth_init(bd_t *bis) __attribute__((weak, alias("__def_eth_init")));
+int cpu_eth_init(struct bd_info *bis) __attribute__((weak, alias("__def_eth_init")));
+int board_eth_init(struct bd_info *bis) __attribute__((weak, alias("__def_eth_init")));
#ifdef CONFIG_API
static struct {
__attribute__((weak))
int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
{
- bd_t *bd = gd->bd;
+ struct bd_info *bd = gd->bd;
*vstart = CONFIG_SYS_SDRAM_BASE;
*size = (gd->ram_size >= 256 << 20 ?
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