radeonsi: don't use PKT3_SET_SH_REG_INDEX on gfx9 and older

Fixes: ccaaf8fe04c ("amd: massively simplify how info->spi_cu_en is applied")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8464
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21726>

diff --git a/src/gallium/drivers/radeonsi/si_pm4.c b/src/gallium/drivers/radeonsi/si_pm4.c
index 8e2b36e..2c11513 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pm4.c
+++ b/src/gallium/drivers/radeonsi/si_pm4.c
@@ -110,8 +110,10 @@ void si_pm4_set_reg_idx3(struct si_screen *sscreen, struct si_pm4_state *state,
 {
    SI_CHECK_SHADOWED_REGS(reg, 1);
 
-   si_pm4_set_reg_custom(state, reg - SI_SH_REG_OFFSET, val, PKT3_SET_SH_REG_INDEX,
-                         sscreen->info.gfx_level >= GFX10 ? 3 : 0);
+   if (sscreen->info.gfx_level >= GFX10)
+      si_pm4_set_reg_custom(state, reg - SI_SH_REG_OFFSET, val, PKT3_SET_SH_REG_INDEX, 3);
+   else
+      si_pm4_set_reg_custom(state, reg - SI_SH_REG_OFFSET, val, PKT3_SET_SH_REG, 0);
 }
 
 void si_pm4_set_reg_va(struct si_pm4_state *state, unsigned reg, uint32_t val)