arm64: dts: mediatek: mt2712e: swap last 2 clocks to match binding
authorFrank Wunderlich <frank-w@public-files.de>
Tue, 25 Oct 2022 13:29:50 +0000 (15:29 +0200)
committerMatthias Brugger <matthias.bgg@gmail.com>
Tue, 8 Nov 2022 18:33:16 +0000 (19:33 +0100)
First 3 clocks for mt2712 need to be "source", "hclk", "source_cg"
so swap last 2 of mmc0 to match the binding.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221025132953.81286-4-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
arch/arm64/boot/dts/mediatek/mt2712e.dtsi

index e6d7453..9dc0794 100644 (file)
                interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_LOW>;
                clocks = <&pericfg CLK_PERI_MSDC30_0>,
                         <&pericfg CLK_PERI_MSDC50_0_HCLK_EN>,
-                        <&pericfg CLK_PERI_MSDC30_0_QTR_EN>,
-                        <&pericfg CLK_PERI_MSDC50_0_EN>;
-               clock-names = "source", "hclk", "bus_clk", "source_cg";
+                        <&pericfg CLK_PERI_MSDC50_0_EN>,
+                        <&pericfg CLK_PERI_MSDC30_0_QTR_EN>;
+               clock-names = "source", "hclk", "source_cg", "bus_clk";
                status = "disabled";
        };