tm2: add tm2_pxp dts at amlogic for ptm bringup [1/1]
authorshanghai engineers <pan.yang@amlogic.com>
Fri, 22 Mar 2019 08:58:34 +0000 (04:58 -0400)
committerJianxiong Pan <jianxiong.pan@amlogic.com>
Thu, 11 Apr 2019 02:40:39 +0000 (10:40 +0800)
PD#SWPL-6157

Problem:
Current branch need tm2_pxp dts at amlogic system

Solution:
Create tm2_pxp dts at tm2 kernel branch, and modified scripts

Verify:
on ptm board4

Change-Id: I83204db07462729861a59d322fa99e4370c09dea
Signed-off-by: pan yang <pan.yang@amlogic.com>
arch/arm/boot/dts/amlogic/mesontm2.dtsi [new file with mode: 0644]
arch/arm/boot/dts/amlogic/tm2_pxp.dts [new file with mode: 0644]
arch/arm64/boot/dts/amlogic/mesontm2.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/amlogic/tm2_pxp.dts [new file with mode: 0644]
scripts/amlogic/mk_32dtb.sh
scripts/amlogic/mk_dtb_gx.sh

diff --git a/arch/arm/boot/dts/amlogic/mesontm2.dtsi b/arch/arm/boot/dts/amlogic/mesontm2.dtsi
new file mode 100644 (file)
index 0000000..7204b77
--- /dev/null
@@ -0,0 +1,2145 @@
+/*
+ * arch/arm/boot/dts/amlogic/mesontl1.dtsi
+ *
+ * Copyright (C) 2018 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/gpio/meson-tl1-gpio.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/meson_rc.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/pwm/meson.h>
+#include <dt-bindings/clock/amlogic,tl1-clkc.h>
+#include <dt-bindings/clock/amlogic,tl1-audio-clk.h>
+#include "mesong12a-bifrost.dtsi"
+#include <dt-bindings/iio/adc/amlogic-saradc.h>
+/ {
+       interrupt-parent = <&gic>;
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       cpus:cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               #cooling-cells = <2>;/* min followed by max */
+               CPU0:cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <0x0>;
+                       //timer=<&timer_a>;
+                       enable-method = "psci";
+                       clocks = <&clkc CLKID_CPU_CLK>,
+                               <&clkc CLKID_CPU_FCLK_P>,
+                               <&clkc CLKID_SYS_PLL>;
+                       clock-names = "core_clk",
+                               "low_freq_clk_parent",
+                               "high_freq_clk_parent";
+                       operating-points-v2 = <&cpu_opp_table0>;
+                       cpu-supply = <&vddcpu0>;
+                       //cpu-idle-states = <&SYSTEM_SLEEP_0>;
+                       voltage-tolerance = <0>;
+                       clock-latency = <50000>;
+               };
+
+               CPU1:cpu@1 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <0x1>;
+                       //timer=<&timer_b>;
+                       enable-method = "psci";
+                       clocks = <&clkc CLKID_CPU_CLK>,
+                               <&clkc CLKID_CPU_FCLK_P>,
+                               <&clkc CLKID_SYS_PLL>;
+                       clock-names = "core_clk",
+                               "low_freq_clk_parent",
+                               "high_freq_clk_parent";
+                       operating-points-v2 = <&cpu_opp_table0>;
+                       cpu-supply = <&vddcpu0>;
+                       //cpu-idle-states = <&SYSTEM_SLEEP_0>;
+                       voltage-tolerance = <0>;
+                       clock-latency = <50000>;
+               };
+
+               CPU2:cpu@2 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <0x2>;
+                       //timer=<&timer_c>;
+                       enable-method = "psci";
+                       clocks = <&clkc CLKID_CPU_CLK>,
+                               <&clkc CLKID_CPU_FCLK_P>,
+                               <&clkc CLKID_SYS_PLL>;
+                       clock-names = "core_clk",
+                               "low_freq_clk_parent",
+                               "high_freq_clk_parent";
+                       operating-points-v2 = <&cpu_opp_table0>;
+                       cpu-supply = <&vddcpu0>;
+                       //cpu-idle-states = <&SYSTEM_SLEEP_0>;
+                       voltage-tolerance = <0>;
+                       clock-latency = <50000>;
+               };
+
+               CPU3:cpu@3 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <0x3>;
+                       //timer=<&timer_d>;
+                       enable-method = "psci";
+                       clocks = <&clkc CLKID_CPU_CLK>,
+                               <&clkc CLKID_CPU_FCLK_P>,
+                               <&clkc CLKID_SYS_PLL>;
+                       clock-names = "core_clk",
+                               "low_freq_clk_parent",
+                               "high_freq_clk_parent";
+                       operating-points-v2 = <&cpu_opp_table0>;
+                       cpu-supply = <&vddcpu0>;
+                       //cpu-idle-states = <&SYSTEM_SLEEP_0>;
+                       voltage-tolerance = <0>;
+                       clock-latency = <50000>;
+               };
+       };
+
+       timer {
+               compatible = "arm,armv7-timer";
+               interrupts = <GIC_PPI 13 0xff01>,
+                            <GIC_PPI 14 0xff01>,
+                            <GIC_PPI 11 0xff01>,
+                            <GIC_PPI 10 0xff01>;
+       };
+
+       timer_bc {
+               compatible = "arm, meson-bc-timer";
+               reg = <0xffd0f190  0x4  0xffd0f194  0x4>;
+               timer_name = "Meson TimerF";
+               clockevent-rating =<300>;
+               clockevent-shift =<20>;
+               clockevent-features =<0x23>;
+               interrupts = <0 60 1>;
+               bit_enable =<16>;
+               bit_mode =<12>;
+               bit_resolution =<0>;
+       };
+
+       arm_pmu {
+               compatible = "arm,cortex-a15-pmu";
+               /* clusterb-enabled; */
+               interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+               reg = <0xff634680 0x4>;
+               cpumasks = <0xf>;
+               /* default 10ms */
+               relax-timer-ns = <10000000>;
+               /* default 10000us */
+               max-wait-cnt = <10000>;
+       };
+
+       gic: interrupt-controller@2c001000 {
+               compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+               #interrupt-cells = <3>;
+               #address-cells = <0>;
+               interrupt-controller;
+               reg = <0xffc01000 0x1000>,
+                     <0xffc02000 0x0100>;
+               interrupts = <GIC_PPI 9 0xf04>;
+       };
+
+       psci {
+               compatible = "arm,psci-0.2";
+               method = "smc";
+       };
+
+       scpi_clocks {
+               compatible = "arm, scpi-clks";
+
+               scpi_dvfs: scpi_clocks@0 {
+                       compatible = "arm, scpi-clk-indexed";
+                       #clock-cells = <1>;
+                       clock-indices = <0>;
+                       clock-output-names = "vcpu";
+               };
+       };
+
+       secmon {
+               compatible = "amlogic, secmon";
+               memory-region = <&secmon_reserved>;
+               in_base_func = <0x82000020>;
+               out_base_func = <0x82000021>;
+               reserve_mem_size = <0x00300000>;
+       };
+
+       securitykey {
+               compatible = "amlogic, securitykey";
+               status = "okay";
+               storage_query = <0x82000060>;
+               storage_read = <0x82000061>;
+               storage_write = <0x82000062>;
+               storage_tell = <0x82000063>;
+               storage_verify = <0x82000064>;
+               storage_status = <0x82000065>;
+               storage_list = <0x82000067>;
+               storage_remove = <0x82000068>;
+               storage_in_func = <0x82000023>;
+               storage_out_func = <0x82000024>;
+               storage_block_func = <0x82000025>;
+               storage_size_func = <0x82000027>;
+               storage_set_enctype = <0x8200006A>;
+               storage_get_enctype = <0x8200006B>;
+               storage_version = <0x8200006C>;
+       };
+
+       mailbox: mhu@ff63c400 {
+               status = "disabled";
+               compatible = "amlogic, meson_mhu";
+               reg = <0xff63c400 0x4c>,   /* MHU registers */
+                     <0xfffd7000 0x800>;   /* Payload area */
+               interrupts = <0 209 1>,   /* low priority interrupt */
+                            <0 210 1>;   /* high priority interrupt */
+               #mbox-cells = <1>;
+               mbox-names = "cpu_to_scp_low", "cpu_to_scp_high";
+               mboxes = <&mailbox 0 &mailbox 1>;
+       };
+
+       cpu_iomap {
+               compatible = "amlogic, iomap";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               io_cbus_base {
+                       reg = <0xffd00000 0x101000>;
+               };
+               io_apb_base {
+                       reg = <0xffe01000 0x19f000>;
+               };
+               io_aobus_base {
+                       reg = <0xff800000 0x100000>;
+               };
+               io_vapb_base {
+                       reg = <0xff900000 0x200000>;
+               };
+               io_hiu_base {
+                       reg = <0xff63c000 0x2000>;
+               };
+       };
+
+       xtal: xtal-clk {
+               compatible = "fixed-clock";
+               clock-frequency = <24000000>;
+               clock-output-names = "xtal";
+               #clock-cells = <0>;
+       };
+
+       meson_suspend: pm {
+               compatible = "amlogic, pm";
+               /*gxbaby-suspend;*/
+               status = "okay";
+               reg = <0xff8000a8 0x4>,
+                       <0xff80023c 0x4>;
+       };
+
+       cpuinfo {
+               compatible = "amlogic, cpuinfo";
+               status = "okay";
+               cpuinfo_cmd = <0x82000044>;
+       };
+
+       rtc{
+               compatible = "amlogic, aml_vrtc";
+               alarm_reg_addr = <0xff8000a8>;
+               timer_e_addr = <0xffd0f188>;
+               init_date = "2018/01/01";
+               status = "disabled";
+       };
+
+       reboot {
+               compatible = "amlogic,reboot";
+               sys_reset = <0x84000009>;
+               sys_poweroff = <0x84000008>;
+       };
+
+       ram-dump {
+               compatible = "amlogic, ram_dump";
+               status = "okay";
+               reg = <0xFF6345E0 4>;
+               reg-names = "PREG_STICKY_REG8";
+       };
+
+       securitykey {
+               compatible = "amlogic, securitykey";
+               status = "disabled";
+               storage_query = <0x82000060>;
+               storage_read = <0x82000061>;
+               storage_write = <0x82000062>;
+               storage_tell = <0x82000063>;
+               storage_verify = <0x82000064>;
+               storage_status = <0x82000065>;
+               storage_list = <0x82000067>;
+               storage_remove = <0x82000068>;
+               storage_in_func = <0x82000023>;
+               storage_out_func = <0x82000024>;
+               storage_block_func = <0x82000025>;
+               storage_size_func = <0x82000027>;
+               storage_set_enctype = <0x8200006A>;
+               storage_get_enctype = <0x8200006B>;
+               storage_version = <0x8200006C>;
+       };
+
+       vpu {
+               compatible = "amlogic, vpu-tl1";
+               status = "okay";
+               clocks = <&clkc CLKID_VAPB_MUX>,
+                       <&clkc CLKID_VPU_INTR>,
+                       <&clkc CLKID_VPU_P0_COMP>,
+                       <&clkc CLKID_VPU_P1_COMP>,
+                       <&clkc CLKID_VPU_MUX>;
+               clock-names = "vapb_clk",
+                       "vpu_intr_gate",
+                       "vpu_clk0",
+                       "vpu_clk1",
+                       "vpu_clk";
+               clk_level = <7>;
+               /* 0: 100.0M    1: 166.7M    2: 200.0M    3: 250.0M */
+               /* 4: 333.3M    5: 400.0M    6: 500.0M    7: 666.7M */
+       };
+
+       ethmac: ethernet@ff3f0000 {
+               compatible = "amlogic, g12a-eth-dwmac","snps,dwmac";
+               reg = <0xff3f0000 0x10000
+                       0xff634540 0x8
+                       0xff64c000 0xa0>;
+               reg-names = "eth_base", "eth_cfg", "eth_pll";
+               interrupts = <0 8 1>;
+               interrupt-names = "macirq";
+               status = "disabled";
+               clocks = <&clkc CLKID_ETH_CORE>;
+               clock-names = "ethclk81";
+               pll_val = <0x9c0040a 0x927e0000 0xac5f49e5>;
+               analog_val = <0x20200000 0x0000c000 0x00000023>;
+       };
+
+       pinctrl_aobus: pinctrl@ff800014 {
+               compatible = "amlogic,meson-tl1-aobus-pinctrl";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               gpio_ao: ao-bank@ff800014 {
+                       reg = <0xff800014 0x8>,
+                                 <0xff800024 0x14>,
+                                 <0xff80001c 0x8>;
+                       reg-names = "mux", "gpio", "drive-strength";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               aoceca_mux:aoceca_mux {
+                       mux {
+                               groups = "cec_ao_a";
+                               function = "cec_ao";
+                       };
+               };
+
+               aocecb_mux:aocecb_mux {
+                       mux {
+                               groups = "cec_ao_b";
+                               function = "cec_ao";
+                       };
+               };
+       };
+
+       pinctrl_periphs: pinctrl@ff6346c0 {
+               compatible = "amlogic,meson-tl1-periphs-pinctrl";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               gpio: banks@ff6346c0 {
+                       reg = <0xff6346c0 0x40>,
+                                 <0xff6344e8 0x18>,
+                                 <0xff634520 0x18>,
+                                 <0xff634440 0x4c>,
+                                 <0xff634740 0x1c>;
+                       reg-names = "mux",
+                               "pull",
+                               "pull-enable",
+                               "gpio",
+                               "drive-strength";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+
+               hdmirx_a_mux:hdmirx_a_mux {
+                       mux {
+                               groups = "hdmirx_a_hpd", "hdmirx_a_det",
+                                       "hdmirx_a_sda", "hdmirx_a_sck";
+                               function = "hdmirx_a";
+                       };
+               };
+
+               hdmirx_b_mux:hdmirx_b_mux {
+                       mux {
+                               groups = "hdmirx_b_hpd", "hdmirx_b_det",
+                                       "hdmirx_b_sda", "hdmirx_b_sck";
+                               function = "hdmirx_b";
+                       };
+               };
+
+               hdmirx_c_mux:hdmirx_c_mux {
+                       mux {
+                               groups = "hdmirx_c_hpd", "hdmirx_c_det",
+                                       "hdmirx_c_sda", "hdmirx_c_sck";
+                               function = "hdmirx_c";
+                       };
+               };
+
+       };
+
+       dwc3: dwc3@ff500000 {
+               compatible = "synopsys, dwc3";
+               status = "disabled";
+               reg = <0xff500000 0x100000>;
+               interrupts = <0 30 4>;
+               usb-phy = <&usb2_phy_v2>, <&usb3_phy_v2>;
+               cpu-type = "gxl";
+               clock-src = "usb3.0";
+               clocks = <&clkc CLKID_USB_GENERAL>;
+               clock-names = "dwc_general";
+       };
+
+       usb2_phy_v2: usb2phy@ffe09000 {
+               compatible = "amlogic, amlogic-new-usb2-v2";
+               status = "disabled";
+               reg = <0xffe09000 0x80
+                               0xffd01008 0x100
+                               0xff636000 0x2000
+                               0xff63a000 0x2000
+                               0xff658000 0x2000>;
+               pll-setting-1 = <0x09400414>;
+               pll-setting-2 = <0x927E0000>;
+               pll-setting-3 = <0xac5f69e5>;
+               pll-setting-4 = <0xfe18>;
+               pll-setting-5 = <0x8000fff>;
+               pll-setting-6 = <0x78000>;
+               pll-setting-7 = <0xe0004>;
+               pll-setting-8 = <0xe000c>;
+               version = <1>;
+       };
+
+       usb3_phy_v2: usb3phy@ffe09080 {
+               compatible = "amlogic, amlogic-new-usb3-v2";
+               status = "disabled";
+               reg = <0xffe09080 0x20>;
+               phy-reg = <0xff646000>;
+               phy-reg-size = <0x2000>;
+               usb2-phy-reg = <0xffe09000>;
+               usb2-phy-reg-size = <0x80>;
+               interrupts = <0 16 4>;
+       };
+
+       dwc2_a: dwc2_a@ff400000 {
+               compatible = "amlogic, dwc2";
+               status = "disabled";
+               device_name = "dwc2_a";
+               reg = <0xff400000 0x40000>;
+               interrupts = <0 31 4>;
+               pl-periph-id = <0>; /** lm name */
+               clock-src = "usb0"; /** clock src */
+               port-id = <0>;  /** ref to mach/usb.h */
+               port-type = <2>;        /** 0: otg, 1: host, 2: slave */
+               port-speed = <0>; /** 0: default, high, 1: full */
+               port-config = <0>; /** 0: default */
+               /*0:default,1:single,2:incr,3:incr4,4:incr8,5:incr16,6:disable*/
+               port-dma = <0>;
+               port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
+               usb-fifo = <728>;
+               cpu-type = "v2";
+               phy-reg = <0xffe09000>;
+               phy-reg-size = <0xa0>;
+               /** phy-interface: 0x0: amlogic-v1 phy, 0x1: synopsys phy **/
+               /**                0x2: amlogic-v2 phy                    **/
+               phy-interface = <0x2>;
+               clocks = <&clkc CLKID_USB_GENERAL
+                                       &clkc CLKID_USB1_TO_DDR>;
+               clock-names = "usb_general",
+                                       "usb1";
+       };
+
+       wdt: watchdog@0xffd0f0d0 {
+               compatible = "amlogic, meson-wdt";
+               status = "disabled";
+               default_timeout=<10>;
+               reset_watchdog_method=<1>; /* 0:sysfs,1:kernel */
+               reset_watchdog_time=<2>;
+               shutdown_timeout=<10>;
+               firmware_timeout=<6>;
+               suspend_timeout=<6>;
+               reg = <0xffd0f0d0 0x10>;
+               clock-names = "xtal";
+               clocks = <&xtal>;
+       };
+
+       jtag {
+               compatible = "amlogic, jtag";
+               status = "okay";
+               select = "disable"; /* disable/apao */
+               pinctrl-names="jtag_apao_pins";
+               pinctrl-0=<&jtag_apao_pins>;
+       };
+
+       saradc:saradc {
+               compatible = "amlogic,meson-g12a-saradc";
+               status = "disabled";
+               #io-channel-cells = <1>;
+               clocks = <&xtal>, <&clkc CLKID_SARADC_GATE>;
+               clock-names = "xtal", "saradc_clk";
+               interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>;
+               reg = <0xff809000 0x48>;
+       };
+
+       vddcpu0: pwmao_d-regulator {
+               compatible = "pwm-regulator";
+               pwms = <&pwm_AO_cd MESON_PWM_1 1500 0>;
+               regulator-name = "vddcpu0";
+               regulator-min-microvolt = <689000>;
+               regulator-max-microvolt = <1049000>;
+               regulator-always-on;
+               max-duty-cycle = <1500>;
+               /* Voltage Duty-Cycle */
+               voltage-table = <1049000 0>,
+                               <1039000 3>,
+                               <1029000 6>,
+                               <1019000 8>,
+                               <1009000 11>,
+                               <999000 14>,
+                               <989000 17>,
+                               <979000 20>,
+                               <969000 23>,
+                               <959000 26>,
+                               <949000 29>,
+                               <939000 31>,
+                               <929000 34>,
+                               <919000 37>,
+                               <909000 40>,
+                               <899000 43>,
+                               <889000 45>,
+                               <879000 48>,
+                               <869000 51>,
+                               <859000 54>,
+                               <849000 56>,
+                               <839000 59>,
+                               <829000 62>,
+                               <819000 65>,
+                               <809000 68>,
+                               <799000 70>,
+                               <789000 73>,
+                               <779000 76>,
+                               <769000 79>,
+                               <759000 81>,
+                               <749000 84>,
+                               <739000 87>,
+                               <729000 89>,
+                               <719000 92>,
+                               <709000 95>,
+                               <699000 98>,
+                               <689000 100>;
+                               status = "disabled";
+       };
+
+       aml_dma {
+               compatible = "amlogic,aml_txlx_dma";
+               reg = <0xff63e000 0x48>;
+               interrupts = <0 180 1>;
+
+               aml_aes {
+                       compatible = "amlogic,aes_g12a_dma";
+                       dev_name = "aml_aes_dma";
+                       status = "okay";
+               };
+
+               aml_sha {
+                       compatible = "amlogic,sha_dma";
+                       dev_name = "aml_sha_dma";
+                       status = "okay";
+               };
+       };
+
+       rng {
+               compatible = "amlogic,meson-rng";
+               status = "okay";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               reg = <0xff630218 0x4>;
+               quality = /bits/ 16 <1000>;
+       };
+
+       soc {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               hiubus: hiubus@ff63c000 {
+                       compatible = "simple-bus";
+                       reg = <0xff63c000 0x2000>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x0 0xff63c000 0x2000>;
+
+                       clkc: clock-controller@0 {
+                               compatible = "amlogic,tl1-clkc";
+                               #clock-cells = <1>;
+                               reg = <0x0 0x3fc>;
+                       };
+               };/* end of hiubus*/
+
+               audiobus: audiobus@0xff600000 {
+                       compatible = "amlogic, audio-controller", "simple-bus";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       reg = <0xff600000 0x10000>;
+                       ranges = <0x0 0xff600000 0x10000>;
+
+                       clkaudio:audio_clocks {
+                               compatible = "amlogic, tl1-audio-clocks";
+                               #clock-cells = <1>;
+                               reg = <0x0 0xb0>;
+                       };
+
+                       ddr_manager {
+                               compatible = "amlogic, tl1-audio-ddr-manager";
+                               interrupts = <
+                                       GIC_SPI 148 IRQ_TYPE_EDGE_RISING
+                                       GIC_SPI 149 IRQ_TYPE_EDGE_RISING
+                                       GIC_SPI 150 IRQ_TYPE_EDGE_RISING
+                                       GIC_SPI 48 IRQ_TYPE_EDGE_RISING
+                                       GIC_SPI 152 IRQ_TYPE_EDGE_RISING
+                                       GIC_SPI 153 IRQ_TYPE_EDGE_RISING
+                                       GIC_SPI 154 IRQ_TYPE_EDGE_RISING
+                                       GIC_SPI 49 IRQ_TYPE_EDGE_RISING
+                               >;
+                               interrupt-names =
+                                       "toddr_a", "toddr_b", "toddr_c",
+                                       "toddr_d",
+                                       "frddr_a", "frddr_b", "frddr_c",
+                                       "frddr_d";
+                       };
+               };/* end of audiobus*/
+
+               /* Sound iomap */
+               aml_snd_iomap {
+                       compatible = "amlogic, snd-iomap";
+                       status = "okay";
+                       #address-cells=<1>;
+                       #size-cells=<1>;
+                       ranges;
+                       pdm_bus {
+                               reg = <0xFF601000 0x400>;
+                       };
+                       audiobus_base {
+                               reg = <0xFF600000 0x1000>;
+                       };
+                       audiolocker_base {
+                               reg = <0xFF601400 0x400>;
+                       };
+                       eqdrc_base {
+                               reg = <0xFF602000 0x2000>;
+                       };
+                       reset_base {
+                               reg = <0xFFD01000 0x1000>;
+                       };
+                       vad_base {
+                               reg = <0xFF601800 0x800>;
+                       };
+               };
+
+               cbus: cbus@ffd00000 {
+                       compatible = "simple-bus";
+                       reg = <0xffd00000 0x27000>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x0 0xffd00000 0x27000>;
+
+                       clk-measure@18004 {
+                               compatible = "amlogic,tl1-measure";
+                               reg = <0x18004 0x4 0x1800c 0x4>;
+                       };
+
+                       i2c0: i2c@1f000 {
+                               compatible = "amlogic,meson-i2c";
+                               status = "disabled";
+                               reg = <0x1f000 0x20>;
+                               interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
+                                       <GIC_SPI 91 IRQ_TYPE_EDGE_RISING>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               clocks = <&clkc CLKID_I2C>;
+                               clock-frequency = <100000>;
+                       };
+
+                       i2c1: i2c@1e000 {
+                               compatible = "amlogic,meson-i2c";
+                               status = "disabled";
+                               reg = <0x1e000 0x20>;
+                               interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>,
+                                       <GIC_SPI 92 IRQ_TYPE_EDGE_RISING>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               clocks = <&clkc CLKID_I2C>;
+                               clock-frequency = <100000>;
+                       };
+
+                       i2c2: i2c@1d000 {
+                               compatible = "amlogic,meson-i2c";
+                               status = "disabled";
+                               reg = <0x1d000 0x20>;
+                               interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>,
+                                       <GIC_SPI 94 IRQ_TYPE_EDGE_RISING>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               clocks = <&clkc CLKID_I2C>;
+                               clock-frequency = <100000>;
+                       };
+
+                       i2c3: i2c@1c000 {
+                               compatible = "amlogic,meson-i2c";
+                               status = "disabled";
+                               reg = <0x1c000 0x20>;
+                               interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
+                                       <GIC_SPI 95 IRQ_TYPE_EDGE_RISING>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               clocks = <&clkc CLKID_I2C>;
+                               clock-frequency = <100000>;
+                       };
+
+                       gpio_intc: interrupt-controller@f080 {
+                               compatible = "amlogic,meson-gpio-intc",
+                                               "amlogic,meson-tl1-gpio-intc";
+                               reg = <0xf080 0x10>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               amlogic,channel-interrupts =
+                                       <64 65 66 67 68 69 70 71>;
+                               status = "okay";
+                       };
+
+                       pwm_ab: pwm@1b000 {
+                               compatible = "amlogic,tl1-ee-pwm";
+                               reg = <0x1b000 0x20>;
+                               #pwm-cells = <3>;
+                               clocks = <&xtal>,
+                                               <&xtal>,
+                                               <&xtal>,
+                                               <&xtal>;
+                               clock-names = "clkin0",
+                                               "clkin1",
+                                               "clkin2",
+                                               "clkin3";
+                               /* default xtal 24m  clkin0-clkin2 and
+                                * clkin1-clkin3 should be set the same
+                                */
+                               status = "disabled";
+                       };
+
+                       pwm_cd: pwm@1a000 {
+                               compatible = "amlogic,tl1-ee-pwm";
+                               reg = <0x1a000 0x20>;
+                               #pwm-cells = <3>;
+                               clocks = <&xtal>,
+                                               <&xtal>,
+                                               <&xtal>,
+                                               <&xtal>;
+                               clock-names = "clkin0",
+                                               "clkin1",
+                                               "clkin2",
+                                               "clkin3";
+                               status = "disabled";
+                       };
+
+                       pwm_ef: pwm@19000 {
+                               compatible = "amlogic,tl1-ee-pwm";
+                               reg = <0x19000 0x20>;
+                               #pwm-cells = <3>;
+                               clocks = <&xtal>,
+                                               <&xtal>,
+                                               <&xtal>,
+                                               <&xtal>;
+                               clock-names = "clkin0",
+                                               "clkin1",
+                                               "clkin2",
+                                               "clkin3";
+                               status = "disabled";
+                       };
+
+                       spicc0: spi@13000 {
+                               compatible = "amlogic,meson-tl1-spicc",
+                                            "amlogic,meson-g12a-spicc";
+                               reg = <0x13000 0x44>;
+                               interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clkc CLKID_SPICC0>,
+                                        <&clkc CLKID_SPICC0_COMP>;
+                               clock-names = "core", "comp";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
+                       spicc1: spi@15000 {
+                               compatible = "amlogic,meson-tl1-spicc",
+                                            "amlogic,meson-g12a-spicc";
+                               reg = <0x15000 0x44>;
+                               interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clkc CLKID_SPICC1>,
+                                        <&clkc CLKID_SPICC1_COMP>;
+                               clock-names = "core", "comp";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+               };
+
+               aobus: aobus@ff800000 {
+                       compatible = "simple-bus";
+                       reg = <0xff800000 0xb000>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x0 0xff800000 0xb000>;
+
+                       cpu_version {
+                               reg = <0x220 0x4>;
+                       };
+
+                       aoclkc: clock-controller@0 {
+                               compatible = "amlogic,tl1-aoclkc";
+                               #clock-cells = <1>;
+                               reg = <0x0 0x1000>;
+                       };
+
+                       pwm_AO_ab: pwm@7000 {
+                               compatible = "amlogic,tl1-ao-pwm";
+                               reg = <0x7000 0x20>;
+                               #pwm-cells = <3>;
+                               clocks = <&xtal>,
+                                        <&xtal>,
+                                        <&xtal>,
+                                        <&xtal>;
+                               clock-names = "clkin0",
+                                             "clkin1",
+                                             "clkin2",
+                                             "clkin3";
+                               status = "disabled";
+                       };
+
+                       pwm_AO_cd: pwm@2000 {
+                               compatible = "amlogic,tl1-ao-pwm";
+                               reg = <0x2000 0x20>;
+                               #pwm-cells = <3>;
+                               clocks = <&xtal>,
+                                        <&xtal>,
+                                        <&xtal>,
+                                        <&xtal>;
+                               clock-names = "clkin0",
+                                             "clkin1",
+                                             "clkin2",
+                                             "clkin3";
+                               status = "disabled";
+                       };
+
+                       uart_AO: serial@3000 {
+                               compatible = "amlogic, meson-uart";
+                               reg = <0x3000 0x18>;
+                               interrupts = <0 193 1>;
+                               status = "okay";
+                               clocks = <&xtal>;
+                               clock-names = "clk_uart";
+                               xtal_tick_en = <2>;
+                               fifosize = < 64 >;
+                               //pinctrl-names = "default";
+                               //pinctrl-0 = <&ao_a_uart_pins>;
+                               /* 0 not support; 1 support */
+                               support-sysrq = <0>;
+                       };
+
+                       uart_AO_B: serial@4000 {
+                               compatible = "amlogic, meson-uart";
+                               reg = <0x4000 0x18>;
+                               interrupts = <0 197 1>;
+                               status = "disabled";
+                               clocks = <&xtal>;
+                               clock-names = "clk_uart";
+                               fifosize = < 64 >;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&ao_b_uart_pins1>;
+                       };
+
+                       remote: rc@8040 {
+                               compatible = "amlogic, aml_remote";
+                               reg = <0x8040 0x44>,
+                                       <0x8000 0x20>;
+                               status = "okay";
+                               protocol = <REMOTE_TYPE_NEC>;
+                               interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&remote_pins>;
+                               map = <&custom_maps>;
+                               max_frame_time = <200>;
+                       };
+
+                       irblaster: meson-irblaster@14c {
+                               compatible = "amlogic, meson_irblaster";
+                               reg = <0x14c 0x10>,
+                                       <0x40 0x4>;
+                               #irblaster-cells = <2>;
+                               interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
+                               status = "disabled";
+                       };
+
+                       i2c_AO: i2c@5000 {
+                               compatible = "amlogic,meson-i2c";
+                               status = "disabled";
+                               reg = <0x05000 0x20>;
+                               interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>,
+                                       <GIC_SPI 201 IRQ_TYPE_EDGE_RISING>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               clocks = <&clkc CLKID_I2C>;
+                               clock-frequency = <100000>;
+                       };
+
+                       i2c_AO_slave:i2c_slave@6000 {
+                               compatible = "amlogic, meson-i2c-slave";
+                               status = "disabled";
+                               reg = <0x6000 0x20>;
+                               interrupts = <GIC_SPI 194 IRQ_TYPE_EDGE_RISING>;
+                               pinctrl-names="default";
+                               pinctrl-0=<&i2c_ao_slave_pins>;
+                       };
+               };/* end of aobus */
+
+               ion_dev {
+                       compatible = "amlogic, ion_dev";
+                       status = "disabled";
+                       memory-region = <&ion_cma_reserved>;
+               };/* end of ion_dev*/
+       }; /* end of soc*/
+
+       custom_maps: custom_maps {
+               mapnum = <3>;
+               map0 = <&map_0>;
+               map1 = <&map_1>;
+               map2 = <&map_2>;
+               map_0: map_0{
+                       mapname = "amlogic-remote-1";
+                       customcode = <0xfb04>;
+                       release_delay = <80>;
+                       size  = <44>;   /*keymap size*/
+                       keymap = <REMOTE_KEY(0x01, KEY_1)
+                               REMOTE_KEY(0x02, KEY_2)
+                               REMOTE_KEY(0x03, KEY_3)
+                               REMOTE_KEY(0x04, KEY_4)
+                               REMOTE_KEY(0x05, KEY_5)
+                               REMOTE_KEY(0x06, KEY_6)
+                               REMOTE_KEY(0x07, KEY_7)
+                               REMOTE_KEY(0x08, KEY_8)
+                               REMOTE_KEY(0x09, KEY_9)
+                               REMOTE_KEY(0x0a, KEY_0)
+                               REMOTE_KEY(0x1F, KEY_FN_F1)
+                               REMOTE_KEY(0x15, KEY_MENU)
+                               REMOTE_KEY(0x16, KEY_TAB)
+                               REMOTE_KEY(0x0c, KEY_CHANNELUP)
+                               REMOTE_KEY(0x0d, KEY_CHANNELDOWN)
+                               REMOTE_KEY(0x0e, KEY_VOLUMEUP)
+                               REMOTE_KEY(0x0f, KEY_VOLUMEDOWN)
+                               REMOTE_KEY(0x11, KEY_HOME)
+                               REMOTE_KEY(0x1c, KEY_RIGHT)
+                               REMOTE_KEY(0x1b, KEY_LEFT)
+                               REMOTE_KEY(0x19, KEY_UP)
+                               REMOTE_KEY(0x1a, KEY_DOWN)
+                               REMOTE_KEY(0x1d, KEY_ENTER)
+                               REMOTE_KEY(0x17, KEY_MUTE)
+                               REMOTE_KEY(0x49, KEY_FINANCE)
+                               REMOTE_KEY(0x43, KEY_BACK)
+                               REMOTE_KEY(0x12, KEY_FN_F4)
+                               REMOTE_KEY(0x14, KEY_FN_F5)
+                               REMOTE_KEY(0x18, KEY_FN_F6)
+                               REMOTE_KEY(0x59, KEY_INFO)
+                               REMOTE_KEY(0x5a, KEY_STOPCD)
+                               REMOTE_KEY(0x10, KEY_POWER)
+                               REMOTE_KEY(0x42, KEY_PREVIOUSSONG)
+                               REMOTE_KEY(0x44, KEY_NEXTSONG)
+                               REMOTE_KEY(0x1e, KEY_REWIND)
+                               REMOTE_KEY(0x4b, KEY_FASTFORWARD)
+                               REMOTE_KEY(0x58, KEY_PLAYPAUSE)
+                               REMOTE_KEY(0x46, KEY_PROPS)
+                               REMOTE_KEY(0x40, KEY_UNDO)
+                               REMOTE_KEY(0x38, KEY_SCROLLLOCK)
+                               REMOTE_KEY(0x57, KEY_FN)
+                               REMOTE_KEY(0x5b, KEY_FN_ESC)
+                               REMOTE_KEY(0x13, 195)
+                               REMOTE_KEY(0x54, KEY_RED)
+                               REMOTE_KEY(0x4c, KEY_GREEN)
+                               REMOTE_KEY(0x4e, KEY_YELLOW)
+                               REMOTE_KEY(0x55, KEY_BLUE)
+                               REMOTE_KEY(0x53, KEY_BLUETOOTH)
+                               REMOTE_KEY(0x52, KEY_WLAN)
+                               REMOTE_KEY(0x39, KEY_CAMERA)
+                               REMOTE_KEY(0x41, KEY_SOUND)
+                               REMOTE_KEY(0x0b, KEY_QUESTION)
+                               REMOTE_KEY(0x00, KEY_CHAT)
+                               REMOTE_KEY(0x13, KEY_SEARCH)>;
+               };
+
+               map_1: map_1{
+                       mapname = "amlogic-remote-2";
+                       customcode = <0xfe01>;
+                       release_delay = <80>;
+                       size  = <53>;
+                       keymap = <REMOTE_KEY(0x01, KEY_1)
+                               REMOTE_KEY(0x02, KEY_2)
+                               REMOTE_KEY(0x03, KEY_3)
+                               REMOTE_KEY(0x04, KEY_4)
+                               REMOTE_KEY(0x05, KEY_5)
+                               REMOTE_KEY(0x06, KEY_6)
+                               REMOTE_KEY(0x07, KEY_7)
+                               REMOTE_KEY(0x08, KEY_8)
+                               REMOTE_KEY(0x09, KEY_9)
+                               REMOTE_KEY(0x0a, KEY_0)
+                               REMOTE_KEY(0x1F, KEY_FN_F1)
+                               REMOTE_KEY(0x15, KEY_MENU)
+                               REMOTE_KEY(0x16, KEY_TAB)
+                               REMOTE_KEY(0x0c, KEY_CHANNELUP)
+                               REMOTE_KEY(0x0d, KEY_CHANNELDOWN)
+                               REMOTE_KEY(0x0e, KEY_VOLUMEUP)
+                               REMOTE_KEY(0x0f, KEY_VOLUMEDOWN)
+                               REMOTE_KEY(0x11, KEY_HOME)
+                               REMOTE_KEY(0x1c, KEY_RIGHT)
+                               REMOTE_KEY(0x1b, KEY_LEFT)
+                               REMOTE_KEY(0x19, KEY_UP)
+                               REMOTE_KEY(0x1a, KEY_DOWN)
+                               REMOTE_KEY(0x1d, KEY_ENTER)
+                               REMOTE_KEY(0x17, KEY_MUTE)
+                               REMOTE_KEY(0x49, KEY_FINANCE)
+                               REMOTE_KEY(0x43, KEY_BACK)
+                               REMOTE_KEY(0x12, KEY_FN_F4)
+                               REMOTE_KEY(0x14, KEY_FN_F5)
+                               REMOTE_KEY(0x18, KEY_FN_F6)
+                               REMOTE_KEY(0x59, KEY_INFO)
+                               REMOTE_KEY(0x5a, KEY_STOPCD)
+                               REMOTE_KEY(0x10, KEY_POWER)
+                               REMOTE_KEY(0x42, KEY_PREVIOUSSONG)
+                               REMOTE_KEY(0x44, KEY_NEXTSONG)
+                               REMOTE_KEY(0x1e, KEY_REWIND)
+                               REMOTE_KEY(0x4b, KEY_FASTFORWARD)
+                               REMOTE_KEY(0x58, KEY_PLAYPAUSE)
+                               REMOTE_KEY(0x46, KEY_PROPS)
+                               REMOTE_KEY(0x40, KEY_UNDO)
+                               REMOTE_KEY(0x38, KEY_SCROLLLOCK)
+                               REMOTE_KEY(0x57, KEY_FN)
+                               REMOTE_KEY(0x5b, KEY_FN_ESC)
+                               REMOTE_KEY(0x54, KEY_RED)
+                               REMOTE_KEY(0x4c, KEY_GREEN)
+                               REMOTE_KEY(0x4e, KEY_YELLOW)
+                               REMOTE_KEY(0x55, KEY_BLUE)
+                               REMOTE_KEY(0x53, KEY_BLUETOOTH)
+                               REMOTE_KEY(0x52, KEY_WLAN)
+                               REMOTE_KEY(0x39, KEY_CAMERA)
+                               REMOTE_KEY(0x41, KEY_SOUND)
+                               REMOTE_KEY(0x0b, KEY_QUESTION)
+                               REMOTE_KEY(0x00, KEY_CHAT)
+                               REMOTE_KEY(0x13, KEY_SEARCH)>;
+               };
+
+               map_2: map_2{
+                       mapname = "amlogic-remote-3";
+                       customcode = <0xbd02>;
+                       release_delay = <80>;
+                       size  = <17>;
+                       keymap = <REMOTE_KEY(0xca,KEY_UP)
+                               REMOTE_KEY(0xd2,KEY_DOWN)
+                               REMOTE_KEY(0x99,KEY_LEFT)
+                               REMOTE_KEY(0xc1,KEY_RIGHT)
+                               REMOTE_KEY(0xce,KEY_RIGHTCTRL)
+                               REMOTE_KEY(0x45,KEY_POWER)
+                               REMOTE_KEY(0xc5,KEY_COPY)
+                               REMOTE_KEY(0x80,KEY_MUTE)
+                               REMOTE_KEY(0xd0,KEY_TAB)
+                               REMOTE_KEY(0xd6,KEY_LEFTMETA)
+                               REMOTE_KEY(0x95,KEY_HOME)
+                               REMOTE_KEY(0xdd,KEY_PAGEUP)
+                               REMOTE_KEY(0x8c,KEY_PAGEDOWN)
+                               REMOTE_KEY(0x89,KEY_UNDO)
+                               REMOTE_KEY(0x9c,KEY_PROPS)
+                               REMOTE_KEY(0x9a,KEY_SCALE)
+                               REMOTE_KEY(0xcd,KEY_KPCOMMA)>;
+               };
+       };
+
+       uart_A: serial@ffd24000 {
+               compatible = "amlogic, meson-uart";
+               reg = <0xffd24000 0x18>;
+               interrupts = <0 26 1>;
+               status = "disabled";
+               clocks = <&xtal
+                       &clkc CLKID_UART0>;
+               clock-names = "clk_uart",
+                       "clk_gate";
+               fifosize = < 128 >;
+               pinctrl-names = "default";
+               pinctrl-0 = <&a_uart_pins>;
+       };
+
+       uart_B: serial@ffd23000 {
+               compatible = "amlogic, meson-uart";
+               reg = <0xffd23000 0x18>;
+               interrupts = <0 75 1>;
+               status = "disabled";
+               clocks = <&xtal
+                       &clkc CLKID_UART1>;
+               clock-names = "clk_uart",
+                       "clk_gate";
+               fifosize = < 64 >;
+               pinctrl-names = "default";
+               pinctrl-0 = <&b_uart_pins>;
+       };
+
+       uart_C: serial@ffd22000 {
+               compatible = "amlogic, meson-uart";
+               reg = <0xffd22000 0x18>;
+               interrupts = <0 93 1>;
+               status = "disabled";
+               clocks = <&xtal
+                       &clkc CLKID_UART1>;
+               clock-names = "clk_uart",
+                       "clk_gate";
+               fifosize = < 64 >;
+               pinctrl-names = "default";
+               pinctrl-0 = <&c_uart_pins>;
+       };
+
+       sd_emmc_c: emmc@ffe07000 {
+               status = "disabled";
+               compatible = "amlogic, meson-mmc-tl1";
+               reg = <0xffe07000 0x800>;
+               interrupts = <0 191 1>;
+               pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
+               pinctrl-0 = <&emmc_clk_cmd_pins>;
+               pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>;
+               clocks = <&clkc CLKID_SD_EMMC_C>,
+                          <&clkc CLKID_SD_EMMC_C_P0_COMP>,
+                          <&clkc CLKID_FCLK_DIV2>,
+                          <&clkc CLKID_FCLK_DIV5>,
+                          <&clkc CLKID_GP0_PLL>,
+                          <&xtal>;
+               clock-names = "core","clkin0","clkin1","clkin2","clkin3","xtal";
+
+               bus-width = <8>;
+               cap-sd-highspeed;
+               cap-mmc-highspeed;
+               /* mmc-ddr-1_8v; */
+               /* mmc-hs200-1_8v; */
+
+               max-frequency = <200000000>;
+               non-removable;
+               disable-wp;
+               emmc {
+                       pinname = "emmc";
+                       ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+                       /*caps defined in dts*/
+                       tx_delay = <0>;
+                       max_req_size = <0x20000>; /**128KB*/
+                       gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
+                       hw_reset = <&gpio BOOT_12 GPIO_ACTIVE_HIGH>;
+                       card_type = <1>;
+                       /* 1:mmc card(include eMMC),
+                        * 2:sd card(include tSD)
+                        */
+               };
+       };
+
+
+       spifc: spifc@ffd14000 {
+               compatible = "amlogic,aml-spi-nor";
+               status = "disabled";
+
+               reg = <0xffd14000 0x80>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&spifc_all_pins>;
+               clock-names = "core";
+               clocks = <&clkc CLKID_CLK81>;
+
+               spi-nor@0 {
+                       compatible = "jedec,spi-nor";
+                       spifc-frequency = <40000000>;
+                       read-capability = <4>;/* dual read 1_1_2 */
+                       spifc-io-width = <4>;
+               };
+       };
+
+       slc_nand: nand-controller@0xFFE07800 {
+               compatible = "amlogic, aml_mtd_nand";
+               status = "disabled";
+               reg = <0xFFE07800 0x200>;
+               interrupts = <0 34 1>;
+
+               pinctrl-names = "nand_rb_mod", "nand_norb_mod", "nand_cs_only";
+               pinctrl-0 = <&all_nand_pins>;
+               pinctrl-1 = <&all_nand_pins>;
+               pinctrl-2 = <&nand_cs_pins>;
+               clocks = <&clkc CLKID_SD_EMMC_C>,
+                               <&clkc CLKID_SD_EMMC_C_P0_COMP>;
+               clock-names = "core", "clkin";
+
+               device_id = <0>;
+               /*fip/tpl configurations, must be same
+                *with uboot if bl_mode was set as 1
+                *bl_mode: 0 compact mode;1 descrete mode
+                *if bl_mode was set as 1,fip configuration will work
+                */
+               bl_mode = <1>;
+               /*copy count of fip*/
+               fip_copies = <4>;
+               /*size of each fip copy*/
+               fip_size = <0x200000>;
+               nand_clk_ctrl = <0xFFE07000>;
+               /*partions defined in dts*/
+       };
+
+       mesonstream {
+               compatible = "amlogic, codec, streambuf";
+               status = "okay";
+               clocks = <&clkc CLKID_U_PARSER
+                       &clkc CLKID_DEMUX
+                       &clkc CLKID_AHB_ARB0
+                       &clkc CLKID_CLK81
+                       &clkc CLKID_DOS
+                       &clkc CLKID_VDEC_MUX
+                       &clkc CLKID_HCODEC_MUX
+                       &clkc CLKID_HEVC_MUX
+                       &clkc CLKID_HEVCF_MUX>;
+               clock-names = "parser_top",
+                       "demux",
+                       "ahbarb0",
+                       "clk_81",
+                       "vdec",
+                       "clk_vdec_mux",
+                       "clk_hcodec_mux",
+                       "clk_hevc_mux",
+                       "clk_hevcb_mux";
+       };
+
+       vcodec-dec {
+               compatible = "amlogic, vcodec-dec";
+               status = "okay";
+       };
+
+       vdec {
+               compatible = "amlogic, vdec";
+               status = "okay";
+               interrupts = <0 3 1
+                       0 23 1
+                       0 32 1
+                       0 43 1
+                       0 44 1
+                       0 45 1>;
+               interrupt-names = "vsync",
+                       "demux",
+                       "parser",
+                       "mailbox_0",
+                       "mailbox_1",
+                       "mailbox_2";
+       };
+
+       canvas: canvas {
+               compatible = "amlogic, meson, canvas";
+               status = "okay";
+               reg = <0xff638000 0x2000>;
+       };
+
+       codec_io: codec_io {
+               compatible = "amlogic, codec_io";
+               status = "okay";
+               #address-cells=<1>;
+               #size-cells=<1>;
+               ranges;
+               io_cbus_base{
+                       reg = <0xffd00000 0x100000>;
+               };
+               io_dos_base{
+                       reg = <0xff620000 0x10000>;
+               };
+               io_hiubus_base{
+                       reg = <0xff63c000 0x2000>;
+               };
+               io_aobus_base{
+                       reg = <0xff800000 0x10000>;
+               };
+               io_vcbus_base{
+                       reg = <0xff900000 0x40000>;
+               };
+               io_dmc_base{
+                       reg = <0xff638000 0x2000>;
+               };
+               io_efuse_base{
+                       reg = <0xff630000 0x2000>;
+               };
+       };
+
+       rdma {
+               compatible = "amlogic, meson-tl1, rdma";
+               status = "okay";
+               interrupts = <0 89 1>;
+               interrupt-names = "rdma";
+       };
+
+       meson_fb: fb {
+               compatible = "amlogic, meson-tl1";
+               memory-region = <&logo_reserved>;
+               status = "disabled";
+               interrupts = <0 3 1
+                       0 56 1
+                       0 89 1>;
+               interrupt-names = "viu-vsync", "viu2-vsync", "rdma";
+               /* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/
+               display_mode_default = "1080p60hz";
+               scale_mode = <1>;
+               /** 0:VPU free scale 1:OSD free scale 2:OSD super scale */
+               display_size_default = <1920 1080 1920 2160 32>;
+               /*1920*1080*4*3 = 0x17BB000*/
+               clocks = <&clkc CLKID_VPU_CLKC_MUX>;
+               clock-names = "vpu_clkc";
+       };
+
+       ge2d {
+               compatible = "amlogic, ge2d-g12a";
+               status = "okay";
+               interrupts = <0 146 1>;
+               interrupt-names = "ge2d";
+               clocks = <&clkc CLKID_VAPB_MUX>,
+                       <&clkc CLKID_G2D>,
+                       <&clkc CLKID_GE2D_GATE>;
+               clock-names = "clk_vapb_0",
+                       "clk_ge2d",
+                       "clk_ge2d_gate";
+               reg = <0xff940000 0x10000>;
+       };
+
+       meson-amvideom {
+               compatible = "amlogic, amvideom";
+               status = "okay";
+               interrupts = <0 3 1>;
+               interrupt-names = "vsync";
+       };
+
+       ionvideo {
+               compatible = "amlogic, ionvideo";
+               status = "okay";
+       };
+
+       amlvideo {
+               compatible = "amlogic, amlvideo";
+               status = "okay";
+       };
+
+       vdac {
+               compatible = "amlogic, vdac-tl1";
+               status = "okay";
+       };
+
+       ddr_bandwidth {
+               compatible = "amlogic, ddr-bandwidth";
+               status = "okay";
+               reg = <0xff638000 0x100
+                      0xff638c00 0x100>;
+               interrupts = <0 52 1>;
+               interrupt-names = "ddr_bandwidth";
+       };
+
+       dmc_monitor {
+               compatible = "amlogic, dmc_monitor";
+               status = "disabled";
+               reg_base = <0xff638800>;
+               interrupts = <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>;
+       };
+
+       efuse: efuse{
+               compatible = "amlogic, efuse";
+               read_cmd = <0x82000030>;
+               write_cmd = <0x82000031>;
+               get_max_cmd = <0x82000033>;
+               key = <&efusekey>;
+               clocks = <&clkc CLKID_EFUSE>;
+               clock-names = "efuse_clk";
+               status = "disabled";
+       };
+
+       efusekey:efusekey{
+               keynum = <4>;
+               key0 = <&key_0>;
+               key1 = <&key_1>;
+               key2 = <&key_2>;
+               key3 = <&key_3>;
+               key_0:key_0{
+                       keyname = "mac";
+                       offset = <0>;
+                       size = <6>;
+               };
+               key_1:key_1{
+                       keyname = "mac_bt";
+                       offset = <6>;
+                       size = <6>;
+               };
+               key_2:key_2{
+                       keyname = "mac_wifi";
+                       offset = <12>;
+                       size = <6>;
+               };
+               key_3:key_3{
+                       keyname = "usid";
+                       offset = <18>;
+                       size = <16>;
+               };
+       };
+
+       audio_data: audio_data {
+               compatible = "amlogic, audio_data";
+               query_licence_cmd = <0x82000050>;
+               status = "disabled";
+       };
+
+       defendkey: defendkey {
+               compatible = "amlogic, defendkey";
+               mem_size = <0 0x100000>;
+               status = "okay";
+       };
+}; /* end of / */
+
+&pinctrl_aobus {
+       sd_to_ao_uart_clr_pins: sd_to_ao_uart_clr_pins {
+               mux {
+                       groups = "GPIOAO_0",
+                                  "GPIOAO_1",
+                                  "GPIOAO_2",
+                                  "GPIOAO_3",
+                                  "GPIOAO_4",
+                                  "GPIOAO_5",
+                                  "GPIOAO_6",
+                                  "GPIOAO_7",
+                                  "GPIOAO_8",
+                                  "GPIOAO_9",
+                                  "GPIOAO_10",
+                                  "GPIOAO_11",
+                                  "GPIOE_0",
+                                  "GPIOE_1",
+                                  "GPIOE_2",
+                                  "GPIO_TEST_N";
+                       function = "gpio_aobus";
+               };
+       };
+
+       sd_to_ao_uart_pins: sd_to_ao_uart_pins {
+               mux {
+                       groups = "uart_ao_a_tx",
+                                  "uart_ao_a_rx",
+                                  "uart_ao_a_cts",
+                                  "uart_ao_a_rts";
+                       function = "uart_ao_a";
+                       bias-pull-up;
+                       input-enable;
+               };
+       };
+
+       remote_pins:remote_pin {
+               mux {
+                       groups = "remote_input_ao";
+                       function = "remote_input_ao";
+               };
+       };
+
+       pwm_ao_a_pins: pwm_ao_a {
+               mux {
+                       groups = "pwm_ao_a";
+                       function = "pwm_ao_a";
+               };
+       };
+
+       pwm_ao_a_hiz_pins: pwm_ao_a_hiz {
+               mux {
+                       groups = "pwm_ao_a_hiz";
+                       function = "pwm_ao_a";
+               };
+       };
+
+       pwm_ao_b_pins: pwm_ao_b {
+               mux {
+                       groups = "pwm_ao_b";
+                       function = "pwm_ao_b";
+               };
+       };
+
+       pwm_ao_c_pins1: pwm_ao_c_pins1 {
+               mux {
+                       groups = "pwm_ao_c_4";
+                       function = "pwm_ao_c";
+               };
+       };
+
+       pwm_ao_c_pins2: pwm_ao_c_pins2 {
+               mux {
+                       groups = "pwm_ao_c_6";
+                       function = "pwm_ao_c";
+               };
+       };
+
+       pwm_ao_c_hiz_pins1: pwm_ao_c_hiz1 {
+               mux {
+                       groups = "pwm_ao_c_hiz_4";
+                       function = "pwm_ao_c";
+               };
+       };
+
+       pwm_ao_c_hiz_pins2: pwm_ao_c_hiz2 {
+               mux {
+                       groups = "pwm_ao_c_hiz_7";
+                       function = "pwm_ao_c";
+               };
+       };
+
+       pwm_ao_d_pins1: pwm_ao_d_pins1 {
+               mux {
+                       groups = "pwm_ao_d_5";
+                       function = "pwm_ao_d";
+               };
+       };
+
+       pwm_ao_d_pins2: pwm_ao_d_pins2 {
+               mux {
+                       groups = "pwm_ao_d_10";
+                       function = "pwm_ao_d";
+               };
+       };
+
+       pwm_ao_d_pins3: pwm_ao_d_pins3 {
+               mux {
+                       groups = "pwm_ao_d_e";
+                       function = "pwm_ao_d";
+               };
+       };
+
+       pwm_a_e2: pwm_a_e2 {
+               mux {
+                       groups = "pwm_a_e2";
+                       function = "pwm_a_e2";
+               };
+       };
+
+       i2c_ao_2_pins:i2c_ao_2 {
+               mux {
+                       groups = "i2c_ao_sck_2",
+                       "i2c_ao_sda_3";
+                       function = "i2c_ao";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       i2c_ao_e_pins:i2c_ao_e {
+               mux {
+                       groups = "i2c_ao_sck_e",
+                       "i2c_ao_sda_e";
+                       function = "i2c_ao";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       i2c_ao_slave_pins:i2c_ao_slave {
+               mux {
+                       groups = "i2c_ao_slave_sck",
+                       "i2c_ao_slave_sda";
+                       function = "i2c_ao_slave";
+               };
+       };
+
+       ao_uart_pins:ao_uart {
+               mux {
+                       groups = "uart_ao_a_rx",
+                               "uart_ao_a_tx";
+                       function = "uart_ao_a";
+               };
+       };
+
+       ao_b_uart_pins1:ao_b_uart1 {
+               mux {
+                       groups = "uart_ao_b_tx_2",
+                               "uart_ao_b_rx_3";
+                       function = "uart_ao_b";
+               };
+       };
+
+       ao_b_uart_pins2:ao_b_uart2 {
+               mux {
+                       groups = "uart_ao_b_tx_8",
+                               "uart_ao_b_rx_9";
+                       function = "uart_ao_b";
+               };
+       };
+
+       irblaster_pins:irblaster_pin {
+               mux {
+                       groups = "remote_out_ao";
+                       function = "remote_out_ao";
+               };
+       };
+
+       irblaster_pins1:irblaster_pin1 {
+               mux {
+                       groups = "remote_out_ao9";
+                       function = "remote_out_ao";
+               };
+       };
+
+       jtag_apao_pins:jtag_apao_pin {
+               mux {
+                       groups = "jtag_a_tdi",
+                       "jtag_a_tdo",
+                       "jtag_a_clk",
+                       "jtag_a_tms";
+                       function = "jtag_a";
+               };
+       };
+};
+
+&pinctrl_periphs {
+       /* sdemmc portC */
+       emmc_clk_cmd_pins: emmc_clk_cmd_pins {
+               mux {
+                       groups = "emmc_clk",
+                                "emmc_cmd";
+                       function = "emmc";
+                       input-enable;
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       emmc_conf_pull_up: emmc_conf_pull_up {
+               mux {
+                       groups = "emmc_nand_d7",
+                                "emmc_nand_d6",
+                                "emmc_nand_d5",
+                                "emmc_nand_d4",
+                                "emmc_nand_d3",
+                                "emmc_nand_d2",
+                                "emmc_nand_d1",
+                                "emmc_nand_d0",
+                                "emmc_clk",
+                                "emmc_cmd";
+                       function = "emmc";
+                       input-enable;
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       emmc_conf_pull_done: emmc_conf_pull_done {
+               mux {
+                       groups = "emmc_nand_ds";
+                       function = "emmc";
+                       input-enable;
+                       bias-pull-down;
+                       drive-strength = <3>;
+               };
+       };
+
+       /* sdemmc portB */
+       sd_clk_cmd_pins: sd_clk_cmd_pins {
+               mux {
+                       groups = "sdcard_cmd",
+                                  "sdcard_clk";
+                       function = "sdcard";
+                       input-enable;
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       sd_all_pins: sd_all_pins {
+               mux {
+                       groups = "sdcard_d0",
+                                  "sdcard_d1",
+                                  "sdcard_d2",
+                                  "sdcard_d3",
+                                  "sdcard_cmd",
+                                  "sdcard_clk";
+                       function = "sdcard";
+                       input-enable;
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       sd_1bit_pins: sd_1bit_pins {
+               mux {
+                       groups = "sdcard_d0",
+                                       "sdcard_cmd",
+                                       "sdcard_clk";
+                       function = "sdcard";
+                       input-enable;
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       ao_to_sd_uart_pins: ao_to_sd_uart_pins {
+               mux {
+                       groups ="uart_ao_a_rx_w3",
+                                       "uart_ao_a_tx_w2",
+                                       "uart_ao_a_rx_w7",
+                                       "uart_ao_a_tx_w6",
+                                       "uart_ao_a_rx_w11",
+                                       "uart_ao_a_tx_w10";
+                       function = "uart_ao_a_ee";
+                       bias-pull-up;
+                       input-enable;
+               };
+       };
+
+       all_nand_pins: all_nand_pins {
+               mux {
+                       groups = "emmc_nand_d0",
+                               "emmc_nand_d1",
+                               "emmc_nand_d2",
+                               "emmc_nand_d3",
+                               "emmc_nand_d4",
+                               "emmc_nand_d5",
+                               "emmc_nand_d6",
+                               "emmc_nand_d7",
+                               "nand_ce0",
+                               "nand_ale",
+                               "nand_cle",
+                               "nand_wen_clk",
+                               "nand_ren_wr";
+                       function = "nand";
+                       input-enable;
+                       drive-strength = <3>;
+               };
+       };
+
+       nand_cs_pins:nand_cs {
+               mux {
+                       groups = "nand_ce0";
+                       function = "nand";
+                       drive-strength = <3>;
+               };
+       };
+
+       /* sdemmc port */
+       sdio_clk_cmd_pins: sdio_clk_cmd_pins {
+               mux {
+                       groups = "sdcard_clk",
+                               "sdcard_cmd";
+                       function = "sdcard";
+                       input-enable;
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       sdio_all_pins: sdio_all_pins {
+               mux {
+                       groups = "sdcard_d0",
+                               "sdcard_d1",
+                               "sdcard_d2",
+                               "sdcard_d3",
+                               "sdcard_clk",
+                               "sdcard_cmd";
+                       function = "sdcard";
+                       input-enable;
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       spifc_cs_pin:spifc_cs_pin {
+               mux {
+                       groups = "nor_cs";
+                       function = "nor";
+                       bias-pull-up;
+               };
+       };
+
+       spifc_pulldown: spifc_pulldown {
+               mux {
+                       groups = "nor_d",
+                               "nor_q",
+                               "nor_c";
+                       function = "nor";
+                       bias-pull-down;
+               };
+       };
+
+       spifc_pullup: spifc_pullup {
+               mux {
+                       groups = "nor_cs";
+                       function = "nor";
+                       bias-pull-up;
+               };
+       };
+
+       spifc_all_pins: spifc_all_pins {
+               mux {
+                       groups =  "nor_d",
+                               "nor_q",
+                               "nor_c",
+                               "nor_hold",
+                               "nor_wp";
+                       function = "nor";
+                       input-enable;
+                       bias-pull-down;
+               };
+       };
+
+       pwm_a_pins: pwm_a {
+               mux {
+                       groups = "pwm_a";
+                       function = "pwm_a";
+               };
+       };
+
+       pwm_b_pins1: pwm_b_pins1 {
+               mux {
+                       groups = "pwm_b_c";
+                       function = "pwm_b";
+               };
+       };
+
+       pwm_b_pins2: pwm_b_pins2 {
+               mux {
+                       groups = "pwm_b_z";
+                       function = "pwm_b";
+               };
+       };
+
+       pwm_c_pins1: pwm_c_pins1 {
+               mux {
+                       groups = "pwm_c_dv";
+                       function = "pwm_c";
+               };
+       };
+
+       pwm_c_pins2: pwm_c_pins2 {
+               mux {
+                       groups = "pwm_c_h";
+                       function = "pwm_c";
+               };
+       };
+
+       pwm_c_pins3: pwm_c_pins3 {
+               mux {
+                       groups = "pwm_c_z";
+                       function = "pwm_c";
+               };
+       };
+
+       pwm_d_pins1: pwm_d_pins1 {
+               mux {
+                       groups = "pwm_d_dv";
+                       function = "pwm_d";
+               };
+       };
+
+       pwm_d_pins2: pwm_d_pins2 {
+               mux {
+                       groups = "pwm_d_z";
+                       function = "pwm_d";
+               };
+       };
+
+       pwm_e_pins1: pwm_e1 {
+               mux {
+                       groups = "pwm_e_dv";
+                       function = "pwm_e";
+               };
+       };
+
+       pwm_e_pins2: pwm_e2 {
+               mux {
+                       groups = "pwm_e_z";
+                       function = "pwm_e";
+               };
+       };
+
+       pwm_f_pins1: pwm_f_pins1 {
+               mux {
+                       groups = "pwm_f_dv";
+                       function = "pwm_f";
+               };
+       };
+
+       pwm_f_pins2: pwm_f_pins2 {
+               mux {
+                       groups = "pwm_f_z";
+                       function = "pwm_f";
+               };
+       };
+
+       i2c0_c_pins:i2c0_c {
+               mux {
+                       groups = "i2c0_sda_c",
+                               "i2c0_sck_c";
+                       function = "i2c0";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       i2c0_dv_pins:i2c0_dv {
+               mux {
+                       groups = "i2c0_sda_dv",
+                               "i2c0_sck_dv";
+                       function = "i2c0";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       i2c1_z_pins:i2c1_z {
+               mux {
+                       groups = "i2c1_sda_z",
+                               "i2c1_sck_z";
+                       function = "i2c1";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       i2c1_h_pins:i2c1_h {
+               mux {
+                       groups = "i2c1_sda_h",
+                               "i2c1_sck_h";
+                       function = "i2c1";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       i2c2_h_pins:i2c2_h {
+               mux {
+                       groups = "i2c2_sda_h",
+                               "i2c2_sck_h";
+                       function = "i2c2";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       i2c2_z_pins:i2c2_z {
+               mux {
+                       groups = "i2c2_sda_z",
+                               "i2c2_sck_z";
+                       function = "i2c2";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       i2c3_h1_pins:i2c3_h1 {
+               mux {
+                       groups = "i2c3_sda_h1",
+                               "i2c3_sck_h0";
+                       function = "i2c3";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       i2c3_h20_pins:i2c3_h3 {
+               mux {
+                       groups = "i2c3_sda_h20",
+                               "i2c3_sck_h19";
+                       function = "i2c3";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       i2c3_dv_pins:i2c3_dv {
+               mux {
+                       groups = "i2c3_sda_dv",
+                               "i2c3_sck_dv";
+                       function = "i2c3";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       i2c3_c_pins:i2c3_c {
+               mux {
+                       groups = "i2c3_sda_c",
+                               "i2c3_sck_c";
+                       function = "i2c3";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       spicc0_pins_h: spicc0_pins_h {
+               mux {
+                       groups = "spi0_mosi_h",
+                                "spi0_miso_h",
+                                "spi0_clk_h";
+                       function = "spi0";
+                       drive-strength = <1>;
+               };
+       };
+
+       spicc1_pins_dv: spicc1_pins_dv {
+               mux {
+                       groups = "spi1_mosi_dv",
+                                "spi1_miso_dv",
+                                "spi1_clk_dv";
+                       function = "spi1";
+                       drive-strength = <1>;
+               };
+       };
+
+       internal_eth_pins: internal_eth_pins {
+               mux {
+                       groups = "eth_link_led",
+                               "eth_act_led";
+                       function = "eth";
+               };
+       };
+
+       internal_gpio_pins: internal_gpio_pins {
+               mux {
+                       groups = "GPIOZ_14",
+                               "GPIOZ_15";
+                       function = "gpio_periphs";
+                       bias-disable;
+                       input-enable;
+               };
+       };
+
+       external_eth_pins: external_eth_pins {
+               mux {
+                       groups = "eth_mdio",
+                       "eth_mdc",
+                       "eth_rgmii_rx_clk",
+                       "eth_rx_dv",
+                       "eth_rxd0",
+                       "eth_rxd1",
+                       "eth_rxd2_rgmii",
+                       "eth_rxd3_rgmii",
+                       "eth_rgmii_tx_clk",
+                       "eth_txen",
+                       "eth_txd0",
+                       "eth_txd1",
+                       "eth_txd2_rgmii",
+                       "eth_txd3_rgmii";
+                       function = "eth";
+                       drive-strength = <3>;
+               };
+       };
+
+       a_uart_pins:a_uart {
+               mux {
+                       groups = "uart_a_tx",
+                               "uart_a_rx",
+                               "uart_a_cts",
+                               "uart_a_rts";
+                       function = "uart_a";
+               };
+       };
+
+       b_uart_pins:b_uart {
+               mux {
+                       groups = "uart_b_tx",
+                               "uart_b_rx";
+                       function = "uart_b";
+               };
+       };
+
+       c_uart_pins:c_uart {
+               mux {
+                       groups = "uart_c_tx",
+                               "uart_c_rx";
+                       function = "uart_c";
+               };
+       };
+
+       atvdemod_agc_pins: atvdemod_agc_pins {
+               mux {
+                       groups = "atv_if_agc_dv";
+                       function = "atv";
+               };
+       };
+
+       dtvdemod_agc_pins: dtvdemod_agc_pins {
+               mux {
+                       groups = "dtv_if_agc_dv2";
+                       function = "dtv";
+               };
+       };
+
+       lcd_vbyone_pins: lcd_vbyone_pin {
+               mux {
+                       groups = "vx1_lockn","vx1_htpdn";
+                       function = "vx1";
+               };
+       };
+
+       lcd_vbyone_off_pins: lcd_vbyone_off_pin {
+               mux {
+                       groups = "GPIOH_15","GPIOH_16";
+                       function = "gpio_periphs";
+                       input-enable;
+               };
+       };
+
+       lcd_tcon_pins: lcd_tcon_pin {
+               mux {
+                       groups = "tcon_0","tcon_1","tcon_2","tcon_3",
+                               "tcon_4","tcon_5","tcon_6","tcon_7",
+                               "tcon_8","tcon_9","tcon_10","tcon_11",
+                               "tcon_12","tcon_13","tcon_14","tcon_15",
+                               "tcon_lock","tcon_spi_mo","tcon_spi_mi",
+                               "tcon_spi_clk","tcon_spi_ss";
+                       function = "tcon";
+               };
+       };
+       lcd_tcon_off_pins: lcd_tcon_off_pin {
+               mux {
+                       groups = "GPIOH_0","GPIOH_1","GPIOH_2","GPIOH_3",
+                               "GPIOH_4","GPIOH_5","GPIOH_6","GPIOH_7",
+                               "GPIOH_8","GPIOH_9","GPIOH_10","GPIOH_11",
+                               "GPIOH_12","GPIOH_13","GPIOH_14","GPIOH_15",
+                               "GPIOH_16","GPIOH_17","GPIOH_18","GPIOH_19",
+                               "GPIOH_20";
+                       function = "gpio_periphs";
+                       input-enable;
+               };
+       };
+};
+
+&gpu{
+       tbl =  <&dvfs285_cfg
+               &dvfs400_cfg
+               &dvfs500_cfg
+               &dvfs666_cfg
+               &dvfs800_cfg
+               &dvfs800_cfg>;
+};
diff --git a/arch/arm/boot/dts/amlogic/tm2_pxp.dts b/arch/arm/boot/dts/amlogic/tm2_pxp.dts
new file mode 100644 (file)
index 0000000..25010e7
--- /dev/null
@@ -0,0 +1,1134 @@
+/*
+ * arch/arm/boot/dts/amlogic/tl1_pxp.dts
+ *
+ * Copyright (C) 2018 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/dts-v1/;
+
+#include "mesontm2.dtsi"
+#include "partition_mbox_normal_P_32.dtsi"
+#include "mesontl1_skt-panel.dtsi"
+
+/ {
+       model = "Amlogic TL1 PXP";
+       amlogic-dt-id = "tl1_pxp";
+       compatible = "amlogic, tl1_pxp";
+
+       aliases {
+               serial0 = &uart_AO;
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
+               i2c4 = &i2c_AO;
+       };
+
+       memory@00000000 {
+               device_type = "memory";
+               linux,usable-memory = <0x000000 0x40000000>;
+       };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+               /* global autoconfigured region for contiguous allocations */
+               secmon_reserved: linux,secmon {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x400000>;
+                       alignment = <0x400000>;
+                       alloc-ranges = <0x05000000 0x400000>;
+               };
+
+               codec_mm_cma:linux,codec_mm_cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       /* ion_codec_mm max can alloc size 80M*/
+                       size = <0x13400000>;
+                       alignment = <0x400000>;
+                       linux,contiguous-region;
+                       /*alloc-ranges = <0x30000000 0x50000000>;*/
+               };
+
+               /* codec shared reserved */
+               codec_mm_reserved:linux,codec_mm_reserved {
+                       compatible = "amlogic, codec-mm-reserved";
+                       size = <0x0>;
+                       alignment = <0x100000>;
+                       //no-map;
+               };
+
+               logo_reserved:linux,meson-fb {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x800000>;
+                       alignment = <0x400000>;
+                       alloc-ranges = <0x3f800000 0x800000>;
+               };
+
+               ion_cma_reserved:linux,ion-dev {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x8000000>;
+                       alignment = <0x400000>;
+               };
+
+               /*  vdin0 CMA pool */
+               //vdin0_cma_reserved:linux,vdin0_cma {
+               //      compatible = "shared-dma-pool";
+               //      reusable;
+                       /* 3840x2160x4x4 ~=128 M */
+               //      size = <0xc400000>;
+               //      alignment = <0x400000>;
+               //};
+
+               /*  vdin1 CMA pool */
+               vdin1_cma_reserved:linux,vdin1_cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       /* 1920x1080x2x4  =16 M */
+                       size = <0x1400000>;
+                       alignment = <0x400000>;
+               };
+
+               /*di CMA pool */
+               di_cma_reserved:linux,di_cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       /* buffer_size = 3621952(yuv422 8bit)
+                        *  | 4736064(yuv422 10bit)
+                        *  | 4074560(yuv422 10bit full pack mode)
+                        * 10x3621952=34.6M(0x23) support 8bit
+                        * 10x4736064=45.2M(0x2e) support 12bit
+                        * 10x4074560=40M(0x28) support 10bit
+                        */
+                       size = <0x02800000>;
+                       alignment = <0x400000>;
+               };
+
+               /* for hdmi rx emp use */
+               hdmirx_emp_cma_reserved:linux,emp_cma {
+                       compatible = "shared-dma-pool";
+                       /*linux,phandle = <5>;*/
+                       reusable;
+                       /* 4M for emp to ddr */
+                       /* 32M for tmds to ddr */
+                       size = <0x400000>;
+                       alignment = <0x400000>;
+                       /* alloc-ranges = <0x400000 0x2000000>; */
+               };
+
+               /* POST PROCESS MANAGER */
+               ppmgr_reserved:linux,ppmgr {
+                       compatible = "amlogic, ppmgr_memory";
+                       size = <0x0>;
+               };
+
+               picdec_cma_reserved:linux,picdec {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x0>;
+                       alignment = <0x0>;
+                       linux,contiguous-region;
+               };
+       }; /* end of reserved-memory */
+
+       codec_mm {
+               status = "disabled";
+               compatible = "amlogic, codec, mm";
+               memory-region = <&codec_mm_cma &codec_mm_reserved>;
+       };
+
+       picdec {
+               compatible = "amlogic, picdec";
+               memory-region = <&picdec_cma_reserved>;
+               dev_name = "picdec";
+               status = "disabled";
+       };
+
+       ppmgr {
+               status = "disabled";
+               compatible = "amlogic, ppmgr";
+               memory-region = <&ppmgr_reserved>;
+       };
+
+       deinterlace {
+               compatible = "amlogic, deinterlace";
+
+               status = "disabled";
+               /* 0:use reserved; 1:use cma; 2:use cma as reserved */
+               flag_cma = <1>;
+               //memory-region = <&di_reserved>;
+               memory-region = <&di_cma_reserved>;
+               interrupts = <0 46 1
+                               0 40 1>;
+               interrupt-names = "pre_irq", "post_irq";
+               clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
+                       <&clkc CLKID_VPU_CLKB_COMP>;
+               clock-names = "vpu_clkb_tmp_composite",
+                       "vpu_clkb_composite";
+               clock-range = <334 667>;
+               /* buffer-size = <3621952>;(yuv422 8bit) */
+               buffer-size = <4074560>;/*yuv422 fullpack*/
+               /* reserve-iomap = "true"; */
+               /* if enable nr10bit, set nr10bit-support to 1 */
+               post-wr-support = <1>;
+               nr10bit-support = <1>;
+               nrds-enable = <1>;
+               pps-enable = <1>;
+       };
+
+       vout {
+               compatible = "amlogic, vout";
+               status = "okay";
+               fr_auto_policy = <0>;
+       };
+/* Audio Related start */
+       pdm_codec:dummy {
+               #sound-dai-cells = <0>;
+               compatible = "amlogic, pdm_dummy_codec";
+               status = "okay";
+       };
+
+       dummy_codec:dummy {
+               #sound-dai-cells = <0>;
+               compatible = "amlogic, aml_dummy_codec";
+               status = "okay";
+       };
+
+       tl1_codec:codec {
+               #sound-dai-cells = <0>;
+               compatible = "amlogic, tl1_acodec";
+               status = "disabled";
+               reg = <0xff632000 0x1c>;
+               tdmout_index = <1>;
+               tdmin_index = <1>;
+       };
+
+       aml_dtv_demod {
+               compatible = "amlogic, ddemod-tl1";
+               dev_name = "aml_dtv_demod";
+               status = "okay";
+
+               //pinctrl-names="dtvdemod_agc";
+               //pinctrl-0=<&dtvdemod_agc>;
+
+               clocks = <&clkc CLKID_DAC_CLK>;
+               clock-names = "vdac_clk_gate";
+
+               reg = <0xff650000 0x4000        /*dtv demod base*/
+                          0xff63c000 0x2000    /*hiu reg base*/
+                          0xff800000 0x1000    /*io_aobus_base*/
+                          0xffd01000 0x1000    /*reset*/
+                       >;
+
+               /*move from dvbfe*/
+               dtv_demod0_mem = <0>;   // need move to aml_dtv_demod ?
+               spectrum = <1>;
+               cma_flag = <1>;
+               cma_mem_size = <8>;
+               //memory-region = <&demod_cma_reserved>;//<&demod_reserved>;
+       };
+
+       auge_sound {
+               compatible = "amlogic, tl1-sound-card";
+               aml-audio-card,name = "AML-AUGESOUND";
+
+               aml-audio-card,dai-link@0 {
+                       format = "dsp_a";
+                       mclk-fs = <512>;
+                       //continuous-clock;
+                       //bitclock-inversion;
+                       //frame-inversion;
+                       /* master mode */
+                       bitclock-master = <&tdma>;
+                       frame-master = <&tdma>;
+                       /* slave mode */
+                       /*
+                        * bitclock-master = <&tdmacodec>;
+                        * frame-master = <&tdmacodec>;
+                        */
+                       /* suffix-name, sync with android audio hal used for */
+                       suffix-name = "alsaPORT-pcm";
+                       tdmacpu: cpu {
+                               sound-dai = <&tdma>;
+                               dai-tdm-slot-tx-mask =
+                                                       <1 1 1 1 1 1 1 1>;
+                               dai-tdm-slot-rx-mask =
+                                                       <1 1 1 1 1 1 1 1>;
+                               dai-tdm-slot-num = <8>;
+                               dai-tdm-slot-width = <32>;
+                               system-clock-frequency = <24576000>;
+                       };
+                       tdmacodec: codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@1 {
+                       format = "i2s";
+                       mclk-fs = <256>;
+                       //continuous-clock;
+                       //bitclock-inversion;
+                       //frame-inversion;
+                       /* master mode */
+                       bitclock-master = <&tdmb>;
+                       frame-master = <&tdmb>;
+                       /* slave mode */
+                       //bitclock-master = <&tdmbcodec>;
+                       //frame-master = <&tdmbcodec>;
+                       /* suffix-name, sync with android audio hal used for */
+                       suffix-name = "alsaPORT-i2s";
+                       cpu {
+                               sound-dai = <&tdmb>;
+                               dai-tdm-slot-tx-mask = <1 1>;
+                               dai-tdm-slot-rx-mask = <1 1>;
+                               dai-tdm-slot-num = <2>;
+                               /*
+                                * dai-tdm-slot-tx-mask =
+                                *      <1 1 1 1 1 1 1 1>;
+                                * dai-tdm-slot-rx-mask =
+                                *      <1 1 1 1 1 1 1 1>;
+                                * dai-tdm-slot-num = <8>;
+                                */
+                               dai-tdm-slot-width = <32>;
+                               system-clock-frequency = <12288000>;
+                       };
+                       tdmbcodec: codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@2 {
+                       format = "i2s";
+                       mclk-fs = <256>;
+                       //continuous-clock;
+                       //bitclock-inversion;
+                       //frame-inversion;
+                       /* master mode */
+                       bitclock-master = <&tdmc>;
+                       frame-master = <&tdmc>;
+                       /* slave mode */
+                       //bitclock-master = <&tdmccodec>;
+                       //frame-master = <&tdmccodec>;
+                       /* suffix-name, sync with android audio hal used for */
+                       //suffix-name = "alsaPORT-tdm";
+                       cpu {
+                               sound-dai = <&tdmc>;
+                               dai-tdm-slot-tx-mask = <1 1>;
+                               dai-tdm-slot-rx-mask = <1 1>;
+                               dai-tdm-slot-num = <2>;
+                               dai-tdm-slot-width = <32>;
+                               system-clock-frequency = <12288000>;
+                       };
+                       tdmccodec: codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@3 {
+                       mclk-fs = <64>;
+                       /* suffix-name, sync with android audio hal used for */
+                       suffix-name = "alsaPORT-pdm";
+                       cpu {
+                               sound-dai = <&pdm>;
+                       };
+                       codec {
+                               sound-dai = <&pdm_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@4 {
+                       mclk-fs = <128>;
+                       /* suffix-name, sync with android audio hal used for */
+                       suffix-name = "alsaPORT-spdif";
+                       cpu {
+                               sound-dai = <&spdifa>;
+                               system-clock-frequency = <6144000>;
+                       };
+                       codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@5 {
+                       mclk-fs = <128>;
+                       cpu {
+                               sound-dai = <&spdifb>;
+                               system-clock-frequency = <6144000>;
+                       };
+                       codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@6 {
+                       mclk-fs = <256>;
+                       cpu {
+                               sound-dai = <&extn>;
+                               system-clock-frequency = <12288000>;
+                       };
+                       codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+       };
+       /* Audio Related end */
+
+       tvafe_avin_detect {
+               compatible = "amlogic, tl1_tvafe_avin_detect";
+               status = "okay";
+               device_mask = <1>;/*bit0:ch1;bit1:ch2*/
+               interrupts = <0 12 1>,
+                               <0 13 1>;
+       };
+
+       amlvecm {
+               compatible = "amlogic, vecm";
+               dev_name = "aml_vecm";
+               status = "okay";
+               gamma_en = <1>;/*1:enabel ;0:disable*/
+               wb_en = <1>;/*1:enabel ;0:disable*/
+               cm_en = <1>;/*1:enabel ;0:disable*/
+               wb_sel = <1>;/*1:mtx ;0:gainoff*/
+               vlock_en = <1>;/*1:enable;0:disable*/
+               vlock_mode = <0x4>;
+               /* vlock work mode:
+                *bit0:auto ENC
+                *bit1:auto PLL
+                *bit2:manual PLL
+                *bit3:manual ENC
+                *bit4:manual soft ENC
+                *bit5:manual MIX PLL ENC
+                */
+                vlock_pll_m_limit = <1>;
+                vlock_line_limit = <3>;
+       };
+
+       vdin@0 {
+               compatible = "amlogic, vdin";
+               /*memory-region = <&vdin0_cma_reserved>;*/
+               status = "disabled";
+               /*bit0:(1:share with codec_mm;0:cma alone)
+                *bit8:(1:alloc in discontinus way;0:alone in continuous way)
+                */
+               flag_cma = <0x101>;
+               /*MByte, if 10bit disable: 64M(YUV422),
+                *if 10bit enable: 64*1.5 = 96M(YUV422)
+                *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
+                *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
+                *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+                *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+                */
+               cma_size = <190>;
+               interrupts = <0 83 1>;
+               rdma-irq = <2>;
+               clocks = <&clkc CLKID_FCLK_DIV5>,
+                       <&clkc CLKID_VDIN_MEAS_COMP>;
+               clock-names = "fclk_div5", "cts_vdin_meas_clk";
+               vdin_id = <0>;
+               /*vdin write mem color depth support:
+                * bit0:support 8bit
+                * bit1:support 9bit
+                * bit2:support 10bit
+                * bit3:support 12bit
+                * bit4:support yuv422 10bit full pack mode (from txl new add)
+                * bit8:use 8bit  at 4k_50/60hz_10bit
+                * bit9:use 10bit at 4k_50/60hz_10bit
+                */
+               tv_bit_mode = <0x215>;
+               /* afbce_bit_mode: (amlogic frame buff compression encoder)
+                * 0: normal mode, not use afbce
+                * 1: use afbce non-mmu mode
+                * 2: use afbce mmu mode
+                */
+               afbce_bit_mode = <0>;
+       };
+
+       vdin@1 {
+               compatible = "amlogic, vdin";
+               memory-region = <&vdin1_cma_reserved>;
+               status = "disabled";
+               /*bit0:(1:share with codec_mm;0:cma alone)
+                *bit8:(1:alloc in discontinus way;0:alone in continuous way)
+                */
+               flag_cma = <0>;
+               interrupts = <0 85 1>;
+               rdma-irq = <4>;
+               clocks = <&clkc CLKID_FCLK_DIV5>,
+                       <&clkc CLKID_VDIN_MEAS_COMP>;
+               clock-names = "fclk_div5", "cts_vdin_meas_clk";
+               vdin_id = <1>;
+               /*vdin write mem color depth support:
+                *bit0:support 8bit
+                *bit1:support 9bit
+                *bit2:support 10bit
+                *bit3:support 12bit
+                */
+               tv_bit_mode = <0x15>;
+       };
+
+       hdmirx {
+               compatible = "amlogic, hdmirx_tl1";
+               #address-cells=<1>;
+               #size-cells=<1>;
+               memory-region = <&hdmirx_emp_cma_reserved>;
+               status = "okay";
+               pinctrl-names = "default";
+               pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux
+                       &hdmirx_c_mux>;
+               repeat = <0>;
+               interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&clkc CLKID_HDMIRX_MODET_COMP>,
+                          <&clkc CLKID_HDMIRX_CFG_COMP>,
+                          <&clkc CLKID_HDMIRX_ACR_COMP>,
+                          <&clkc CLKID_HDMIRX_METER_COMP>,
+                          <&clkc CLKID_HDMIRX_AXI_COMP>,
+                          <&xtal>,
+                          <&clkc CLKID_FCLK_DIV5>,
+                          <&clkc CLKID_FCLK_DIV7>,
+                          <&clkc CLKID_HDCP22_SKP_COMP>,
+                          <&clkc CLKID_HDCP22_ESM_COMP>;
+               //         <&clkc CLK_AUD_PLL2FS>,
+               //         <&clkc CLK_AUD_PLL4FS>,
+               //         <&clkc CLK_AUD_OUT>;
+               clock-names = "hdmirx_modet_clk",
+                       "hdmirx_cfg_clk",
+                               "hdmirx_acr_ref_clk",
+                               "cts_hdmirx_meter_clk",
+                               "cts_hdmi_axi_clk",
+                               "xtal",
+                               "fclk_div5",
+                               "fclk_div7",
+                               "hdcp_rx22_skp",
+                               "hdcp_rx22_esm";
+               //              "hdmirx_aud_pll2fs",
+               //              "hdmirx_aud_pll4f",
+               //              "clk_aud_out";
+               hdmirx_id = <0>;
+               en_4k_2_2k = <0>;
+               hpd_low_cec_off = <1>;
+               /* bit4: enable feature, bit3~0: port number */
+               disable_port = <0x0>;
+               /* MAP_ADDR_MODULE_CBUS */
+               /* MAP_ADDR_MODULE_HIU */
+               /* MAP_ADDR_MODULE_HDMIRX_CAPB3 */
+               /* MAP_ADDR_MODULE_SEC_AHB */
+               /* MAP_ADDR_MODULE_SEC_AHB2 */
+               /* MAP_ADDR_MODULE_APB4 */
+               /* MAP_ADDR_MODULE_TOP */
+               reg = < 0x0 0x0
+                       0xff63C000 0x2000
+                       0xffe0d000 0x2000
+                       0x0 0x0
+                       0x0 0x0
+                       0x0 0x0
+                       0xff610000 0xa000>;
+       };
+
+       aocec: aocec {
+               compatible = "amlogic, aocec-tl1";
+               /*device_name = "aocec";*/
+               status = "okay";
+               vendor_name = "Amlogic"; /* Max Chars: 8         */
+               /* Refer to the following URL at:
+                * http://standards.ieee.org/develop/regauth/oui/oui.txt
+                */
+               vendor_id = <0x000000>;
+               product_desc = "TL1"; /* Max Chars: 16    */
+               cec_osd_string = "AML_TV"; /* Max Chars: 14    */
+               port_num = <3>;
+               ee_cec;
+               arc_port_mask = <0x2>;
+               interrupts = <0 205 1
+                                       0 199 1>;
+               interrupt-names = "hdmi_aocecb","hdmi_aocec";
+               pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep";
+               pinctrl-0=<&aoceca_mux>;
+               pinctrl-1=<&aocecb_mux>;
+               pinctrl-2=<&aoceca_mux>;
+               reg = <0xFF80023c 0x4
+                          0xFF800000 0x400>;
+               reg-names = "ao_exit","ao";
+       };
+
+       /*DCDC for MP8756GD*/
+       cpu_opp_table0: cpu_opp_table0 {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp00 {
+                       opp-hz = /bits/ 64 <100000000>;
+                       opp-microvolt = <699000>;
+               };
+               opp01 {
+                       opp-hz = /bits/ 64 <250000000>;
+                       opp-microvolt = <699000>;
+               };
+               opp02 {
+                       opp-hz = /bits/ 64 <500000000>;
+                       opp-microvolt = <709000>;
+               };
+               opp03 {
+                       opp-hz = /bits/ 64 <667000000>;
+                       opp-microvolt = <719000>;
+               };
+               opp04 {
+                       opp-hz = /bits/ 64 <1000000000>;
+                       opp-microvolt = <729000>;
+               };
+               opp05 {
+                       opp-hz = /bits/ 64 <1200000000>;
+                       opp-microvolt = <749000>;
+               };
+               opp06 {
+                       opp-hz = /bits/ 64 <1398000000>;
+                       opp-microvolt = <769000>;
+               };
+               opp07 {
+                       opp-hz = /bits/ 64 <1512000000>;
+                       opp-microvolt = <779000>;
+               };
+               opp08 {
+                       opp-hz = /bits/ 64 <1608000000>;
+                       opp-microvolt = <789000>;
+               };
+               opp09 {
+                       opp-hz = /bits/ 64 <1704000000>;
+                       opp-microvolt = <829000>;
+               };
+               opp10 {
+                       opp-hz = /bits/ 64 <1800000000>;
+                       opp-microvolt = <879000>;
+               };
+               opp11 {
+                       opp-hz = /bits/ 64 <1908000000>;
+                       opp-microvolt = <929000>;
+               };
+       };
+
+       cpufreq-meson {
+               compatible = "amlogic, cpufreq-meson";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pwm_ao_d_pins3>;
+               status = "disabled";
+       };
+
+       tuner: tuner {
+               compatible = "amlogic, tuner";
+               status = "okay";
+               tuner_cur = <0>; /* default use tuner */
+               tuner_num = <1>; /* tuner number, multi tuner support */
+               tuner_name_0 = "mxl661_tuner";
+               tuner_i2c_adap_0 = <&i2c0>;
+               tuner_i2c_addr_0 = <0x60>;
+               tuner_xtal_0 = <1>; /* 0: 16MHz, 1: 24MHz */
+               tuner_xtal_mode_0 = <3>;
+                                       /* NO_SHARE_XTAL(0)
+                                        * SLAVE_XTAL_SHARE(3)
+                                        */
+               tuner_xtal_cap_0 = <25>; /* when tuner_xtal_mode = 3, set 25 */
+       };
+
+       atv-demod {
+               compatible = "amlogic, atv-demod";
+               status = "okay";
+               tuner = <&tuner>;
+               btsc_sap_mode = <1>;
+               /* pinctrl-names="atvdemod_agc_pins"; */
+               /* pinctrl-0=<&atvdemod_agc_pins>; */
+               reg = <0xff656000 0x2000 /* demod reg */
+                               0xff63c000 0x2000 /* hiu reg */
+                               0xff634000 0x2000 /* periphs reg */
+                               0xff64a000 0x2000>; /* audio reg */
+               reg_23cf = <0x88188832>;
+               /*default:0x88188832;r840 on haier:0x48188832*/
+       };
+
+       sd_emmc_b: sd@ffe05000 {
+               status = "disabled";
+               compatible = "amlogic, meson-mmc-tl1";
+               reg = <0xffe05000 0x800>;
+               interrupts = <0 190 1>;
+
+               pinctrl-names = "sd_all_pins",
+                       "sd_clk_cmd_pins",
+                       "sd_1bit_pins";
+               pinctrl-0 = <&sd_all_pins>;
+               pinctrl-1 = <&sd_clk_cmd_pins>;
+               pinctrl-2 = <&sd_1bit_pins>;
+
+               clocks = <&clkc CLKID_SD_EMMC_B>,
+                       <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+                       <&clkc CLKID_FCLK_DIV2>,
+                       <&clkc CLKID_FCLK_DIV5>,
+                       <&xtal>;
+               clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+               bus-width = <4>;
+               cap-sd-highspeed;
+               cap-mmc-highspeed;
+               max-frequency = <100000000>;
+               disable-wp;
+               sd {
+                       pinname = "sd";
+                       ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+                       caps = "MMC_CAP_4_BIT_DATA",
+                               "MMC_CAP_MMC_HIGHSPEED",
+                               "MMC_CAP_SD_HIGHSPEED",
+                               "MMC_CAP_NONREMOVABLE"; /**ptm debug */
+                       f_min = <400000>;
+                       f_max = <200000000>;
+                       max_req_size = <0x20000>; /**128KB*/
+                       no_sduart = <1>;
+                       gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
+                       jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
+                       gpio_cd = <&gpio GPIOC_10 GPIO_ACTIVE_HIGH>;
+                       card_type = <5>;
+                       /* 3:sdio device(ie:sdio-wifi),
+                        * 4:SD combo (IO+mem) card
+                        */
+               };
+       };
+}; /* end of / */
+
+&i2c0 {
+       status = "okay";
+       clock-frequency = <300000>;
+       pinctrl-names="default";
+       pinctrl-0=<&i2c0_dv_pins>;
+};
+
+&audiobus {
+       tdma:tdm@0 {
+               compatible = "amlogic, tl1-snd-tdma";
+               #sound-dai-cells = <0>;
+
+               dai-tdm-lane-slot-mask-in = <1 0>;
+               dai-tdm-lane-slot-mask-out = <1 0>;
+               dai-tdm-clk-sel = <0>;
+
+               clocks = <&clkaudio CLKID_AUDIO_MCLK_A
+                               &clkc CLKID_MPLL0>;
+               clock-names = "mclk", "clk_srcpll";
+
+               pinctrl-names = "tdm_pins";
+               pinctrl-0 = <&tdma_mclk &tdmout_a &tdmin_a>;
+
+               status = "okay";
+       };
+
+       tdmb:tdm@1 {
+               compatible = "amlogic, tl1-snd-tdmb";
+               #sound-dai-cells = <0>;
+
+               dai-tdm-lane-slot-mask-in = <1 0 0 0>;
+               dai-tdm-lane-slot-mask-out = <1 0 0 0>;
+               dai-tdm-clk-sel = <1>;
+
+               clocks = <&clkaudio CLKID_AUDIO_MCLK_B
+                               &clkc CLKID_MPLL1>;
+               clock-names = "mclk", "clk_srcpll";
+
+               status = "okay";
+       };
+
+       tdmc:tdm@2 {
+               compatible = "amlogic, tl1-snd-tdmc";
+               #sound-dai-cells = <0>;
+
+               dai-tdm-lane-slot-mask-in = <1 0 0 0>;
+               dai-tdm-lane-slot-mask-out = <1 0 0 0>;
+               dai-tdm-clk-sel = <2>;
+
+               clocks = <&clkaudio CLKID_AUDIO_MCLK_C
+                               &clkc CLKID_MPLL2>;
+               clock-names = "mclk", "clk_srcpll";
+
+               pinctrl-names = "tdm_pins";
+               pinctrl-0 = <&tdmout_c &tdmin_c>;
+
+               status = "okay";
+       };
+
+       spdifa:spdif@0 {
+               compatible = "amlogic, tl1-snd-spdif-a";
+               #sound-dai-cells = <0>;
+
+               clocks = <&clkc CLKID_MPLL0
+                               &clkc CLKID_FCLK_DIV4
+                               &clkaudio CLKID_AUDIO_GATE_SPDIFIN
+                               &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_A
+                               &clkaudio CLKID_AUDIO_SPDIFIN
+                               &clkaudio CLKID_AUDIO_SPDIFOUT_A>;
+               clock-names = "sysclk", "fixed_clk", "gate_spdifin",
+                               "gate_spdifout", "clk_spdifin", "clk_spdifout";
+
+               interrupts =
+                               <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
+               interrupt-names = "irq_spdifin";
+
+               pinctrl-names = "spdif_pins";
+               pinctrl-0 = <&spdifout_a &spdifin_a>;
+
+               /*
+                * whether do asrc for pcm and resample a or b
+                * if raw data, asrc is disabled automatically
+                * 0: "Disable",
+                * 1: "Enable:32K",
+                * 2: "Enable:44K",
+                * 3: "Enable:48K",
+                * 4: "Enable:88K",
+                * 5: "Enable:96K",
+                * 6: "Enable:176K",
+                * 7: "Enable:192K",
+                */
+               asrc_id = <0>;
+               auto_asrc = <0>;
+
+               status = "okay";
+       };
+
+       spdifb:spdif@1 {
+               compatible = "amlogic, tl1-snd-spdif-b";
+               #sound-dai-cells = <0>;
+
+               clocks = <&clkc CLKID_MPLL0 /*CLKID_HIFI_PLL*/
+                               &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_B
+                               &clkaudio CLKID_AUDIO_SPDIFOUT_B>;
+               clock-names = "sysclk",
+                               "gate_spdifout", "clk_spdifout";
+
+               status = "okay";
+       };
+
+       pdm:pdm {
+               compatible = "amlogic, tl1-snd-pdm";
+               #sound-dai-cells = <0>;
+
+               clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+                       &clkc CLKID_FCLK_DIV3
+                       &clkc CLKID_MPLL3
+                       &clkaudio CLKID_AUDIO_PDMIN0
+                       &clkaudio CLKID_AUDIO_PDMIN1>;
+               clock-names = "gate",
+                       "sysclk_srcpll",
+                       "dclk_srcpll",
+                       "pdm_dclk",
+                       "pdm_sysclk";
+
+               pinctrl-names = "pdm_pins";
+               pinctrl-0 = <&pdmin>;
+
+               /* mode 0~4, defalut:1 */
+               filter_mode = <1>;
+
+               status = "okay";
+       };
+
+       extn:extn {
+               compatible = "amlogic, snd-extn";
+               #sound-dai-cells = <0>;
+
+               interrupts =
+                               <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
+               interrupt-names = "irq_frhdmirx";
+
+               status = "okay";
+       };
+
+       aed:effect {
+               compatible = "amlogic, snd-effect-v2";
+               #sound-dai-cells = <0>;
+
+               clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
+                       &clkc CLKID_FCLK_DIV5
+                       &clkaudio CLKID_AUDIO_EQDRC>;
+               clock-names = "gate", "clk_srcpll", "eqdrc";
+
+               eq_enable = <1>;
+               multiband_drc_enable = <0>;
+               fullband_drc_enable = <0>;
+               /*
+                * 0:tdmout_a
+                * 1:tdmout_b
+                * 2:tdmout_c
+                * 3:spdifout
+                * 4:spdifout_b
+                */
+               eqdrc_module = <1>;
+               /* max 0xf, each bit for one lane, usually one lane */
+               lane_mask = <0x1>;
+               /* max 0xff, each bit for one channel */
+               channel_mask = <0x3>;
+
+               status = "disabled";
+       };
+
+       asrca: resample@0 {
+               compatible = "amlogic, tl1-resample-a";
+               clocks = <&clkc CLKID_MPLL3
+                               &clkaudio CLKID_AUDIO_MCLK_F
+                               &clkaudio CLKID_AUDIO_RESAMPLE_A>;
+               clock-names = "resample_pll", "resample_src", "resample_clk";
+               /*same with toddr_src
+                *      TDMIN_A, 0
+                *      TDMIN_B, 1
+                *      TDMIN_C, 2
+                *      SPDIFIN, 3
+                *      PDMIN,  4
+                *      NONE,
+                *      TDMIN_LB, 6
+                *      LOOPBACK, 7
+                */
+               resample_module = <3>;
+
+               status = "disabled";
+       };
+
+       asrcb: resample@1 {
+               compatible = "amlogic, tl1-resample-b";
+
+               clocks = <&clkc CLKID_MPLL3
+                       &clkaudio CLKID_AUDIO_MCLK_F
+                       &clkaudio CLKID_AUDIO_RESAMPLE_B>;
+               clock-names = "resample_pll", "resample_src", "resample_clk";
+
+               /*same with toddr_src
+                *      TDMIN_A, 0
+                *      TDMIN_B, 1
+                *      TDMIN_C, 2
+                *      SPDIFIN, 3
+                *      PDMIN,  4
+                *      NONE,
+                *      TDMIN_LB, 6
+                *      LOOPBACK, 7
+                */
+               resample_module = <3>;
+
+               status = "disabled";
+       };
+
+}; /* end of audiobus */
+&pinctrl_periphs {
+       /* audio pin mux */
+
+       tdma_mclk: tdma_mclk {
+               mux { /* GPIOZ_0 */
+                       groups = "mclk0_z";
+                       function = "mclk0";
+               };
+       };
+
+       tdmout_a: tdmout_a {
+               mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3, GPIOZ_5, GPIOZ_6 */
+                       groups = "tdma_sclk_z",
+                               "tdma_fs_z",
+                               "tdma_dout0_z",
+                               "tdma_dout2_z",
+                               "tdma_dout3_z";
+                       function = "tdma_out";
+               };
+       };
+
+       tdmin_a: tdmin_a {
+               mux { /* GPIOZ_9 */
+                       groups = "tdma_din2_z";
+                       function = "tdma_in";
+               };
+       };
+
+       tdmout_c: tdmout_c {
+               mux { /* GPIODV_7, GPIODV_8, GPIODV_9 */
+                       groups = "tdmc_sclk",
+                               "tdmc_fs",
+                               "tdmc_dout0";
+                       function = "tdmc_out";
+               };
+       };
+
+       tdmin_c: tdmin_c {
+               mux { /* GPIODV_10 */
+                       groups = "tdmc_din1";
+                       function = "tdmc_in";
+               };
+       };
+
+       spdifin_a: spdifin_a {
+               mux { /* GPIODV_5 */
+                       groups = "spdif_in";
+                       function = "spdif_in";
+               };
+       };
+
+       spdifout_a: spdifout_a {
+               mux { /* GPIODV_4 */
+                       groups = "spdif_out_dv4";
+                       function = "spdif_out";
+               };
+       };
+
+       pdmin: pdmin {
+               mux { /* GPIOZ_7, GPIOZ_8*/
+                       groups = "pdm_dclk_z",
+                               "pdm_din0_z";
+                       function = "pdm";
+               };
+       };
+
+
+}; /* end of pinctrl_periphs */
+
+&pinctrl_aobus {
+       spdifout: spdifout {
+               mux { /* gpiao_10 */
+                       groups = "spdif_out_ao";
+                       function = "spdif_out_ao";
+               };
+       };
+};  /* end of pinctrl_aobus */
+
+&sd_emmc_b {
+       status = "disabled";
+       sd {
+               caps = "MMC_CAP_4_BIT_DATA",
+                       "MMC_CAP_MMC_HIGHSPEED",
+                       "MMC_CAP_SD_HIGHSPEED",
+                       "MMC_CAP_NONREMOVABLE"; /**ptm debug */
+               f_min = <400000>;
+               f_max = <200000000>;
+       };
+};
+
+&spifc {
+       status = "disabled";
+       spi-nor@0 {
+               cs_gpios = <&gpio BOOT_13 GPIO_ACTIVE_HIGH>;
+       };
+};
+
+&slc_nand {
+       status = "disabled";
+       plat-names = "bootloader", "nandnormal";
+       plat-num = <2>;
+       plat-part-0 = <&bootloader>;
+       plat-part-1 = <&nandnormal>;
+       bootloader: bootloader{
+               enable_pad = "ce0";
+               busy_pad = "rb0";
+               timming_mode = "mode5";
+               bch_mode = "bch8_1k";
+               t_rea = <20>;
+               t_rhoh = <15>;
+               chip_num = <1>;
+               part_num = <0>;
+               rb_detect = <1>;
+       };
+       nandnormal: nandnormal{
+               enable_pad = "ce0";
+               busy_pad = "rb0";
+               timming_mode = "mode5";
+               bch_mode = "bch8_1k";
+               plane_mode = "twoplane";
+               t_rea = <20>;
+               t_rhoh = <15>;
+               chip_num = <2>;
+               part_num = <3>;
+               partition = <&nand_partitions>;
+               rb_detect = <1>;
+       };
+       nand_partitions:nand_partition{
+               /*
+                * if bl_mode is 1, tpl size was generate by
+                * fip_copies * fip_size which
+                * will not skip bad when calculating
+                * the partition size;
+                *
+                * if bl_mode is 0,
+                * tpl partition must be comment out.
+                */
+               tpl{
+                       offset=<0x0 0x0>;
+                       size=<0x0 0x0>;
+               };
+               logo{
+                       offset=<0x0 0x0>;
+                       size=<0x0 0x200000>;
+               };
+               recovery{
+                       offset=<0x0 0x0>;
+                       size=<0x0 0x1000000>;
+               };
+               boot{
+                       offset=<0x0 0x0>;
+                       size=<0x0 0x1000000>;
+               };
+               system{
+                       offset=<0x0 0x0>;
+                       size=<0x0 0x4000000>;
+               };
+               data{
+                       offset=<0xffffffff 0xffffffff>;
+                       size=<0x0 0x0>;
+               };
+       };
+};
+
+&dwc3 {
+       status = "disabled";
+};
+
+&usb2_phy_v2 {
+       status = "disabled";
+       portnum = <3>;
+};
+
+&usb3_phy_v2 {
+       status = "disabled";
+       portnum = <0>;
+       otg = <0>;
+};
+
+&dwc2_a {
+       status = "disabled";
+       /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
+       controller-type = <1>;
+};
+
+&spicc0 {
+       status = "disabled";
+       pinctrl-names = "default";
+       pinctrl-0 = <&spicc0_pins_h>;
+       cs-gpios = <&gpio GPIOH_20 0>;
+};
+
+&meson_fb {
+       status = "okay";
+       display_size_default = <1920 1080 1920 2160 32>;
+       mem_size = <0x00800000 0x1980000 0x100000 0x800000>;
+       logo_addr = "0x7f800000";
+       mem_alloc = <1>;
+       pxp_mode = <1>; /** 0:normal mode 1:pxp mode */
+};
+
+&pwm_AO_cd {
+       status = "disabled";
+};
+
+&efuse {
+       status = "disabled";
+};
diff --git a/arch/arm64/boot/dts/amlogic/mesontm2.dtsi b/arch/arm64/boot/dts/amlogic/mesontm2.dtsi
new file mode 100644 (file)
index 0000000..b9736ff
--- /dev/null
@@ -0,0 +1,2124 @@
+/*
+ * arch/arm64/boot/dts/amlogic/mesontl1.dtsi
+ *
+ * Copyright (C) 2018 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/gpio/meson-tl1-gpio.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/meson_rc.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/pwm/meson.h>
+#include <dt-bindings/clock/amlogic,tl1-clkc.h>
+#include <dt-bindings/clock/amlogic,tl1-audio-clk.h>
+#include "mesong12a-bifrost.dtsi"
+#include <dt-bindings/iio/adc/amlogic-saradc.h>
+/ {
+       interrupt-parent = <&gic>;
+       #address-cells = <2>;
+       #size-cells = <2>;
+
+       cpus:cpus {
+               #address-cells = <2>;
+               #size-cells = <0>;
+               #cooling-cells = <2>;/* min followed by max */
+               CPU0:cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a53","arm,armv8";
+                       reg = <0x0 0x0>;
+                       //timer=<&timer_a>;
+                       enable-method = "psci";
+                       clocks = <&clkc CLKID_CPU_CLK>,
+                               <&clkc CLKID_CPU_FCLK_P>,
+                               <&clkc CLKID_SYS_PLL>;
+                       clock-names = "core_clk",
+                               "low_freq_clk_parent",
+                               "high_freq_clk_parent";
+                       operating-points-v2 = <&cpu_opp_table0>;
+                       cpu-supply = <&vddcpu0>;
+                       //cpu-idle-states = <&SYSTEM_SLEEP_0>;
+                       voltage-tolerance = <0>;
+                       clock-latency = <50000>;
+               };
+
+               CPU1:cpu@1 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a53","arm,armv8";
+                       reg = <0x0 0x1>;
+                       //timer=<&timer_b>;
+                       enable-method = "psci";
+                       clocks = <&clkc CLKID_CPU_CLK>,
+                               <&clkc CLKID_CPU_FCLK_P>,
+                               <&clkc CLKID_SYS_PLL>;
+                       clock-names = "core_clk",
+                               "low_freq_clk_parent",
+                               "high_freq_clk_parent";
+                       operating-points-v2 = <&cpu_opp_table0>;
+                       cpu-supply = <&vddcpu0>;
+                       //cpu-idle-states = <&SYSTEM_SLEEP_0>;
+                       voltage-tolerance = <0>;
+                       clock-latency = <50000>;
+               };
+
+               CPU2:cpu@2 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a53","arm,armv8";
+                       reg = <0x0 0x2>;
+                       //timer=<&timer_c>;
+                       enable-method = "psci";
+                       clocks = <&clkc CLKID_CPU_CLK>,
+                               <&clkc CLKID_CPU_FCLK_P>,
+                               <&clkc CLKID_SYS_PLL>;
+                       clock-names = "core_clk",
+                               "low_freq_clk_parent",
+                               "high_freq_clk_parent";
+                       operating-points-v2 = <&cpu_opp_table0>;
+                       cpu-supply = <&vddcpu0>;
+                       //cpu-idle-states = <&SYSTEM_SLEEP_0>;
+                       voltage-tolerance = <0>;
+                       clock-latency = <50000>;
+               };
+
+               CPU3:cpu@3 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a53","arm,armv8";
+                       reg = <0x0 0x3>;
+                       //timer=<&timer_d>;
+                       enable-method = "psci";
+                       clocks = <&clkc CLKID_CPU_CLK>,
+                               <&clkc CLKID_CPU_FCLK_P>,
+                               <&clkc CLKID_SYS_PLL>;
+                       clock-names = "core_clk",
+                               "low_freq_clk_parent",
+                               "high_freq_clk_parent";
+                       operating-points-v2 = <&cpu_opp_table0>;
+                       cpu-supply = <&vddcpu0>;
+                       //cpu-idle-states = <&SYSTEM_SLEEP_0>;
+                       voltage-tolerance = <0>;
+                       clock-latency = <50000>;
+               };
+       };
+
+       timer {
+               compatible = "arm,armv8-timer";
+               interrupts = <GIC_PPI 13 0xff01>,
+                            <GIC_PPI 14 0xff01>,
+                            <GIC_PPI 11 0xff01>,
+                            <GIC_PPI 10 0xff01>;
+       };
+
+       timer_bc {
+               compatible = "arm, meson-bc-timer";
+               reg = <0x0 0xffd0f190  0x0 0x4  0x0 0xffd0f194  0x0 0x4>;
+               timer_name = "Meson TimerF";
+               clockevent-rating =<300>;
+               clockevent-shift =<20>;
+               clockevent-features =<0x23>;
+               interrupts = <0 60 1>;
+               bit_enable =<16>;
+               bit_mode =<12>;
+               bit_resolution =<0>;
+       };
+
+       arm_pmu {
+               compatible = "arm,armv8-pmuv3";
+               /* clusterb-enabled; */
+               interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+               reg = <0x0 0xff634680 0x0 0x4>;
+               cpumasks = <0xf>;
+               /* default 10ms */
+               relax-timer-ns = <10000000>;
+               /* default 10000us */
+               max-wait-cnt = <10000>;
+       };
+
+       gic: interrupt-controller@2c001000 {
+               compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+               #interrupt-cells = <3>;
+               #address-cells = <2>;
+               interrupt-controller;
+               reg = <0x0 0xffc01000 0x0 0x1000>,
+                     <0x0 0xffc02000 0x0 0x0100>;
+               interrupts = <GIC_PPI 9 0xf04>;
+       };
+
+       psci {
+               compatible = "arm,psci-0.2";
+               method = "smc";
+       };
+
+       secmon {
+               compatible = "amlogic, secmon";
+               memory-region = <&secmon_reserved>;
+               in_base_func = <0x82000020>;
+               out_base_func = <0x82000021>;
+               reserve_mem_size = <0x00300000>;
+       };
+
+       securitykey {
+               compatible = "amlogic, securitykey";
+               status = "okay";
+               storage_query = <0x82000060>;
+               storage_read = <0x82000061>;
+               storage_write = <0x82000062>;
+               storage_tell = <0x82000063>;
+               storage_verify = <0x82000064>;
+               storage_status = <0x82000065>;
+               storage_list = <0x82000067>;
+               storage_remove = <0x82000068>;
+               storage_in_func = <0x82000023>;
+               storage_out_func = <0x82000024>;
+               storage_block_func = <0x82000025>;
+               storage_size_func = <0x82000027>;
+               storage_set_enctype = <0x8200006A>;
+               storage_get_enctype = <0x8200006B>;
+               storage_version = <0x8200006C>;
+       };
+
+       mailbox: mhu@ff63c400 {
+               status = "disabled";
+               compatible = "amlogic, meson_mhu";
+               reg = <0x0 0xff63c400 0x0 0x4c>,   /* MHU registers */
+                     <0x0 0xfffd7000 0x0 0x800>;   /* Payload area */
+               interrupts = <0 209 1>,   /* low priority interrupt */
+                            <0 210 1>;   /* high priority interrupt */
+               #mbox-cells = <1>;
+               mbox-names = "cpu_to_scp_low", "cpu_to_scp_high";
+               mboxes = <&mailbox 0 &mailbox 1>;
+       };
+
+       cpu_iomap {
+               compatible = "amlogic, iomap";
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               io_cbus_base {
+                       reg = <0x0 0xffd00000 0x0 0x101000>;
+               };
+               io_apb_base {
+                       reg = <0x0 0xffe01000 0x0 0x19f000>;
+               };
+               io_aobus_base {
+                       reg = <0x0 0xff800000 0x0 0x100000>;
+               };
+               io_vapb_base {
+                       reg = <0x0 0xff900000 0x0 0x200000>;
+               };
+               io_hiu_base {
+                       reg = <0x0 0xff63c000 0x0 0x2000>;
+               };
+       };
+
+       xtal: xtal-clk {
+               compatible = "fixed-clock";
+               clock-frequency = <24000000>;
+               clock-output-names = "xtal";
+               #clock-cells = <0>;
+       };
+
+       meson_suspend: pm {
+               compatible = "amlogic, pm";
+               /*gxbaby-suspend;*/
+               status = "okay";
+               reg = <0x0 0xff8000a8 0x0 0x4>,
+                       <0x0 0xff80023c 0x0 0x4>;
+       };
+
+       cpuinfo {
+               compatible = "amlogic, cpuinfo";
+               status = "okay";
+               cpuinfo_cmd = <0x82000044>;
+       };
+
+       reboot {
+               compatible = "amlogic,reboot";
+               sys_reset = <0x84000009>;
+               sys_poweroff = <0x84000008>;
+       };
+
+       ram-dump {
+               compatible = "amlogic, ram_dump";
+               status = "okay";
+               reg = <0x0 0xFF6345E0 0x0 4>;
+               reg-names = "PREG_STICKY_REG8";
+       };
+
+       securitykey {
+               compatible = "amlogic, securitykey";
+               status = "disabled";
+               storage_query = <0x82000060>;
+               storage_read = <0x82000061>;
+               storage_write = <0x82000062>;
+               storage_tell = <0x82000063>;
+               storage_verify = <0x82000064>;
+               storage_status = <0x82000065>;
+               storage_list = <0x82000067>;
+               storage_remove = <0x82000068>;
+               storage_in_func = <0x82000023>;
+               storage_out_func = <0x82000024>;
+               storage_block_func = <0x82000025>;
+               storage_size_func = <0x82000027>;
+               storage_set_enctype = <0x8200006A>;
+               storage_get_enctype = <0x8200006B>;
+               storage_version = <0x8200006C>;
+       };
+
+       vpu {
+               compatible = "amlogic, vpu-tl1";
+               status = "okay";
+               clocks = <&clkc CLKID_VAPB_MUX>,
+                       <&clkc CLKID_VPU_INTR>,
+                       <&clkc CLKID_VPU_P0_COMP>,
+                       <&clkc CLKID_VPU_P1_COMP>,
+                       <&clkc CLKID_VPU_MUX>;
+               clock-names = "vapb_clk",
+                       "vpu_intr_gate",
+                       "vpu_clk0",
+                       "vpu_clk1",
+                       "vpu_clk";
+               clk_level = <7>;
+               /* 0: 100.0M    1: 166.7M    2: 200.0M    3: 250.0M */
+               /* 4: 333.3M    5: 400.0M    6: 500.0M    7: 666.7M */
+       };
+
+       ethmac: ethernet@ff3f0000 {
+               compatible = "amlogic, g12a-eth-dwmac","snps,dwmac";
+               reg = <0x0 0xff3f0000 0x0 0x10000
+                       0x0 0xff634540 0x0 0x8
+                       0x0 0xff64c000 0x0 0xa0>;
+               reg-names = "eth_base", "eth_cfg", "eth_pll";
+               interrupts = <0 8 1>;
+               interrupt-names = "macirq";
+               status = "disabled";
+               clocks = <&clkc CLKID_ETH_CORE>;
+               clock-names = "ethclk81";
+               pll_val = <0x9c0040a 0x927e0000 0xac5f49e5>;
+               analog_val = <0x20200000 0x0000c000 0x00000023>;
+       };
+
+       pinctrl_aobus: pinctrl@ff800014 {
+               compatible = "amlogic,meson-tl1-aobus-pinctrl";
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               gpio_ao: ao-bank@ff800014 {
+                       reg = <0x0 0xff800014 0x0 0x8>,
+                                 <0x0 0xff800024 0x0 0x14>,
+                                 <0x0 0xff80001c 0x0 0x8>;
+                       reg-names = "mux", "gpio", "drive-strength";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               aoceca_mux:aoceca_mux {
+                       mux {
+                               groups = "cec_ao_a";
+                               function = "cec_ao";
+                       };
+               };
+
+               aocecb_mux:aocecb_mux {
+                       mux {
+                               groups = "cec_ao_b";
+                               function = "cec_ao";
+                       };
+               };
+       };
+
+       pinctrl_periphs: pinctrl@ff6346c0 {
+               compatible = "amlogic,meson-tl1-periphs-pinctrl";
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               gpio: banks@ff6346c0 {
+                       reg = <0x0 0xff6346c0 0x0 0x40>,
+                                 <0x0 0xff6344e8 0x0 0x18>,
+                                 <0x0 0xff634520 0x0 0x18>,
+                                 <0x0 0xff634440 0x0 0x4c>,
+                                 <0x0 0xff634740 0x0 0x1c>;
+                       reg-names = "mux",
+                               "pull",
+                               "pull-enable",
+                               "gpio",
+                               "drive-strength";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+
+               hdmirx_a_mux:hdmirx_a_mux {
+                       mux {
+                               groups = "hdmirx_a_hpd", "hdmirx_a_det",
+                                       "hdmirx_a_sda", "hdmirx_a_sck";
+                               function = "hdmirx_a";
+                       };
+               };
+
+               hdmirx_b_mux:hdmirx_b_mux {
+                       mux {
+                               groups = "hdmirx_b_hpd", "hdmirx_b_det",
+                                       "hdmirx_b_sda", "hdmirx_b_sck";
+                               function = "hdmirx_b";
+                       };
+               };
+
+               hdmirx_c_mux:hdmirx_c_mux {
+                       mux {
+                               groups = "hdmirx_c_hpd", "hdmirx_c_det",
+                                       "hdmirx_c_sda", "hdmirx_c_sck";
+                               function = "hdmirx_c";
+                       };
+               };
+
+       };
+
+       dwc3: dwc3@ff500000 {
+               compatible = "synopsys, dwc3";
+               status = "disabled";
+               reg = <0x0 0xff500000 0x0 0x100000>;
+               interrupts = <0 30 4>;
+               usb-phy = <&usb2_phy_v2>, <&usb3_phy_v2>;
+               cpu-type = "gxl";
+               clock-src = "usb3.0";
+               clocks = <&clkc CLKID_USB_GENERAL>;
+               clock-names = "dwc_general";
+       };
+
+       usb2_phy_v2: usb2phy@ffe09000 {
+               compatible = "amlogic, amlogic-new-usb2-v2";
+               status = "disabled";
+               reg = <0x0 0xffe09000 0x0 0x80
+                               0x0 0xffd01008 0x0 0x100
+                               0x0 0xff636000 0x0 0x2000
+                               0x0 0xff63a000 0x0 0x2000
+                               0x0 0xff658000 0x0 0x2000>;
+               pll-setting-1 = <0x09400414>;
+               pll-setting-2 = <0x927E0000>;
+               pll-setting-3 = <0xac5f69e5>;
+               pll-setting-4 = <0xfe18>;
+               pll-setting-5 = <0x8000fff>;
+               pll-setting-6 = <0x78000>;
+               pll-setting-7 = <0xe0004>;
+               pll-setting-8 = <0xe000c>;
+               version = <1>;
+       };
+
+       usb3_phy_v2: usb3phy@ffe09080 {
+               compatible = "amlogic, amlogic-new-usb3-v2";
+               status = "disabled";
+               reg = <0x0 0xffe09080 0x0 0x20>;
+               phy-reg = <0xff646000>;
+               phy-reg-size = <0x2000>;
+               usb2-phy-reg = <0xffe09000>;
+               usb2-phy-reg-size = <0x80>;
+               interrupts = <0 16 4>;
+       };
+
+       dwc2_a: dwc2_a@ff400000 {
+               compatible = "amlogic, dwc2";
+               status = "disabled";
+               device_name = "dwc2_a";
+               reg = <0x0 0xff400000 0x0 0x40000>;
+               interrupts = <0 31 4>;
+               pl-periph-id = <0>; /** lm name */
+               clock-src = "usb0"; /** clock src */
+               port-id = <0>;  /** ref to mach/usb.h */
+               port-type = <2>;        /** 0: otg, 1: host, 2: slave */
+               port-speed = <0>; /** 0: default, high, 1: full */
+               port-config = <0>; /** 0: default */
+               /*0:default,1:single,2:incr,3:incr4,4:incr8,5:incr16,6:disable*/
+               port-dma = <0>;
+               port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
+               usb-fifo = <728>;
+               cpu-type = "v2";
+               phy-reg = <0xffe09000>;
+               phy-reg-size = <0xa0>;
+               /** phy-interface: 0x0: amlogic-v1 phy, 0x1: synopsys phy **/
+               /**                0x2: amlogic-v2 phy                    **/
+               phy-interface = <0x2>;
+               clocks = <&clkc CLKID_USB_GENERAL
+                                       &clkc CLKID_USB1_TO_DDR>;
+               clock-names = "usb_general",
+                                       "usb1";
+       };
+
+       wdt: watchdog@0xffd0f0d0 {
+               compatible = "amlogic, meson-wdt";
+               status = "disabled";
+               default_timeout=<10>;
+               reset_watchdog_method=<1>; /* 0:sysfs,1:kernel */
+               reset_watchdog_time=<2>;
+               shutdown_timeout=<10>;
+               firmware_timeout=<6>;
+               suspend_timeout=<6>;
+               reg = <0x0 0xffd0f0d0 0x0 0x10>;
+               clock-names = "xtal";
+               clocks = <&xtal>;
+       };
+
+       jtag {
+               compatible = "amlogic, jtag";
+               status = "okay";
+               select = "disable"; /* disable/apao */
+               pinctrl-names="jtag_apao_pins";
+               pinctrl-0=<&jtag_apao_pins>;
+       };
+
+       saradc:saradc {
+               compatible = "amlogic,meson-g12a-saradc";
+               status = "disabled";
+               #io-channel-cells = <1>;
+               clocks = <&xtal>, <&clkc CLKID_SARADC_GATE>;
+               clock-names = "xtal", "saradc_clk";
+               interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>;
+               reg = <0x0 0xff809000 0x0 0x48>;
+       };
+
+       vddcpu0: pwmao_d-regulator {
+               compatible = "pwm-regulator";
+               pwms = <&pwm_AO_cd MESON_PWM_1 1500 0>;
+               regulator-name = "vddcpu0";
+               regulator-min-microvolt = <689000>;
+               regulator-max-microvolt = <1049000>;
+               regulator-always-on;
+               max-duty-cycle = <1500>;
+               /* Voltage Duty-Cycle */
+               voltage-table = <1049000 0>,
+                               <1039000 3>,
+                               <1029000 6>,
+                               <1019000 8>,
+                               <1009000 11>,
+                               <999000 14>,
+                               <989000 17>,
+                               <979000 20>,
+                               <969000 23>,
+                               <959000 26>,
+                               <949000 29>,
+                               <939000 31>,
+                               <929000 34>,
+                               <919000 37>,
+                               <909000 40>,
+                               <899000 43>,
+                               <889000 45>,
+                               <879000 48>,
+                               <869000 51>,
+                               <859000 54>,
+                               <849000 56>,
+                               <839000 59>,
+                               <829000 62>,
+                               <819000 65>,
+                               <809000 68>,
+                               <799000 70>,
+                               <789000 73>,
+                               <779000 76>,
+                               <769000 79>,
+                               <759000 81>,
+                               <749000 84>,
+                               <739000 87>,
+                               <729000 89>,
+                               <719000 92>,
+                               <709000 95>,
+                               <699000 98>,
+                               <689000 100>;
+                               status = "disabled";
+       };
+
+       aml_dma {
+               compatible = "amlogic,aml_txlx_dma";
+               reg = <0x0 0xff63e000 0x0 0x48>;
+               interrupts = <0 180 1>;
+
+               aml_aes {
+                       compatible = "amlogic,aes_g12a_dma";
+                       dev_name = "aml_aes_dma";
+                       status = "okay";
+               };
+
+               aml_sha {
+                       compatible = "amlogic,sha_dma";
+                       dev_name = "aml_sha_dma";
+                       status = "okay";
+               };
+       };
+
+       rng {
+               compatible = "amlogic,meson-rng";
+               status = "okay";
+               #address-cells = <2>;
+               #size-cells = <2>;
+               reg = <0x0 0xff630218 0x0 0x4>;
+               quality = /bits/ 16 <1000>;
+       };
+
+       soc {
+               compatible = "simple-bus";
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               hiubus: hiubus@ff63c000 {
+                       compatible = "simple-bus";
+                       reg = <0x0 0xff63c000 0x0 0x2000>;
+                       #address-cells = <2>;
+                       #size-cells = <2>;
+                       ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x2000>;
+
+                       clkc: clock-controller@0 {
+                               compatible = "amlogic,tl1-clkc";
+                               #clock-cells = <1>;
+                               reg = <0x0 0x0 0x0 0x3fc>;
+                       };
+               };/* end of hiubus*/
+
+               audiobus: audiobus@0xff600000 {
+                       compatible = "amlogic, audio-controller", "simple-bus";
+                       #address-cells = <2>;
+                       #size-cells = <2>;
+                       reg = <0x0 0xff600000 0x0 0x10000>;
+                       ranges = <0x0 0x0 0x0 0xff600000 0x0 0x10000>;
+
+                       clkaudio:audio_clocks {
+                               compatible = "amlogic, tl1-audio-clocks";
+                               #clock-cells = <1>;
+                               reg = <0x0 0x0 0x0 0xb0>;
+                       };
+
+                       ddr_manager {
+                               compatible = "amlogic, tl1-audio-ddr-manager";
+                               interrupts = <
+                                       GIC_SPI 148 IRQ_TYPE_EDGE_RISING
+                                       GIC_SPI 149 IRQ_TYPE_EDGE_RISING
+                                       GIC_SPI 150 IRQ_TYPE_EDGE_RISING
+                                       GIC_SPI 48 IRQ_TYPE_EDGE_RISING
+                                       GIC_SPI 152 IRQ_TYPE_EDGE_RISING
+                                       GIC_SPI 153 IRQ_TYPE_EDGE_RISING
+                                       GIC_SPI 154 IRQ_TYPE_EDGE_RISING
+                                       GIC_SPI 49 IRQ_TYPE_EDGE_RISING
+                               >;
+                               interrupt-names =
+                                       "toddr_a", "toddr_b", "toddr_c",
+                                       "toddr_d",
+                                       "frddr_a", "frddr_b", "frddr_c",
+                                       "frddr_d";
+                       };
+               };/* end of audiobus*/
+
+               /* Sound iomap */
+               aml_snd_iomap {
+                       compatible = "amlogic, snd-iomap";
+                       status = "okay";
+                       #address-cells=<2>;
+                       #size-cells=<2>;
+                       ranges;
+                       pdm_bus {
+                               reg = <0x0 0xFF601000 0x0 0x400>;
+                       };
+                       audiobus_base {
+                               reg = <0x0 0xFF600000 0x0 0x1000>;
+                       };
+                       audiolocker_base {
+                               reg = <0x0 0xFF601400 0x0 0x400>;
+                       };
+                       eqdrc_base {
+                               reg = <0x0 0xFF602000 0x0 0x2000>;
+                       };
+                       reset_base {
+                               reg = <0x0 0xFFD01000 0x0 0x1000>;
+                       };
+                       vad_base {
+                               reg = <0x0 0xFF601800 0x0 0x800>;
+                       };
+               };
+
+               cbus: cbus@ffd00000 {
+                       compatible = "simple-bus";
+                       reg = <0x0 0xffd00000 0x0 0x27000>;
+                       #address-cells = <2>;
+                       #size-cells = <2>;
+                       ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x27000>;
+
+                       clk-measure@18004 {
+                               compatible = "amlogic,tl1-measure";
+                               reg = <0x0 0x18004 0x0 0x4 0x0 0x1800c 0x0 0x4>;
+                               ringctrl = <0xff6345fc>;
+                       };
+
+                       i2c0: i2c@1f000 {
+                               compatible = "amlogic,meson-i2c";
+                               status = "disabled";
+                               reg = <0x0 0x1f000 0x0 0x20>;
+                               interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
+                                       <GIC_SPI 91 IRQ_TYPE_EDGE_RISING>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               clocks = <&clkc CLKID_I2C>;
+                               clock-frequency = <100000>;
+                       };
+
+                       i2c1: i2c@1e000 {
+                               compatible = "amlogic,meson-i2c";
+                               status = "disabled";
+                               reg = <0x0 0x1e000 0x0 0x20>;
+                               interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>,
+                                       <GIC_SPI 92 IRQ_TYPE_EDGE_RISING>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               clocks = <&clkc CLKID_I2C>;
+                               clock-frequency = <100000>;
+                       };
+
+                       i2c2: i2c@1d000 {
+                               compatible = "amlogic,meson-i2c";
+                               status = "disabled";
+                               reg = <0x0 0x1d000 0x0 0x20>;
+                               interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>,
+                                       <GIC_SPI 94 IRQ_TYPE_EDGE_RISING>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               clocks = <&clkc CLKID_I2C>;
+                               clock-frequency = <100000>;
+                       };
+
+                       i2c3: i2c@1c000 {
+                               compatible = "amlogic,meson-i2c";
+                               status = "disabled";
+                               reg = <0x0 0x1c000 0x0 0x20>;
+                               interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
+                                       <GIC_SPI 95 IRQ_TYPE_EDGE_RISING>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               clocks = <&clkc CLKID_I2C>;
+                               clock-frequency = <100000>;
+                       };
+
+                       gpio_intc: interrupt-controller@f080 {
+                               compatible = "amlogic,meson-gpio-intc",
+                                               "amlogic,meson-tl1-gpio-intc";
+                               reg = <0x0 0xf080 0x0 0x10>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               amlogic,channel-interrupts =
+                                       <64 65 66 67 68 69 70 71>;
+                               status = "okay";
+                       };
+
+                       pwm_ab: pwm@1b000 {
+                               compatible = "amlogic,tl1-ee-pwm";
+                               reg = <0x0 0x1b000 0x0 0x20>;
+                               #pwm-cells = <3>;
+                               clocks = <&xtal>,
+                                               <&xtal>,
+                                               <&xtal>,
+                                               <&xtal>;
+                               clock-names = "clkin0",
+                                               "clkin1",
+                                               "clkin2",
+                                               "clkin3";
+                               /* default xtal 24m  clkin0-clkin2 and
+                                * clkin1-clkin3 should be set the same
+                                */
+                               status = "disabled";
+                       };
+
+                       pwm_cd: pwm@1a000 {
+                               compatible = "amlogic,tl1-ee-pwm";
+                               reg = <0x0 0x1a000 0x0 0x20>;
+                               #pwm-cells = <3>;
+                               clocks = <&xtal>,
+                                               <&xtal>,
+                                               <&xtal>,
+                                               <&xtal>;
+                               clock-names = "clkin0",
+                                               "clkin1",
+                                               "clkin2",
+                                               "clkin3";
+                               status = "disabled";
+                       };
+
+                       pwm_ef: pwm@19000 {
+                               compatible = "amlogic,tl1-ee-pwm";
+                               reg = <0x0 0x19000 0x0 0x20>;
+                               #pwm-cells = <3>;
+                               clocks = <&xtal>,
+                                               <&xtal>,
+                                               <&xtal>,
+                                               <&xtal>;
+                               clock-names = "clkin0",
+                                               "clkin1",
+                                               "clkin2",
+                                               "clkin3";
+                               status = "disabled";
+                       };
+
+                       spicc0: spi@13000 {
+                               compatible = "amlogic,meson-tl1-spicc",
+                                            "amlogic,meson-g12a-spicc";
+                               reg = <0x0 0x13000 0x0 0x44>;
+                               interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clkc CLKID_SPICC0>,
+                                        <&clkc CLKID_SPICC0_COMP>;
+                               clock-names = "core", "comp";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
+                       spicc1: spi@15000 {
+                               compatible = "amlogic,meson-tl1-spicc",
+                                            "amlogic,meson-g12a-spicc";
+                               reg = <0x0 0x15000 0x0 0x44>;
+                               interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clkc CLKID_SPICC1>,
+                                        <&clkc CLKID_SPICC1_COMP>;
+                               clock-names = "core", "comp";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+               };
+
+               aobus: aobus@ff800000 {
+                       compatible = "simple-bus";
+                       reg = <0x0 0xff800000 0x0 0xb000>;
+                       #address-cells = <2>;
+                       #size-cells = <2>;
+                       ranges = <0x0 0x0 0x0 0xff800000 0x0 0xb000>;
+
+                       cpu_version {
+                               reg = <0x0 0x220 0x0 0x4>;
+                       };
+
+                       aoclkc: clock-controller@0 {
+                               compatible = "amlogic,tl1-aoclkc";
+                               #clock-cells = <1>;
+                               reg = <0x0 0x0 0x0 0x1000>;
+                       };
+
+                       pwm_AO_ab: pwm@7000 {
+                               compatible = "amlogic,tl1-ao-pwm";
+                               reg = <0x0 0x7000 0x0 0x20>;
+                               #pwm-cells = <3>;
+                               clocks = <&xtal>,
+                                        <&xtal>,
+                                        <&xtal>,
+                                        <&xtal>;
+                               clock-names = "clkin0",
+                                             "clkin1",
+                                             "clkin2",
+                                             "clkin3";
+                               status = "disabled";
+                       };
+
+                       pwm_AO_cd: pwm@2000 {
+                               compatible = "amlogic,tl1-ao-pwm";
+                               reg = <0x0 0x2000 0x0 0x20>;
+                               #pwm-cells = <3>;
+                               clocks = <&xtal>,
+                                        <&xtal>,
+                                        <&xtal>,
+                                        <&xtal>;
+                               clock-names = "clkin0",
+                                             "clkin1",
+                                             "clkin2",
+                                             "clkin3";
+                               status = "disabled";
+                       };
+
+                       uart_AO: serial@3000 {
+                               compatible = "amlogic, meson-uart";
+                               reg = <0x0 0x3000 0x0 0x18>;
+                               interrupts = <0 193 1>;
+                               status = "okay";
+                               clocks = <&xtal>;
+                               clock-names = "clk_uart";
+                               xtal_tick_en = <2>;
+                               fifosize = < 64 >;
+                               //pinctrl-names = "default";
+                               //pinctrl-0 = <&ao_a_uart_pins>;
+                               /* 0 not support; 1 support */
+                               support-sysrq = <0>;
+                       };
+
+                       uart_AO_B: serial@4000 {
+                               compatible = "amlogic, meson-uart";
+                               reg = <0x0 0x4000 0x0 0x18>;
+                               interrupts = <0 197 1>;
+                               status = "disabled";
+                               clocks = <&xtal>;
+                               clock-names = "clk_uart";
+                               fifosize = < 64 >;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&ao_b_uart_pins1>;
+                       };
+                       remote: rc@8040 {
+                               compatible = "amlogic, aml_remote";
+                               reg = <0x0 0x8040 0x0 0x44>,
+                                       <0x0 0x8000 0x0 0x20>;
+                               status = "okay";
+                               protocol = <REMOTE_TYPE_NEC>;
+                               interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&remote_pins>;
+                               map = <&custom_maps>;
+                               max_frame_time = <200>;
+                       };
+
+                       meson_irblaster: irblaster@14c {
+                               compatible = "amlogic, meson_irblaster";
+                               reg = <0x0 0x14c 0x0 0x10>,
+                                       <0x0 0x40 0x0 0x4>;
+                               interrupts = <0 198 1>;
+                               status = "disabled";
+                       };
+
+                       i2c_AO: i2c@5000 {
+                               compatible = "amlogic,meson-i2c";
+                               status = "disabled";
+                               reg = <0x0 0x05000 0x0 0x20>;
+                               interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>,
+                                       <GIC_SPI 201 IRQ_TYPE_EDGE_RISING>;
+                               #address-cells = <2>;
+                               #size-cells = <2>;
+                               clocks = <&clkc CLKID_I2C>;
+                               clock-frequency = <100000>;
+                       };
+
+                       i2c_AO_slave:i2c_slave@6000 {
+                               compatible = "amlogic, meson-i2c-slave";
+                               status = "disabled";
+                               reg = <0x0 0x6000 0x0 0x20>;
+                               interrupts = <GIC_SPI 194 IRQ_TYPE_EDGE_RISING>;
+                               pinctrl-names="default";
+                               pinctrl-0=<&i2c_ao_slave_pins>;
+                       };
+               };/* end of aobus */
+
+               ion_dev {
+                       compatible = "amlogic, ion_dev";
+                       status = "disabled";
+                       memory-region = <&ion_cma_reserved>;
+               };/* end of ion_dev*/
+       }; /* end of soc*/
+
+       custom_maps: custom_maps {
+               mapnum = <3>;
+               map0 = <&map_0>;
+               map1 = <&map_1>;
+               map2 = <&map_2>;
+               map_0: map_0{
+                       mapname = "amlogic-remote-1";
+                       customcode = <0xfb04>;
+                       release_delay = <80>;
+                       size  = <44>;   /*keymap size*/
+                       keymap = <REMOTE_KEY(0x01, KEY_1)
+                               REMOTE_KEY(0x02, KEY_2)
+                               REMOTE_KEY(0x03, KEY_3)
+                               REMOTE_KEY(0x04, KEY_4)
+                               REMOTE_KEY(0x05, KEY_5)
+                               REMOTE_KEY(0x06, KEY_6)
+                               REMOTE_KEY(0x07, KEY_7)
+                               REMOTE_KEY(0x08, KEY_8)
+                               REMOTE_KEY(0x09, KEY_9)
+                               REMOTE_KEY(0x0a, KEY_0)
+                               REMOTE_KEY(0x1F, KEY_FN_F1)
+                               REMOTE_KEY(0x15, KEY_MENU)
+                               REMOTE_KEY(0x16, KEY_TAB)
+                               REMOTE_KEY(0x0c, KEY_CHANNELUP)
+                               REMOTE_KEY(0x0d, KEY_CHANNELDOWN)
+                               REMOTE_KEY(0x0e, KEY_VOLUMEUP)
+                               REMOTE_KEY(0x0f, KEY_VOLUMEDOWN)
+                               REMOTE_KEY(0x11, KEY_HOME)
+                               REMOTE_KEY(0x1c, KEY_RIGHT)
+                               REMOTE_KEY(0x1b, KEY_LEFT)
+                               REMOTE_KEY(0x19, KEY_UP)
+                               REMOTE_KEY(0x1a, KEY_DOWN)
+                               REMOTE_KEY(0x1d, KEY_ENTER)
+                               REMOTE_KEY(0x17, KEY_MUTE)
+                               REMOTE_KEY(0x49, KEY_FINANCE)
+                               REMOTE_KEY(0x43, KEY_BACK)
+                               REMOTE_KEY(0x12, KEY_FN_F4)
+                               REMOTE_KEY(0x14, KEY_FN_F5)
+                               REMOTE_KEY(0x18, KEY_FN_F6)
+                               REMOTE_KEY(0x59, KEY_INFO)
+                               REMOTE_KEY(0x5a, KEY_STOPCD)
+                               REMOTE_KEY(0x10, KEY_POWER)
+                               REMOTE_KEY(0x42, KEY_PREVIOUSSONG)
+                               REMOTE_KEY(0x44, KEY_NEXTSONG)
+                               REMOTE_KEY(0x1e, KEY_REWIND)
+                               REMOTE_KEY(0x4b, KEY_FASTFORWARD)
+                               REMOTE_KEY(0x58, KEY_PLAYPAUSE)
+                               REMOTE_KEY(0x46, KEY_PROPS)
+                               REMOTE_KEY(0x40, KEY_UNDO)
+                               REMOTE_KEY(0x38, KEY_SCROLLLOCK)
+                               REMOTE_KEY(0x57, KEY_FN)
+                               REMOTE_KEY(0x5b, KEY_FN_ESC)
+                               REMOTE_KEY(0x13, 195)
+                               REMOTE_KEY(0x54, KEY_RED)
+                               REMOTE_KEY(0x4c, KEY_GREEN)
+                               REMOTE_KEY(0x4e, KEY_YELLOW)
+                               REMOTE_KEY(0x55, KEY_BLUE)
+                               REMOTE_KEY(0x53, KEY_BLUETOOTH)
+                               REMOTE_KEY(0x52, KEY_WLAN)
+                               REMOTE_KEY(0x39, KEY_CAMERA)
+                               REMOTE_KEY(0x41, KEY_SOUND)
+                               REMOTE_KEY(0x0b, KEY_QUESTION)
+                               REMOTE_KEY(0x00, KEY_CHAT)
+                               REMOTE_KEY(0x13, KEY_SEARCH)>;
+               };
+
+               map_1: map_1{
+                       mapname = "amlogic-remote-2";
+                       customcode = <0xfe01>;
+                       release_delay = <80>;
+                       size  = <53>;
+                       keymap = <REMOTE_KEY(0x01, KEY_1)
+                               REMOTE_KEY(0x02, KEY_2)
+                               REMOTE_KEY(0x03, KEY_3)
+                               REMOTE_KEY(0x04, KEY_4)
+                               REMOTE_KEY(0x05, KEY_5)
+                               REMOTE_KEY(0x06, KEY_6)
+                               REMOTE_KEY(0x07, KEY_7)
+                               REMOTE_KEY(0x08, KEY_8)
+                               REMOTE_KEY(0x09, KEY_9)
+                               REMOTE_KEY(0x0a, KEY_0)
+                               REMOTE_KEY(0x1F, KEY_FN_F1)
+                               REMOTE_KEY(0x15, KEY_MENU)
+                               REMOTE_KEY(0x16, KEY_TAB)
+                               REMOTE_KEY(0x0c, KEY_CHANNELUP)
+                               REMOTE_KEY(0x0d, KEY_CHANNELDOWN)
+                               REMOTE_KEY(0x0e, KEY_VOLUMEUP)
+                               REMOTE_KEY(0x0f, KEY_VOLUMEDOWN)
+                               REMOTE_KEY(0x11, KEY_HOME)
+                               REMOTE_KEY(0x1c, KEY_RIGHT)
+                               REMOTE_KEY(0x1b, KEY_LEFT)
+                               REMOTE_KEY(0x19, KEY_UP)
+                               REMOTE_KEY(0x1a, KEY_DOWN)
+                               REMOTE_KEY(0x1d, KEY_ENTER)
+                               REMOTE_KEY(0x17, KEY_MUTE)
+                               REMOTE_KEY(0x49, KEY_FINANCE)
+                               REMOTE_KEY(0x43, KEY_BACK)
+                               REMOTE_KEY(0x12, KEY_FN_F4)
+                               REMOTE_KEY(0x14, KEY_FN_F5)
+                               REMOTE_KEY(0x18, KEY_FN_F6)
+                               REMOTE_KEY(0x59, KEY_INFO)
+                               REMOTE_KEY(0x5a, KEY_STOPCD)
+                               REMOTE_KEY(0x10, KEY_POWER)
+                               REMOTE_KEY(0x42, KEY_PREVIOUSSONG)
+                               REMOTE_KEY(0x44, KEY_NEXTSONG)
+                               REMOTE_KEY(0x1e, KEY_REWIND)
+                               REMOTE_KEY(0x4b, KEY_FASTFORWARD)
+                               REMOTE_KEY(0x58, KEY_PLAYPAUSE)
+                               REMOTE_KEY(0x46, KEY_PROPS)
+                               REMOTE_KEY(0x40, KEY_UNDO)
+                               REMOTE_KEY(0x38, KEY_SCROLLLOCK)
+                               REMOTE_KEY(0x57, KEY_FN)
+                               REMOTE_KEY(0x5b, KEY_FN_ESC)
+                               REMOTE_KEY(0x54, KEY_RED)
+                               REMOTE_KEY(0x4c, KEY_GREEN)
+                               REMOTE_KEY(0x4e, KEY_YELLOW)
+                               REMOTE_KEY(0x55, KEY_BLUE)
+                               REMOTE_KEY(0x53, KEY_BLUETOOTH)
+                               REMOTE_KEY(0x52, KEY_WLAN)
+                               REMOTE_KEY(0x39, KEY_CAMERA)
+                               REMOTE_KEY(0x41, KEY_SOUND)
+                               REMOTE_KEY(0x0b, KEY_QUESTION)
+                               REMOTE_KEY(0x00, KEY_CHAT)
+                               REMOTE_KEY(0x13, KEY_SEARCH)>;
+               };
+
+               map_2: map_2{
+                       mapname = "amlogic-remote-3";
+                       customcode = <0xbd02>;
+                       release_delay = <80>;
+                       size  = <17>;
+                       keymap = <REMOTE_KEY(0xca,KEY_UP)
+                               REMOTE_KEY(0xd2,KEY_DOWN)
+                               REMOTE_KEY(0x99,KEY_LEFT)
+                               REMOTE_KEY(0xc1,KEY_RIGHT)
+                               REMOTE_KEY(0xce,KEY_RIGHTCTRL)
+                               REMOTE_KEY(0x45,KEY_POWER)
+                               REMOTE_KEY(0xc5,KEY_COPY)
+                               REMOTE_KEY(0x80,KEY_MUTE)
+                               REMOTE_KEY(0xd0,KEY_TAB)
+                               REMOTE_KEY(0xd6,KEY_LEFTMETA)
+                               REMOTE_KEY(0x95,KEY_HOME)
+                               REMOTE_KEY(0xdd,KEY_PAGEUP)
+                               REMOTE_KEY(0x8c,KEY_PAGEDOWN)
+                               REMOTE_KEY(0x89,KEY_UNDO)
+                               REMOTE_KEY(0x9c,KEY_PROPS)
+                               REMOTE_KEY(0x9a,KEY_SCALE)
+                               REMOTE_KEY(0xcd,KEY_KPCOMMA)>;
+               };
+       };
+
+       uart_A: serial@ffd24000 {
+               compatible = "amlogic, meson-uart";
+               reg = <0x0 0xffd24000 0x0 0x18>;
+               interrupts = <0 26 1>;
+               status = "disabled";
+               clocks = <&xtal
+                       &clkc CLKID_UART0>;
+               clock-names = "clk_uart",
+                       "clk_gate";
+               fifosize = < 128 >;
+               pinctrl-names = "default";
+               pinctrl-0 = <&a_uart_pins>;
+       };
+
+       uart_B: serial@ffd23000 {
+               compatible = "amlogic, meson-uart";
+               reg = <0x0 0xffd23000 0x0 0x18>;
+               interrupts = <0 75 1>;
+               status = "disabled";
+               clocks = <&xtal
+                       &clkc CLKID_UART1>;
+               clock-names = "clk_uart",
+                       "clk_gate";
+               fifosize = < 64 >;
+               pinctrl-names = "default";
+               pinctrl-0 = <&b_uart_pins>;
+       };
+
+       uart_C: serial@ffd22000 {
+               compatible = "amlogic, meson-uart";
+               reg = <0x0 0xffd22000 0x0 0x18>;
+               interrupts = <0 93 1>;
+               status = "disabled";
+               clocks = <&xtal
+                       &clkc CLKID_UART1>;
+               clock-names = "clk_uart",
+                       "clk_gate";
+               fifosize = < 64 >;
+               pinctrl-names = "default";
+               pinctrl-0 = <&c_uart_pins>;
+       };
+
+       sd_emmc_c: emmc@ffe07000 {
+               status = "disabled";
+               compatible = "amlogic, meson-mmc-tl1";
+               reg = <0x0 0xffe07000 0x0 0x800>;
+               interrupts = <0 191 1>;
+               pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
+               pinctrl-0 = <&emmc_clk_cmd_pins>;
+               pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>;
+               clocks = <&clkc CLKID_SD_EMMC_C>,
+                          <&clkc CLKID_SD_EMMC_C_P0_COMP>,
+                          <&clkc CLKID_FCLK_DIV2>,
+                          <&clkc CLKID_FCLK_DIV5>,
+                          <&clkc CLKID_GP0_PLL>,
+                          <&xtal>;
+               clock-names = "core","clkin0","clkin1","clkin2","clkin3","xtal";
+
+               bus-width = <8>;
+               cap-sd-highspeed;
+               cap-mmc-highspeed;
+               /* mmc-ddr-1_8v; */
+               /* mmc-hs200-1_8v; */
+
+               max-frequency = <200000000>;
+               non-removable;
+               disable-wp;
+               emmc {
+                       pinname = "emmc";
+                       ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+                       /*caps defined in dts*/
+                       tx_delay = <0>;
+                       max_req_size = <0x20000>; /**128KB*/
+                       gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
+                       hw_reset = <&gpio BOOT_12 GPIO_ACTIVE_HIGH>;
+                       card_type = <1>;
+                       /* 1:mmc card(include eMMC),
+                        * 2:sd card(include tSD)
+                        */
+               };
+       };
+
+
+       spifc: spifc@ffd14000 {
+               compatible = "amlogic,aml-spi-nor";
+               status = "disabled";
+
+               reg = <0x0 0xffd14000 0x0 0x80>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&spifc_all_pins>;
+               clock-names = "core";
+               clocks = <&clkc CLKID_CLK81>;
+
+               spi-nor@0 {
+                       compatible = "jedec,spi-nor";
+                       spifc-frequency = <40000000>;
+                       read-capability = <4>;/* dual read 1_1_2 */
+                       spifc-io-width = <4>;
+               };
+       };
+
+       slc_nand: nand-controller@0xFFE07800 {
+               compatible = "amlogic, aml_mtd_nand";
+               status = "disabled";
+               reg = <0x0 0xFFE07800 0x0 0x200>;
+               interrupts = <0 34 1>;
+
+               pinctrl-names = "nand_rb_mod", "nand_norb_mod", "nand_cs_only";
+               pinctrl-0 = <&all_nand_pins>;
+               pinctrl-1 = <&all_nand_pins>;
+               pinctrl-2 = <&nand_cs_pins>;
+               clocks = <&clkc CLKID_SD_EMMC_C>,
+                               <&clkc CLKID_SD_EMMC_C_P0_COMP>;
+               clock-names = "core", "clkin";
+
+               device_id = <0>;
+               /*fip/tpl configurations, must be same
+                *with uboot if bl_mode was set as 1
+                *bl_mode: 0 compact mode;1 descrete mode
+                *if bl_mode was set as 1,fip configuration will work
+                */
+               bl_mode = <1>;
+               /*copy count of fip*/
+               fip_copies = <4>;
+               /*size of each fip copy*/
+               fip_size = <0x200000>;
+               nand_clk_ctrl = <0xFFE07000>;
+               /*partions defined in dts*/
+       };
+
+       mesonstream {
+               compatible = "amlogic, codec, streambuf";
+               status = "okay";
+               clocks = <&clkc CLKID_U_PARSER
+                       &clkc CLKID_DEMUX
+                       &clkc CLKID_AHB_ARB0
+                       &clkc CLKID_CLK81
+                       &clkc CLKID_DOS
+                       &clkc CLKID_VDEC_MUX
+                       &clkc CLKID_HCODEC_MUX
+                       &clkc CLKID_HEVC_MUX
+                       &clkc CLKID_HEVCF_MUX>;
+               clock-names = "parser_top",
+                       "demux",
+                       "ahbarb0",
+                       "clk_81",
+                       "vdec",
+                       "clk_vdec_mux",
+                       "clk_hcodec_mux",
+                       "clk_hevc_mux",
+                       "clk_hevcb_mux";
+       };
+
+       vcodec-dec {
+               compatible = "amlogic, vcodec-dec";
+               status = "okay";
+       };
+
+       vdec {
+               compatible = "amlogic, vdec";
+               status = "okay";
+               interrupts = <0 3 1
+                       0 23 1
+                       0 32 1
+                       0 43 1
+                       0 44 1
+                       0 45 1>;
+               interrupt-names = "vsync",
+                       "demux",
+                       "parser",
+                       "mailbox_0",
+                       "mailbox_1",
+                       "mailbox_2";
+       };
+
+       canvas: canvas {
+               compatible = "amlogic, meson, canvas";
+               status = "okay";
+               reg = <0x0 0xff638000 0x0 0x2000>;
+       };
+
+       codec_io: codec_io {
+               compatible = "amlogic, codec_io";
+               status = "okay";
+               #address-cells=<2>;
+               #size-cells=<2>;
+               ranges;
+               io_cbus_base{
+                       reg = <0x0 0xffd00000 0x0 0x100000>;
+               };
+               io_dos_base{
+                       reg = <0x0 0xff620000 0x0 0x10000>;
+               };
+               io_hiubus_base{
+                       reg = <0x0 0xff63c000 0x0 0x2000>;
+               };
+               io_aobus_base{
+                       reg = <0x0 0xff800000 0x0 0x10000>;
+               };
+               io_vcbus_base{
+                       reg = <0x0 0xff900000 0x0 0x40000>;
+               };
+               io_dmc_base{
+                       reg = <0x0 0xff638000 0x0 0x2000>;
+               };
+               io_efuse_base{
+                       reg = <0x0 0xff630000 0x0 0x2000>;
+               };
+       };
+
+       rdma {
+               compatible = "amlogic, meson-tl1, rdma";
+               status = "okay";
+               interrupts = <0 89 1>;
+               interrupt-names = "rdma";
+       };
+
+       meson_fb: fb {
+               compatible = "amlogic, meson-tl1";
+               memory-region = <&logo_reserved>;
+               status = "disabled";
+               interrupts = <0 3 1
+                       0 56 1
+                       0 89 1>;
+               interrupt-names = "viu-vsync", "viu2-vsync", "rdma";
+               /* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/
+               display_mode_default = "1080p60hz";
+               scale_mode = <1>;
+               /** 0:VPU free scale 1:OSD free scale 2:OSD super scale */
+               display_size_default = <1920 1080 1920 2160 32>;
+               /*1920*1080*4*3 = 0x17BB000*/
+               clocks = <&clkc CLKID_VPU_CLKC_MUX>;
+               clock-names = "vpu_clkc";
+       };
+
+       ge2d {
+               compatible = "amlogic, ge2d-g12a";
+               status = "okay";
+               interrupts = <0 146 1>;
+               interrupt-names = "ge2d";
+               clocks = <&clkc CLKID_VAPB_MUX>,
+                       <&clkc CLKID_G2D>,
+                       <&clkc CLKID_GE2D_GATE>;
+               clock-names = "clk_vapb_0",
+                       "clk_ge2d",
+                       "clk_ge2d_gate";
+               reg = <0x0 0xff940000 0x0 0x10000>;
+       };
+
+       meson-amvideom {
+               compatible = "amlogic, amvideom";
+               status = "okay";
+               interrupts = <0 3 1>;
+               interrupt-names = "vsync";
+       };
+
+       ionvideo {
+               compatible = "amlogic, ionvideo";
+               status = "okay";
+       };
+
+       amlvideo {
+               compatible = "amlogic, amlvideo";
+               status = "okay";
+       };
+
+       vdac {
+               compatible = "amlogic, vdac-tl1";
+               status = "okay";
+       };
+
+       ddr_bandwidth {
+               compatible = "amlogic, ddr-bandwidth";
+               status = "disabled";
+               reg = <0x0 0xff638000 0x0 0x100
+                      0x0 0xff638c00 0x0 0x100>;
+               interrupts = <0 52 1>;
+               interrupt-names = "ddr_bandwidth";
+       };
+
+       dmc_monitor {
+               compatible = "amlogic, dmc_monitor";
+               status = "disabled";
+               reg_base = <0xff638800>;
+               interrupts = <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>;
+       };
+
+       efuse: efuse{
+               compatible = "amlogic, efuse";
+               read_cmd = <0x82000030>;
+               write_cmd = <0x82000031>;
+               get_max_cmd = <0x82000033>;
+               key = <&efusekey>;
+               clocks = <&clkc CLKID_EFUSE>;
+               clock-names = "efuse_clk";
+               status = "disabled";
+       };
+
+       efusekey:efusekey{
+               keynum = <4>;
+               key0 = <&key_0>;
+               key1 = <&key_1>;
+               key2 = <&key_2>;
+               key3 = <&key_3>;
+               key_0:key_0{
+                       keyname = "mac";
+                       offset = <0>;
+                       size = <6>;
+               };
+               key_1:key_1{
+                       keyname = "mac_bt";
+                       offset = <6>;
+                       size = <6>;
+               };
+               key_2:key_2{
+                       keyname = "mac_wifi";
+                       offset = <12>;
+                       size = <6>;
+               };
+               key_3:key_3{
+                       keyname = "usid";
+                       offset = <18>;
+                       size = <16>;
+               };
+       };
+
+       audio_data: audio_data {
+               compatible = "amlogic, audio_data";
+               query_licence_cmd = <0x82000050>;
+               status = "disabled";
+       };
+
+       defendkey: defendkey {
+               compatible = "amlogic, defendkey";
+               mem_size = <0 0x100000>;
+               status = "okay";
+       };
+}; /* end of / */
+
+&pinctrl_aobus {
+       sd_to_ao_uart_clr_pins: sd_to_ao_uart_clr_pins {
+               mux {
+                       groups = "GPIOAO_0",
+                                  "GPIOAO_1",
+                                  "GPIOAO_2",
+                                  "GPIOAO_3",
+                                  "GPIOAO_4",
+                                  "GPIOAO_5",
+                                  "GPIOAO_6",
+                                  "GPIOAO_7",
+                                  "GPIOAO_8",
+                                  "GPIOAO_9",
+                                  "GPIOAO_10",
+                                  "GPIOAO_11",
+                                  "GPIOE_0",
+                                  "GPIOE_1",
+                                  "GPIOE_2",
+                                  "GPIO_TEST_N";
+                       function = "gpio_aobus";
+               };
+       };
+
+       sd_to_ao_uart_pins: sd_to_ao_uart_pins {
+               mux {
+                       groups = "uart_ao_a_tx",
+                                  "uart_ao_a_rx",
+                                  "uart_ao_a_cts",
+                                  "uart_ao_a_rts";
+                       function = "uart_ao_a";
+                       bias-pull-up;
+                       input-enable;
+               };
+       };
+
+       remote_pins:remote_pin {
+               mux {
+                       groups = "remote_input_ao";
+                       function = "remote_input_ao";
+               };
+       };
+
+       pwm_ao_a_pins: pwm_ao_a {
+               mux {
+                       groups = "pwm_ao_a";
+                       function = "pwm_ao_a";
+               };
+       };
+
+       pwm_ao_a_hiz_pins: pwm_ao_a_hiz {
+               mux {
+                       groups = "pwm_ao_a_hiz";
+                       function = "pwm_ao_a";
+               };
+       };
+
+       pwm_ao_b_pins: pwm_ao_b {
+               mux {
+                       groups = "pwm_ao_b";
+                       function = "pwm_ao_b";
+               };
+       };
+
+       pwm_ao_c_pins1: pwm_ao_c_pins1 {
+               mux {
+                       groups = "pwm_ao_c_4";
+                       function = "pwm_ao_c";
+               };
+       };
+
+       pwm_ao_c_pins2: pwm_ao_c_pins2 {
+               mux {
+                       groups = "pwm_ao_c_6";
+                       function = "pwm_ao_c";
+               };
+       };
+
+       pwm_ao_c_hiz_pins1: pwm_ao_c_hiz1 {
+               mux {
+                       groups = "pwm_ao_c_hiz_4";
+                       function = "pwm_ao_c";
+               };
+       };
+
+       pwm_ao_c_hiz_pins2: pwm_ao_c_hiz2 {
+               mux {
+                       groups = "pwm_ao_c_hiz_7";
+                       function = "pwm_ao_c";
+               };
+       };
+
+       pwm_ao_d_pins1: pwm_ao_d_pins1 {
+               mux {
+                       groups = "pwm_ao_d_5";
+                       function = "pwm_ao_d";
+               };
+       };
+
+       pwm_ao_d_pins2: pwm_ao_d_pins2 {
+               mux {
+                       groups = "pwm_ao_d_10";
+                       function = "pwm_ao_d";
+               };
+       };
+
+       pwm_ao_d_pins3: pwm_ao_d_pins3 {
+               mux {
+                       groups = "pwm_ao_d_e";
+                       function = "pwm_ao_d";
+               };
+       };
+
+       pwm_a_e2: pwm_a_e2 {
+               mux {
+                       groups = "pwm_a_e2";
+                       function = "pwm_a_e2";
+               };
+       };
+
+       i2c_ao_2_pins:i2c_ao_2 {
+               mux {
+                       groups = "i2c_ao_sck_2",
+                       "i2c_ao_sda_3";
+                       function = "i2c_ao";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       i2c_ao_e_pins:i2c_ao_e {
+               mux {
+                       groups = "i2c_ao_sck_e",
+                       "i2c_ao_sda_e";
+                       function = "i2c_ao";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       i2c_ao_slave_pins:i2c_ao_slave {
+               mux {
+                       groups = "i2c_ao_slave_sck",
+                       "i2c_ao_slave_sda";
+                       function = "i2c_ao_slave";
+               };
+       };
+
+       ao_uart_pins:ao_uart {
+               mux {
+                       groups = "uart_ao_a_rx",
+                               "uart_ao_a_tx";
+                       function = "uart_ao_a";
+               };
+       };
+
+       ao_b_uart_pins1:ao_b_uart1 {
+               mux {
+                       groups = "uart_ao_b_tx_2",
+                               "uart_ao_b_rx_3";
+                       function = "uart_ao_b";
+               };
+       };
+
+       ao_b_uart_pins2:ao_b_uart2 {
+               mux {
+                       groups = "uart_ao_b_tx_8",
+                               "uart_ao_b_rx_9";
+                       function = "uart_ao_b";
+               };
+       };
+
+       irblaster_pins:irblaster_pin {
+               mux {
+                       groups = "remote_out_ao";
+                       function = "remote_out_ao";
+               };
+       };
+
+       irblaster_pins1:irblaster_pin1 {
+               mux {
+                       groups = "remote_out_ao9";
+                       function = "remote_out_ao";
+               };
+       };
+
+       jtag_apao_pins:jtag_apao_pin {
+               mux {
+                       groups = "jtag_a_tdi",
+                       "jtag_a_tdo",
+                       "jtag_a_clk",
+                       "jtag_a_tms";
+                       function = "jtag_a";
+               };
+       };
+};
+
+&pinctrl_periphs {
+       /* sdemmc portC */
+       emmc_clk_cmd_pins: emmc_clk_cmd_pins {
+               mux {
+                       groups = "emmc_clk",
+                                "emmc_cmd";
+                       function = "emmc";
+                       input-enable;
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       emmc_conf_pull_up: emmc_conf_pull_up {
+               mux {
+                       groups = "emmc_nand_d7",
+                                "emmc_nand_d6",
+                                "emmc_nand_d5",
+                                "emmc_nand_d4",
+                                "emmc_nand_d3",
+                                "emmc_nand_d2",
+                                "emmc_nand_d1",
+                                "emmc_nand_d0",
+                                "emmc_clk",
+                                "emmc_cmd";
+                       function = "emmc";
+                       input-enable;
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       emmc_conf_pull_done: emmc_conf_pull_done {
+               mux {
+                       groups = "emmc_nand_ds";
+                       function = "emmc";
+                       input-enable;
+                       bias-pull-down;
+                       drive-strength = <3>;
+               };
+       };
+
+       /* sdemmc portB */
+       sd_clk_cmd_pins: sd_clk_cmd_pins {
+               mux {
+                       groups = "sdcard_cmd",
+                                  "sdcard_clk";
+                       function = "sdcard";
+                       input-enable;
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       sd_all_pins: sd_all_pins {
+               mux {
+                       groups = "sdcard_d0",
+                                  "sdcard_d1",
+                                  "sdcard_d2",
+                                  "sdcard_d3",
+                                  "sdcard_cmd",
+                                  "sdcard_clk";
+                       function = "sdcard";
+                       input-enable;
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       sd_1bit_pins: sd_1bit_pins {
+               mux {
+                       groups = "sdcard_d0",
+                                       "sdcard_cmd",
+                                       "sdcard_clk";
+                       function = "sdcard";
+                       input-enable;
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       ao_to_sd_uart_pins: ao_to_sd_uart_pins {
+               mux {
+                       groups ="uart_ao_a_rx_w3",
+                                       "uart_ao_a_tx_w2",
+                                       "uart_ao_a_rx_w7",
+                                       "uart_ao_a_tx_w6",
+                                       "uart_ao_a_rx_w11",
+                                       "uart_ao_a_tx_w10";
+                       function = "uart_ao_a_ee";
+                       bias-pull-up;
+                       input-enable;
+               };
+       };
+
+       all_nand_pins: all_nand_pins {
+               mux {
+                       groups = "emmc_nand_d0",
+                               "emmc_nand_d1",
+                               "emmc_nand_d2",
+                               "emmc_nand_d3",
+                               "emmc_nand_d4",
+                               "emmc_nand_d5",
+                               "emmc_nand_d6",
+                               "emmc_nand_d7",
+                               "nand_ce0",
+                               "nand_ale",
+                               "nand_cle",
+                               "nand_wen_clk",
+                               "nand_ren_wr";
+                       function = "nand";
+                       input-enable;
+                       drive-strength = <3>;
+               };
+       };
+
+       nand_cs_pins:nand_cs {
+               mux {
+                       groups = "nand_ce0";
+                       function = "nand";
+                       drive-strength = <3>;
+               };
+       };
+
+       /* sdemmc port */
+       sdio_clk_cmd_pins: sdio_clk_cmd_pins {
+               mux {
+                       groups = "sdcard_clk",
+                               "sdcard_cmd";
+                       function = "sdcard";
+                       input-enable;
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       sdio_all_pins: sdio_all_pins {
+               mux {
+                       groups = "sdcard_d0",
+                               "sdcard_d1",
+                               "sdcard_d2",
+                               "sdcard_d3",
+                               "sdcard_clk",
+                               "sdcard_cmd";
+                       function = "sdcard";
+                       input-enable;
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       spifc_cs_pin:spifc_cs_pin {
+               mux {
+                       groups = "nor_cs";
+                       function = "nor";
+                       bias-pull-up;
+               };
+       };
+
+       spifc_pulldown: spifc_pulldown {
+               mux {
+                       groups = "nor_d",
+                               "nor_q",
+                               "nor_c";
+                       function = "nor";
+                       bias-pull-down;
+               };
+       };
+
+       spifc_pullup: spifc_pullup {
+               mux {
+                       groups = "nor_cs";
+                       function = "nor";
+                       bias-pull-up;
+               };
+       };
+
+       spifc_all_pins: spifc_all_pins {
+               mux {
+                       groups =  "nor_d",
+                               "nor_q",
+                               "nor_c",
+                               "nor_hold",
+                               "nor_wp";
+                       function = "nor";
+                       input-enable;
+                       bias-pull-down;
+               };
+       };
+
+       pwm_a_pins: pwm_a {
+               mux {
+                       groups = "pwm_a";
+                       function = "pwm_a";
+               };
+       };
+
+       pwm_b_pins1: pwm_b_pins1 {
+               mux {
+                       groups = "pwm_b_c";
+                       function = "pwm_b";
+               };
+       };
+
+       pwm_b_pins2: pwm_b_pins2 {
+               mux {
+                       groups = "pwm_b_z";
+                       function = "pwm_b";
+               };
+       };
+
+       pwm_c_pins1: pwm_c_pins1 {
+               mux {
+                       groups = "pwm_c_dv";
+                       function = "pwm_c";
+               };
+       };
+
+       pwm_c_pins2: pwm_c_pins2 {
+               mux {
+                       groups = "pwm_c_h";
+                       function = "pwm_c";
+               };
+       };
+
+       pwm_c_pins3: pwm_c_pins3 {
+               mux {
+                       groups = "pwm_c_z";
+                       function = "pwm_c";
+               };
+       };
+
+       pwm_d_pins1: pwm_d_pins1 {
+               mux {
+                       groups = "pwm_d_dv";
+                       function = "pwm_d";
+               };
+       };
+
+       pwm_d_pins2: pwm_d_pins2 {
+               mux {
+                       groups = "pwm_d_z";
+                       function = "pwm_d";
+               };
+       };
+
+       pwm_e_pins1: pwm_e1 {
+               mux {
+                       groups = "pwm_e_dv";
+                       function = "pwm_e";
+               };
+       };
+
+       pwm_e_pins2: pwm_e2 {
+               mux {
+                       groups = "pwm_e_z";
+                       function = "pwm_e";
+               };
+       };
+
+       pwm_f_pins1: pwm_f_pins1 {
+               mux {
+                       groups = "pwm_f_dv";
+                       function = "pwm_f";
+               };
+       };
+
+       pwm_f_pins2: pwm_f_pins2 {
+               mux {
+                       groups = "pwm_f_z";
+                       function = "pwm_f";
+               };
+       };
+
+       i2c0_c_pins:i2c0_c {
+               mux {
+                       groups = "i2c0_sda_c",
+                               "i2c0_sck_c";
+                       function = "i2c0";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       i2c0_dv_pins:i2c0_dv {
+               mux {
+                       groups = "i2c0_sda_dv",
+                               "i2c0_sck_dv";
+                       function = "i2c0";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       i2c1_z_pins:i2c1_z {
+               mux {
+                       groups = "i2c1_sda_z",
+                               "i2c1_sck_z";
+                       function = "i2c1";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       i2c1_h_pins:i2c1_h {
+               mux {
+                       groups = "i2c1_sda_h",
+                               "i2c1_sck_h";
+                       function = "i2c1";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       i2c2_h_pins:i2c2_h {
+               mux {
+                       groups = "i2c2_sda_h",
+                               "i2c2_sck_h";
+                       function = "i2c2";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       i2c2_z_pins:i2c2_z {
+               mux {
+                       groups = "i2c2_sda_z",
+                               "i2c2_sck_z";
+                       function = "i2c2";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       i2c3_h1_pins:i2c3_h1 {
+               mux {
+                       groups = "i2c3_sda_h1",
+                               "i2c3_sck_h0";
+                       function = "i2c3";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       i2c3_h20_pins:i2c3_h3 {
+               mux {
+                       groups = "i2c3_sda_h20",
+                               "i2c3_sck_h19";
+                       function = "i2c3";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       i2c3_dv_pins:i2c3_dv {
+               mux {
+                       groups = "i2c3_sda_dv",
+                               "i2c3_sck_dv";
+                       function = "i2c3";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       i2c3_c_pins:i2c3_c {
+               mux {
+                       groups = "i2c3_sda_c",
+                               "i2c3_sck_c";
+                       function = "i2c3";
+                       bias-pull-up;
+                       drive-strength = <3>;
+               };
+       };
+
+       spicc0_pins_h: spicc0_pins_h {
+               mux {
+                       groups = "spi0_mosi_h",
+                                "spi0_miso_h",
+                                "spi0_clk_h";
+                       function = "spi0";
+                       drive-strength = <1>;
+               };
+       };
+
+       spicc1_pins_dv: spicc1_pins_dv {
+               mux {
+                       groups = "spi1_mosi_dv",
+                                "spi1_miso_dv",
+                                "spi1_clk_dv";
+                       function = "spi1";
+                       drive-strength = <1>;
+               };
+       };
+
+       internal_eth_pins: internal_eth_pins {
+               mux {
+                       groups = "eth_link_led",
+                               "eth_act_led";
+                       function = "eth";
+               };
+       };
+
+       internal_gpio_pins: internal_gpio_pins {
+               mux {
+                       groups = "GPIOZ_14",
+                               "GPIOZ_15";
+                       function = "gpio_periphs";
+                       bias-disable;
+                       input-enable;
+               };
+       };
+
+       external_eth_pins: external_eth_pins {
+               mux {
+                       groups = "eth_mdio",
+                       "eth_mdc",
+                       "eth_rgmii_rx_clk",
+                       "eth_rx_dv",
+                       "eth_rxd0",
+                       "eth_rxd1",
+                       "eth_rxd2_rgmii",
+                       "eth_rxd3_rgmii",
+                       "eth_rgmii_tx_clk",
+                       "eth_txen",
+                       "eth_txd0",
+                       "eth_txd1",
+                       "eth_txd2_rgmii",
+                       "eth_txd3_rgmii";
+                       function = "eth";
+                       drive-strength = <3>;
+               };
+       };
+
+       a_uart_pins:a_uart {
+               mux {
+                       groups = "uart_a_tx",
+                               "uart_a_rx",
+                               "uart_a_cts",
+                               "uart_a_rts";
+                       function = "uart_a";
+               };
+       };
+
+       b_uart_pins:b_uart {
+               mux {
+                       groups = "uart_b_tx",
+                               "uart_b_rx";
+                       function = "uart_b";
+               };
+       };
+
+       c_uart_pins:c_uart {
+               mux {
+                       groups = "uart_c_tx",
+                               "uart_c_rx";
+                       function = "uart_c";
+               };
+       };
+
+       atvdemod_agc_pins: atvdemod_agc_pins {
+               mux {
+                       groups = "atv_if_agc_dv";
+                       function = "atv";
+               };
+       };
+
+       dtvdemod_agc_pins: dtvdemod_agc_pins {
+               mux {
+                       groups = "dtv_if_agc_dv2";
+                       function = "dtv";
+               };
+       };
+
+       lcd_vbyone_pins: lcd_vbyone_pin {
+               mux {
+                       groups = "vx1_lockn","vx1_htpdn";
+                       function = "vx1";
+               };
+       };
+       lcd_vbyone_off_pins: lcd_vbyone_off_pin {
+               mux {
+                       groups = "GPIOH_15","GPIOH_16";
+                       function = "gpio_periphs";
+                       input-enable;
+               };
+       };
+
+       lcd_tcon_pins: lcd_tcon_pin {
+               mux {
+                       groups = "tcon_0","tcon_1","tcon_2","tcon_3",
+                               "tcon_4","tcon_5","tcon_6","tcon_7",
+                               "tcon_8","tcon_9","tcon_10","tcon_11",
+                               "tcon_12","tcon_13","tcon_14","tcon_15",
+                               "tcon_lock","tcon_spi_mo","tcon_spi_mi",
+                               "tcon_spi_clk","tcon_spi_ss";
+                       function = "tcon";
+               };
+       };
+       lcd_tcon_off_pins: lcd_tcon_off_pin {
+               mux {
+                       groups = "GPIOH_0","GPIOH_1","GPIOH_2","GPIOH_3",
+                               "GPIOH_4","GPIOH_5","GPIOH_6","GPIOH_7",
+                               "GPIOH_8","GPIOH_9","GPIOH_10","GPIOH_11",
+                               "GPIOH_12","GPIOH_13","GPIOH_14","GPIOH_15",
+                               "GPIOH_16","GPIOH_17","GPIOH_18","GPIOH_19",
+                               "GPIOH_20";
+                       function = "gpio_periphs";
+                       input-enable;
+               };
+       };
+};
+
+&gpu{
+       tbl =  <&dvfs285_cfg
+               &dvfs400_cfg
+               &dvfs500_cfg
+               &dvfs666_cfg
+               &dvfs800_cfg
+               &dvfs800_cfg>;
+};
diff --git a/arch/arm64/boot/dts/amlogic/tm2_pxp.dts b/arch/arm64/boot/dts/amlogic/tm2_pxp.dts
new file mode 100644 (file)
index 0000000..5a7bd66
--- /dev/null
@@ -0,0 +1,1129 @@
+/*
+ * arch/arm/boot/dts/amlogic/tl1_pxp.dts
+ *
+ * Copyright (C) 2018 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/dts-v1/;
+
+#include "mesontm2.dtsi"
+#include "partition_mbox_normal_P_32.dtsi"
+/*#include "mesontl1_skt-panel.dtsi"*/
+
+/ {
+       model = "Amlogic TL1 PXP";
+       amlogic-dt-id = "tl1_pxp";
+       compatible = "amlogic, tl1_pxp";
+
+       aliases {
+               serial0 = &uart_AO;
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
+               i2c4 = &i2c_AO;
+       };
+
+       memory@00000000 {
+               device_type = "memory";
+               linux,usable-memory = <0x0 0x0 0x0 0x40000000>;
+       };
+
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+               /* global autoconfigured region for contiguous allocations */
+               secmon_reserved: linux,secmon {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x0 0x400000>;
+                       alignment = <0x0 0x400000>;
+                       alloc-ranges = <0x0 0x05000000 0x0 0x400000>;
+               };
+
+               codec_mm_cma:linux,codec_mm_cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       /* ion_codec_mm max can alloc size 80M*/
+                       size = <0x0 0x13400000>;
+                       alignment = <0x0 0x400000>;
+                       linux,contiguous-region;
+               };
+
+               /* codec shared reserved */
+               codec_mm_reserved:linux,codec_mm_reserved {
+                       compatible = "amlogic, codec-mm-reserved";
+                       size = <0x0 0x0>;
+                       alignment = <0x0 0x100000>;
+                       //no-map;
+               };
+
+               logo_reserved:linux,meson-fb {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x0 0x800000>;
+                       alignment = <0x0 0x400000>;
+                       alloc-ranges = <0x0 0x3f800000 0x0 0x800000>;
+               };
+
+               ion_cma_reserved:linux,ion-dev {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x0 0x8000000>;
+                       alignment = <0x0 0x400000>;
+               };
+
+               /*  vdin0 CMA pool */
+               //vdin0_cma_reserved:linux,vdin0_cma {
+               //      compatible = "shared-dma-pool";
+               //      reusable;
+                       /* 3840x2160x4x4 ~=128 M */
+               //      size = <0xc400000>;
+               //      alignment = <0x400000>;
+               //};
+
+               /*  vdin1 CMA pool */
+               vdin1_cma_reserved:linux,vdin1_cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       /* 1920x1080x2x4  =16 M */
+                       size = <0x0 0x1400000>;
+                       alignment = <0x0 0x400000>;
+               };
+
+               /*di CMA pool */
+               di_cma_reserved:linux,di_cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       /* buffer_size = 3621952(yuv422 8bit)
+                        *  | 4736064(yuv422 10bit)
+                        *  | 4074560(yuv422 10bit full pack mode)
+                        * 10x3621952=34.6M(0x23) support 8bit
+                        * 10x4736064=45.2M(0x2e) support 12bit
+                        * 10x4074560=40M(0x28) support 10bit
+                        */
+                       size = <0x0 0x02800000>;
+                       alignment = <0x0 0x400000>;
+               };
+
+               /* for hdmi rx emp use */
+               hdmirx_emp_cma_reserved:linux,emp_cma {
+                       compatible = "shared-dma-pool";
+                       /*linux,phandle = <5>;*/
+                       reusable;
+                       /* 4M for emp to ddr */
+                       /* 32M for tmds to ddr */
+                       size = <0x0 0x2000000>;
+                       alignment = <0x0 0x400000>;
+                       /* alloc-ranges = <0x400000 0x2000000>; */
+               };
+
+               /* POST PROCESS MANAGER */
+               ppmgr_reserved:linux,ppmgr {
+                       compatible = "amlogic, ppmgr_memory";
+                       size = <0x0 0x0>;
+               };
+
+               picdec_cma_reserved:linux,picdec {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x0 0x0>;
+                       alignment = <0x0 0x0>;
+                       linux,contiguous-region;
+               };
+       }; /* end of reserved-memory */
+
+       codec_mm {
+               status = "disabled";
+               compatible = "amlogic, codec, mm";
+               memory-region = <&codec_mm_cma &codec_mm_reserved>;
+       };
+
+       picdec {
+               compatible = "amlogic, picdec";
+               memory-region = <&picdec_cma_reserved>;
+               dev_name = "picdec";
+               status = "disabled";
+       };
+
+       ppmgr {
+               status = "disabled";
+               compatible = "amlogic, ppmgr";
+               memory-region = <&ppmgr_reserved>;
+       };
+
+       deinterlace {
+               compatible = "amlogic, deinterlace";
+
+               status = "disabled";
+               /* 0:use reserved; 1:use cma; 2:use cma as reserved */
+               flag_cma = <1>;
+               //memory-region = <&di_reserved>;
+               memory-region = <&di_cma_reserved>;
+               interrupts = <0 46 1
+                               0 40 1>;
+               interrupt-names = "pre_irq", "post_irq";
+               clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
+                       <&clkc CLKID_VPU_CLKB_COMP>;
+               clock-names = "vpu_clkb_tmp_composite",
+                       "vpu_clkb_composite";
+               clock-range = <334 667>;
+               /* buffer-size = <3621952>;(yuv422 8bit) */
+               buffer-size = <4074560>;/*yuv422 fullpack*/
+               /* reserve-iomap = "true"; */
+               /* if enable nr10bit, set nr10bit-support to 1 */
+               post-wr-support = <1>;
+               nr10bit-support = <1>;
+               nrds-enable = <1>;
+               pps-enable = <1>;
+       };
+
+       vout {
+               compatible = "amlogic, vout";
+               status = "okay";
+               fr_auto_policy = <0>;
+       };
+
+       pdm_codec:dummy {
+               #sound-dai-cells = <0>;
+               compatible = "amlogic, pdm_dummy_codec";
+               status = "okay";
+       };
+
+       dummy_codec:dummy {
+               #sound-dai-cells = <0>;
+               compatible = "amlogic, aml_dummy_codec";
+               status = "okay";
+       };
+
+       tl1_codec:codec {
+               #sound-dai-cells = <0>;
+               compatible = "amlogic, tl1_acodec";
+               status = "disabled";
+               reg = <0xff632000 0x1c>;
+               tdmout_index = <1>;
+               tdmin_index = <1>;
+       };
+
+       aml_dtv_demod {
+               compatible = "amlogic, ddemod-tl1";
+               dev_name = "aml_dtv_demod";
+               status = "okay";
+
+               //pinctrl-names="dtvdemod_agc";
+               //pinctrl-0=<&dtvdemod_agc>;
+
+               clocks = <&clkc CLKID_DAC_CLK>;
+               clock-names = "vdac_clk_gate";
+
+               reg = <0xff650000 0x4000        /*dtv demod base*/
+                          0xff63c000 0x2000    /*hiu reg base*/
+                          0xff800000 0x1000    /*io_aobus_base*/
+                          0xffd01000 0x1000    /*reset*/
+                       >;
+
+               /*move from dvbfe*/
+               dtv_demod0_mem = <0>;   // need move to aml_dtv_demod ?
+               spectrum = <1>;
+               cma_flag = <1>;
+               cma_mem_size = <8>;
+               //memory-region = <&demod_cma_reserved>;//<&demod_reserved>;
+       };
+
+       auge_sound {
+               compatible = "amlogic, tl1-sound-card";
+               aml-audio-card,name = "AML-AUGESOUND";
+
+               aml-audio-card,dai-link@0 {
+                       format = "dsp_a";
+                       mclk-fs = <512>;
+                       //continuous-clock;
+                       //bitclock-inversion;
+                       //frame-inversion;
+                       /* master mode */
+                       bitclock-master = <&tdma>;
+                       frame-master = <&tdma>;
+                       /* slave mode */
+                       /*
+                        * bitclock-master = <&tdmacodec>;
+                        * frame-master = <&tdmacodec>;
+                        */
+                       /* suffix-name, sync with android audio hal used for */
+                       suffix-name = "alsaPORT-pcm";
+                       tdmacpu: cpu {
+                               sound-dai = <&tdma>;
+                               dai-tdm-slot-tx-mask =
+                                                       <1 1 1 1 1 1 1 1>;
+                               dai-tdm-slot-rx-mask =
+                                                       <1 1 1 1 1 1 1 1>;
+                               dai-tdm-slot-num = <8>;
+                               dai-tdm-slot-width = <32>;
+                               system-clock-frequency = <24576000>;
+                       };
+                       tdmacodec: codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@1 {
+                       format = "i2s";
+                       mclk-fs = <256>;
+                       //continuous-clock;
+                       //bitclock-inversion;
+                       //frame-inversion;
+                       /* master mode */
+                       bitclock-master = <&tdmb>;
+                       frame-master = <&tdmb>;
+                       /* slave mode */
+                       //bitclock-master = <&tdmbcodec>;
+                       //frame-master = <&tdmbcodec>;
+                       /* suffix-name, sync with android audio hal used for */
+                       suffix-name = "alsaPORT-i2s";
+                       cpu {
+                               sound-dai = <&tdmb>;
+                               dai-tdm-slot-tx-mask = <1 1>;
+                               dai-tdm-slot-rx-mask = <1 1>;
+                               dai-tdm-slot-num = <2>;
+                               /*
+                                * dai-tdm-slot-tx-mask =
+                                *      <1 1 1 1 1 1 1 1>;
+                                * dai-tdm-slot-rx-mask =
+                                *      <1 1 1 1 1 1 1 1>;
+                                * dai-tdm-slot-num = <8>;
+                                */
+                               dai-tdm-slot-width = <32>;
+                               system-clock-frequency = <12288000>;
+                       };
+                       tdmbcodec: codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@2 {
+                       format = "i2s";
+                       mclk-fs = <256>;
+                       //continuous-clock;
+                       //bitclock-inversion;
+                       //frame-inversion;
+                       /* master mode */
+                       bitclock-master = <&tdmc>;
+                       frame-master = <&tdmc>;
+                       /* slave mode */
+                       //bitclock-master = <&tdmccodec>;
+                       //frame-master = <&tdmccodec>;
+                       /* suffix-name, sync with android audio hal used for */
+                       //suffix-name = "alsaPORT-tdm";
+                       cpu {
+                               sound-dai = <&tdmc>;
+                               dai-tdm-slot-tx-mask = <1 1>;
+                               dai-tdm-slot-rx-mask = <1 1>;
+                               dai-tdm-slot-num = <2>;
+                               dai-tdm-slot-width = <32>;
+                               system-clock-frequency = <12288000>;
+                       };
+                       tdmccodec: codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@3 {
+                       mclk-fs = <64>;
+                       /* suffix-name, sync with android audio hal used for */
+                       suffix-name = "alsaPORT-pdm";
+                       cpu {
+                               sound-dai = <&pdm>;
+                       };
+                       codec {
+                               sound-dai = <&pdm_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@4 {
+                       mclk-fs = <128>;
+                       /* suffix-name, sync with android audio hal used for */
+                       suffix-name = "alsaPORT-spdif";
+                       cpu {
+                               sound-dai = <&spdifa>;
+                               system-clock-frequency = <6144000>;
+                       };
+                       codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@5 {
+                       mclk-fs = <128>;
+                       cpu {
+                               sound-dai = <&spdifb>;
+                               system-clock-frequency = <6144000>;
+                       };
+                       codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@6 {
+                       mclk-fs = <256>;
+                       cpu {
+                               sound-dai = <&extn>;
+                               system-clock-frequency = <12288000>;
+                       };
+                       codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+       };
+       /* Audio Related end */
+
+       tvafe_avin_detect {
+               compatible = "amlogic, tl1_tvafe_avin_detect";
+               status = "okay";
+               device_mask = <1>;/*bit0:ch1;bit1:ch2*/
+               interrupts = <0 12 1>,
+                               <0 13 1>;
+       };
+
+
+       amlvecm {
+               compatible = "amlogic, vecm";
+               dev_name = "aml_vecm";
+               status = "okay";
+               gamma_en = <1>;/*1:enabel ;0:disable*/
+               wb_en = <1>;/*1:enabel ;0:disable*/
+               cm_en = <1>;/*1:enabel ;0:disable*/
+               wb_sel = <1>;/*1:mtx ;0:gainoff*/
+               vlock_en = <1>;/*1:enable;0:disable*/
+               vlock_mode = <0x4>;
+               /* vlock work mode:
+                *bit0:auto ENC
+                *bit1:auto PLL
+                *bit2:manual PLL
+                *bit3:manual ENC
+                *bit4:manual soft ENC
+                *bit5:manual MIX PLL ENC
+                */
+                vlock_pll_m_limit = <1>;
+                vlock_line_limit = <3>;
+       };
+
+       vdin@0 {
+               compatible = "amlogic, vdin";
+               /*memory-region = <&vdin0_cma_reserved>;*/
+               status = "disabled";
+               /*bit0:(1:share with codec_mm;0:cma alone)
+                *bit8:(1:alloc in discontinus way;0:alone in continuous way)
+                */
+               flag_cma = <0x101>;
+               /*MByte, if 10bit disable: 64M(YUV422),
+                *if 10bit enable: 64*1.5 = 96M(YUV422)
+                *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
+                *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
+                *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+                *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+                */
+               cma_size = <190>;
+               interrupts = <0 83 1>;
+               rdma-irq = <2>;
+               clocks = <&clkc CLKID_FCLK_DIV5>,
+                       <&clkc CLKID_VDIN_MEAS_COMP>;
+               clock-names = "fclk_div5", "cts_vdin_meas_clk";
+               vdin_id = <0>;
+               /*vdin write mem color depth support:
+                * bit0:support 8bit
+                * bit1:support 9bit
+                * bit2:support 10bit
+                * bit3:support 12bit
+                * bit4:support yuv422 10bit full pack mode (from txl new add)
+                * bit8:use 8bit  at 4k_50/60hz_10bit
+                * bit9:use 10bit at 4k_50/60hz_10bit
+                */
+               tv_bit_mode = <0x215>;
+               /* afbce_bit_mode: (amlogic frame buff compression encoder)
+                * 0: normal mode, not use afbce
+                * 1: use afbce non-mmu mode
+                * 2: use afbce mmu mode
+                */
+               afbce_bit_mode = <0>;
+       };
+
+       vdin@1 {
+               compatible = "amlogic, vdin";
+               memory-region = <&vdin1_cma_reserved>;
+               status = "disabled";
+               /*bit0:(1:share with codec_mm;0:cma alone)
+                *bit8:(1:alloc in discontinus way;0:alone in continuous way)
+                */
+               flag_cma = <0>;
+               interrupts = <0 85 1>;
+               rdma-irq = <4>;
+               clocks = <&clkc CLKID_FCLK_DIV5>,
+                       <&clkc CLKID_VDIN_MEAS_COMP>;
+               clock-names = "fclk_div5", "cts_vdin_meas_clk";
+               vdin_id = <1>;
+               /*vdin write mem color depth support:
+                *bit0:support 8bit
+                *bit1:support 9bit
+                *bit2:support 10bit
+                *bit3:support 12bit
+                */
+               tv_bit_mode = <0x15>;
+       };
+
+       hdmirx {
+               compatible = "amlogic, hdmirx_tl1";
+               #address-cells=<1>;
+               #size-cells=<1>;
+               memory-region = <&hdmirx_emp_cma_reserved>;
+               status = "okay";
+               pinctrl-names = "default";
+               pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux
+                       &hdmirx_c_mux>;
+               repeat = <0>;
+               interrupts = <0 41 1>;
+               clocks = <&clkc CLKID_HDMIRX_MODET_COMP>,
+                          <&clkc CLKID_HDMIRX_CFG_COMP>,
+                          <&clkc CLKID_HDMIRX_ACR_COMP>,
+                          <&clkc CLKID_HDMIRX_METER_COMP>,
+                          <&clkc CLKID_HDMIRX_AXI_COMP>,
+                          <&xtal>,
+                          <&clkc CLKID_FCLK_DIV5>,
+                          <&clkc CLKID_FCLK_DIV7>,
+                          <&clkc CLKID_HDCP22_SKP_COMP>,
+                          <&clkc CLKID_HDCP22_ESM_COMP>;
+               //         <&clkc CLK_AUD_PLL2FS>,
+               //         <&clkc CLK_AUD_PLL4FS>,
+               //         <&clkc CLK_AUD_OUT>;
+               clock-names = "hdmirx_modet_clk",
+                       "hdmirx_cfg_clk",
+                               "hdmirx_acr_ref_clk",
+                               "cts_hdmirx_meter_clk",
+                               "cts_hdmi_axi_clk",
+                               "xtal",
+                               "fclk_div5",
+                               "fclk_div7",
+                               "hdcp_rx22_skp",
+                               "hdcp_rx22_esm";
+               //              "hdmirx_aud_pll2fs",
+               //              "hdmirx_aud_pll4f",
+               //              "clk_aud_out";
+               hdmirx_id = <0>;
+               en_4k_2_2k = <0>;
+               hpd_low_cec_off = <1>;
+               /* bit4: enable feature, bit3~0: port number */
+               disable_port = <0x0>;
+               /* MAP_ADDR_MODULE_CBUS */
+               /* MAP_ADDR_MODULE_HIU */
+               /* MAP_ADDR_MODULE_HDMIRX_CAPB3 */
+               /* MAP_ADDR_MODULE_SEC_AHB */
+               /* MAP_ADDR_MODULE_SEC_AHB2 */
+               /* MAP_ADDR_MODULE_APB4 */
+               /* MAP_ADDR_MODULE_TOP */
+               reg = < 0x0 0x0 0x0 0x0 0x0 0xff63C000 0x0 0x2000
+                       0x0 0xffe0d000 0x0 0x2000
+                       0x0 0x0 0x0 0x0
+                       0x0 0x0 0x0 0x0
+                       0x0 0x0 0x0 0x0
+                       0x0 0xff610000 0x0 0xa000>;
+       };
+
+       aocec: aocec {
+               compatible = "amlogic, aocec-tl1";
+               /*device_name = "aocec";*/
+               status = "okay";
+               vendor_name = "Amlogic"; /* Max Chars: 8         */
+               /* Refer to the following URL at:
+                * http://standards.ieee.org/develop/regauth/oui/oui.txt
+                */
+               vendor_id = <0x000000>;
+               product_desc = "TL1"; /* Max Chars: 16    */
+               cec_osd_string = "AML_TV"; /* Max Chars: 14    */
+               port_num = <3>;
+               ee_cec;
+               arc_port_mask = <0x2>;
+               interrupts = <0 205 1
+                                       0 199 1>;
+               interrupt-names = "hdmi_aocecb","hdmi_aocec";
+               pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep";
+               pinctrl-0=<&aoceca_mux>;
+               pinctrl-1=<&aocecb_mux>;
+               pinctrl-2=<&aoceca_mux>;
+               reg = <0x0 0xFF80023c 0x0 0x4
+                          0x0 0xFF800000 0x0 0x400>;
+               reg-names = "ao_exit","ao";
+       };
+
+       /*DCDC for MP8756GD*/
+       cpu_opp_table0: cpu_opp_table0 {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp00 {
+                       opp-hz = /bits/ 64 <100000000>;
+                       opp-microvolt = <699000>;
+               };
+               opp01 {
+                       opp-hz = /bits/ 64 <250000000>;
+                       opp-microvolt = <699000>;
+               };
+               opp02 {
+                       opp-hz = /bits/ 64 <500000000>;
+                       opp-microvolt = <709000>;
+               };
+               opp03 {
+                       opp-hz = /bits/ 64 <667000000>;
+                       opp-microvolt = <719000>;
+               };
+               opp04 {
+                       opp-hz = /bits/ 64 <1000000000>;
+                       opp-microvolt = <729000>;
+               };
+               opp05 {
+                       opp-hz = /bits/ 64 <1200000000>;
+                       opp-microvolt = <749000>;
+               };
+               opp06 {
+                       opp-hz = /bits/ 64 <1398000000>;
+                       opp-microvolt = <769000>;
+               };
+               opp07 {
+                       opp-hz = /bits/ 64 <1512000000>;
+                       opp-microvolt = <779000>;
+               };
+               opp08 {
+                       opp-hz = /bits/ 64 <1608000000>;
+                       opp-microvolt = <789000>;
+               };
+               opp09 {
+                       opp-hz = /bits/ 64 <1704000000>;
+                       opp-microvolt = <829000>;
+               };
+               opp10 {
+                       opp-hz = /bits/ 64 <1800000000>;
+                       opp-microvolt = <879000>;
+               };
+               opp11 {
+                       opp-hz = /bits/ 64 <1908000000>;
+                       opp-microvolt = <929000>;
+               };
+       };
+
+       cpufreq-meson {
+               compatible = "amlogic, cpufreq-meson";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pwm_ao_d_pins3>;
+               status = "disabled";
+       };
+
+       tuner: tuner {
+               compatible = "amlogic, tuner";
+               status = "okay";
+               tuner_name = "mxl661_tuner";
+               tuner_i2c_adap = <&i2c0>;
+               tuner_i2c_addr = <0x60>;
+               tuner_xtal = <1>; /* 0: 16MHz, 1: 24MHz */
+               tuner_xtal_mode = <3>;
+                                       /* NO_SHARE_XTAL(0)
+                                        * SLAVE_XTAL_SHARE(3)
+                                        */
+               tuner_xtal_cap = <25>; /* when tuner_xtal_mode = 3, set 25 */
+       };
+
+       atv-demod {
+               compatible = "amlogic, atv-demod";
+               status = "okay";
+               tuner = <&tuner>;
+               btsc_sap_mode = <1>;
+               /* pinctrl-names="atvdemod_agc_pins"; */
+               /* pinctrl-0=<&atvdemod_agc_pins>; */
+               reg = <0xff656000 0x2000 /* demod reg */
+                               0xff63c000 0x2000 /* hiu reg */
+                               0xff634000 0x2000 /* periphs reg */
+                               0xff64a000 0x2000>; /* audio reg */
+               reg_23cf = <0x88188832>;
+               /*default:0x88188832;r840 on haier:0x48188832*/
+       };
+
+       sd_emmc_b: sd@ffe05000 {
+               status = "disabled";
+               compatible = "amlogic, meson-mmc-tl1";
+               reg = <0x0 0xffe05000 0x0 0x800>;
+               interrupts = <0 190 1>;
+
+               pinctrl-names = "sd_all_pins",
+                       "sd_clk_cmd_pins",
+                       "sd_1bit_pins";
+               pinctrl-0 = <&sd_all_pins>;
+               pinctrl-1 = <&sd_clk_cmd_pins>;
+               pinctrl-2 = <&sd_1bit_pins>;
+
+               clocks = <&clkc CLKID_SD_EMMC_B>,
+                       <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+                       <&clkc CLKID_FCLK_DIV2>,
+                       <&clkc CLKID_FCLK_DIV5>,
+                       <&xtal>;
+               clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+               bus-width = <4>;
+               cap-sd-highspeed;
+               cap-mmc-highspeed;
+               max-frequency = <100000000>;
+               disable-wp;
+               sd {
+                       pinname = "sd";
+                       ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+                       caps = "MMC_CAP_4_BIT_DATA",
+                               "MMC_CAP_MMC_HIGHSPEED",
+                               "MMC_CAP_SD_HIGHSPEED",
+                               "MMC_CAP_NONREMOVABLE"; /**ptm debug */
+                       f_min = <400000>;
+                       f_max = <200000000>;
+                       max_req_size = <0x20000>; /**128KB*/
+                       no_sduart = <1>;
+                       gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
+                       jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
+                       gpio_cd = <&gpio GPIOC_10 GPIO_ACTIVE_HIGH>;
+                       card_type = <5>;
+               };
+       };
+};/* end of / */
+
+
+&i2c0 {
+       status = "okay";
+       clock-frequency = <300000>;
+       pinctrl-names="default";
+       pinctrl-0=<&i2c0_dv_pins>;
+};
+
+&audiobus {
+       tdma:tdm@0 {
+               compatible = "amlogic, tl1-snd-tdma";
+               #sound-dai-cells = <0>;
+
+               dai-tdm-lane-slot-mask-in = <1 0>;
+               dai-tdm-lane-slot-mask-out = <1 0>;
+               dai-tdm-clk-sel = <0>;
+
+               clocks = <&clkaudio CLKID_AUDIO_MCLK_A
+                               &clkc CLKID_MPLL0>;
+               clock-names = "mclk", "clk_srcpll";
+
+               pinctrl-names = "tdm_pins";
+               pinctrl-0 = <&tdma_mclk &tdmout_a &tdmin_a>;
+
+               status = "okay";
+       };
+
+       tdmb:tdm@1 {
+               compatible = "amlogic, tl1-snd-tdmb";
+               #sound-dai-cells = <0>;
+
+               dai-tdm-lane-slot-mask-in = <1 0 0 0>;
+               dai-tdm-lane-slot-mask-out = <1 0 0 0>;
+               dai-tdm-clk-sel = <1>;
+
+               clocks = <&clkaudio CLKID_AUDIO_MCLK_B
+                               &clkc CLKID_MPLL1>;
+               clock-names = "mclk", "clk_srcpll";
+
+               status = "okay";
+       };
+
+       tdmc:tdm@2 {
+               compatible = "amlogic, tl1-snd-tdmc";
+               #sound-dai-cells = <0>;
+
+               dai-tdm-lane-slot-mask-in = <1 0 0 0>;
+               dai-tdm-lane-slot-mask-out = <1 0 0 0>;
+               dai-tdm-clk-sel = <2>;
+
+               clocks = <&clkaudio CLKID_AUDIO_MCLK_C
+                               &clkc CLKID_MPLL2>;
+               clock-names = "mclk", "clk_srcpll";
+
+               pinctrl-names = "tdm_pins";
+               pinctrl-0 = <&tdmout_c &tdmin_c>;
+
+               status = "okay";
+       };
+
+       spdifa:spdif@0 {
+               compatible = "amlogic, tl1-snd-spdif-a";
+               #sound-dai-cells = <0>;
+
+               clocks = <&clkc CLKID_MPLL0
+                               &clkc CLKID_FCLK_DIV4
+                               &clkaudio CLKID_AUDIO_GATE_SPDIFIN
+                               &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_A
+                               &clkaudio CLKID_AUDIO_SPDIFIN
+                               &clkaudio CLKID_AUDIO_SPDIFOUT_A>;
+               clock-names = "sysclk", "fixed_clk", "gate_spdifin",
+                               "gate_spdifout", "clk_spdifin", "clk_spdifout";
+
+               interrupts =
+                               <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
+               interrupt-names = "irq_spdifin";
+
+               pinctrl-names = "spdif_pins";
+               pinctrl-0 = <&spdifout_a &spdifin_a>;
+
+               /*
+                * whether do asrc for pcm and resample a or b
+                * if raw data, asrc is disabled automatically
+                * 0: "Disable",
+                * 1: "Enable:32K",
+                * 2: "Enable:44K",
+                * 3: "Enable:48K",
+                * 4: "Enable:88K",
+                * 5: "Enable:96K",
+                * 6: "Enable:176K",
+                * 7: "Enable:192K",
+                */
+               asrc_id = <0>;
+               auto_asrc = <0>;
+
+               status = "okay";
+       };
+
+       spdifb:spdif@1 {
+               compatible = "amlogic, tl1-snd-spdif-b";
+               #sound-dai-cells = <0>;
+
+               clocks = <&clkc CLKID_MPLL0 /*CLKID_HIFI_PLL*/
+                               &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_B
+                               &clkaudio CLKID_AUDIO_SPDIFOUT_B>;
+               clock-names = "sysclk",
+                               "gate_spdifout", "clk_spdifout";
+
+               status = "okay";
+       };
+
+       pdm:pdm {
+               compatible = "amlogic, tl1-snd-pdm";
+               #sound-dai-cells = <0>;
+
+               clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+                       &clkc CLKID_FCLK_DIV3
+                       &clkc CLKID_MPLL3
+                       &clkaudio CLKID_AUDIO_PDMIN0
+                       &clkaudio CLKID_AUDIO_PDMIN1>;
+               clock-names = "gate",
+                       "sysclk_srcpll",
+                       "dclk_srcpll",
+                       "pdm_dclk",
+                       "pdm_sysclk";
+
+               pinctrl-names = "pdm_pins";
+               pinctrl-0 = <&pdmin>;
+
+               /* mode 0~4, defalut:1 */
+               filter_mode = <1>;
+
+               status = "okay";
+       };
+
+       extn:extn {
+               compatible = "amlogic, snd-extn";
+               #sound-dai-cells = <0>;
+
+               interrupts =
+                               <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
+               interrupt-names = "irq_frhdmirx";
+
+               status = "okay";
+       };
+
+       aed:effect {
+               compatible = "amlogic, snd-effect-v2";
+               #sound-dai-cells = <0>;
+
+               clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
+                       &clkc CLKID_FCLK_DIV5
+                       &clkaudio CLKID_AUDIO_EQDRC>;
+               clock-names = "gate", "clk_srcpll", "eqdrc";
+
+               eq_enable = <1>;
+               multiband_drc_enable = <0>;
+               fullband_drc_enable = <0>;
+               /*
+                * 0:tdmout_a
+                * 1:tdmout_b
+                * 2:tdmout_c
+                * 3:spdifout
+                * 4:spdifout_b
+                */
+               eqdrc_module = <1>;
+               /* max 0xf, each bit for one lane, usually one lane */
+               lane_mask = <0x1>;
+               /* max 0xff, each bit for one channel */
+               channel_mask = <0x3>;
+
+               status = "disabled";
+       };
+
+       asrca: resample@0 {
+               compatible = "amlogic, tl1-resample-a";
+               clocks = <&clkc CLKID_MPLL3
+                               &clkaudio CLKID_AUDIO_MCLK_F
+                               &clkaudio CLKID_AUDIO_RESAMPLE_A>;
+               clock-names = "resample_pll", "resample_src", "resample_clk";
+               /*same with toddr_src
+                *      TDMIN_A, 0
+                *      TDMIN_B, 1
+                *      TDMIN_C, 2
+                *      SPDIFIN, 3
+                *      PDMIN,  4
+                *      NONE,
+                *      TDMIN_LB, 6
+                *      LOOPBACK, 7
+                */
+               resample_module = <3>;
+
+               status = "disabled";
+       };
+
+       asrcb: resample@1 {
+               compatible = "amlogic, tl1-resample-b";
+
+               clocks = <&clkc CLKID_MPLL3
+                       &clkaudio CLKID_AUDIO_MCLK_F
+                       &clkaudio CLKID_AUDIO_RESAMPLE_B>;
+               clock-names = "resample_pll", "resample_src", "resample_clk";
+
+               /*same with toddr_src
+                *      TDMIN_A, 0
+                *      TDMIN_B, 1
+                *      TDMIN_C, 2
+                *      SPDIFIN, 3
+                *      PDMIN,  4
+                *      NONE,
+                *      TDMIN_LB, 6
+                *      LOOPBACK, 7
+                */
+               resample_module = <3>;
+
+               status = "disabled";
+       };
+
+}; /* end of audiobus */
+&pinctrl_periphs {
+       /* audio pin mux */
+
+       tdma_mclk: tdma_mclk {
+               mux { /* GPIOZ_0 */
+                       groups = "mclk0_z";
+                       function = "mclk0";
+               };
+       };
+
+       tdmout_a: tdmout_a {
+               mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3, GPIOZ_5, GPIOZ_6 */
+                       groups = "tdma_sclk_z",
+                               "tdma_fs_z",
+                               "tdma_dout0_z",
+                               "tdma_dout2_z",
+                               "tdma_dout3_z";
+                       function = "tdma_out";
+               };
+       };
+
+       tdmin_a: tdmin_a {
+               mux { /* GPIOZ_9 */
+                       groups = "tdma_din2_z";
+                       function = "tdma_in";
+               };
+       };
+
+       tdmout_c: tdmout_c {
+               mux { /* GPIODV_7, GPIODV_8, GPIODV_9 */
+                       groups = "tdmc_sclk",
+                               "tdmc_fs",
+                               "tdmc_dout0";
+                       function = "tdmc_out";
+               };
+       };
+
+       tdmin_c: tdmin_c {
+               mux { /* GPIODV_10 */
+                       groups = "tdmc_din1";
+                       function = "tdmc_in";
+               };
+       };
+
+       spdifin_a: spdifin_a {
+               mux { /* GPIODV_5 */
+                       groups = "spdif_in";
+                       function = "spdif_in";
+               };
+       };
+
+       spdifout_a: spdifout_a {
+               mux { /* GPIODV_4 */
+                       groups = "spdif_out_dv4";
+                       function = "spdif_out";
+               };
+       };
+
+       pdmin: pdmin {
+               mux { /* GPIOZ_7, GPIOZ_8*/
+                       groups = "pdm_dclk_z",
+                               "pdm_din0_z";
+                       function = "pdm";
+               };
+       };
+
+
+}; /* end of pinctrl_periphs */
+
+&pinctrl_aobus {
+       spdifout: spdifout {
+               mux { /* gpiao_10 */
+                       groups = "spdif_out_ao";
+                       function = "spdif_out_ao";
+               };
+       };
+};  /* end of pinctrl_aobus */
+
+&sd_emmc_b {
+       status = "disabled";
+       sd {
+               caps = "MMC_CAP_4_BIT_DATA",
+                       "MMC_CAP_MMC_HIGHSPEED",
+                       "MMC_CAP_SD_HIGHSPEED",
+                       "MMC_CAP_NONREMOVABLE"; /**ptm debug */
+               f_min = <400000>;
+               f_max = <200000000>;
+       };
+};
+
+&spifc {
+       status = "disabled";
+       spi-nor@0 {
+               cs_gpios = <&gpio BOOT_13 GPIO_ACTIVE_HIGH>;
+       };
+};
+
+&slc_nand {
+       status = "disabled";
+       plat-names = "bootloader", "nandnormal";
+       plat-num = <2>;
+       plat-part-0 = <&bootloader>;
+       plat-part-1 = <&nandnormal>;
+       bootloader: bootloader{
+               enable_pad = "ce0";
+               busy_pad = "rb0";
+               timming_mode = "mode5";
+               bch_mode = "bch8_1k";
+               t_rea = <20>;
+               t_rhoh = <15>;
+               chip_num = <1>;
+               part_num = <0>;
+               rb_detect = <1>;
+       };
+       nandnormal: nandnormal{
+               enable_pad = "ce0";
+               busy_pad = "rb0";
+               timming_mode = "mode5";
+               bch_mode = "bch8_1k";
+               plane_mode = "twoplane";
+               t_rea = <20>;
+               t_rhoh = <15>;
+               chip_num = <2>;
+               part_num = <3>;
+               partition = <&nand_partitions>;
+               rb_detect = <1>;
+       };
+       nand_partitions:nand_partition{
+               /*
+                * if bl_mode is 1, tpl size was generate by
+                * fip_copies * fip_size which
+                * will not skip bad when calculating
+                * the partition size;
+                *
+                * if bl_mode is 0,
+                * tpl partition must be comment out.
+                */
+               tpl{
+                       offset=<0x0 0x0>;
+                       size=<0x0 0x0>;
+               };
+               logo{
+                       offset=<0x0 0x0>;
+                       size=<0x0 0x200000>;
+               };
+               recovery{
+                       offset=<0x0 0x0>;
+                       size=<0x0 0x1000000>;
+               };
+               boot{
+                       offset=<0x0 0x0>;
+                       size=<0x0 0x1000000>;
+               };
+               system{
+                       offset=<0x0 0x0>;
+                       size=<0x0 0x4000000>;
+               };
+               data{
+                       offset=<0xffffffff 0xffffffff>;
+                       size=<0x0 0x0>;
+               };
+       };
+};
+
+&dwc3 {
+       status = "disabled";
+};
+
+&usb2_phy_v2 {
+       status = "disabled";
+       portnum = <3>;
+};
+
+&usb3_phy_v2 {
+       status = "disabled";
+       portnum = <0>;
+       otg = <0>;
+};
+
+&dwc2_a {
+       status = "disabled";
+       /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
+       controller-type = <1>;
+};
+
+&spicc0 {
+       status = "disabled";
+       pinctrl-names = "default";
+       pinctrl-0 = <&spicc0_pins_h>;
+       cs-gpios = <&gpio GPIOH_20 0>;
+};
+
+&meson_fb {
+       status = "okay";
+       display_size_default = <1920 1080 1920 2160 32>;
+       mem_size = <0x00800000 0x1980000 0x100000 0x800000>;
+       logo_addr = "0x7f800000";
+       mem_alloc = <1>;
+       pxp_mode = <1>; /** 0:normal mode 1:pxp mode */
+};
+
+&pwm_AO_cd {
+       status = "disabled";
+};
+
+&efuse {
+       status = "disabled";
+};
index a014162..88bb658 100755 (executable)
@@ -13,6 +13,5 @@ make ARCH=arm txl_t962_p321.dtb
 make ARCH=arm txlx_t962e_r321.dtb
 make ARCH=arm txlx_t962x_r311_1g.dtb
 make ARCH=arm txlx_t962x_r311_2g.dtb
-
-
+make ARCH=arm tm2_pxp.dtb
 
index 1fc3549..6c55986 100755 (executable)
@@ -45,3 +45,5 @@ make ARCH=arm64 g12b_pxp.dtb || echo "Compile dtb Fail!!"
 make ARCH=arm64 g12b_a311d_skt.dtb || echo "Compile dtb Fail!!"
 
 make ARCH=arm64 g12b_a311d_w400.dtb || echo "Compile dtb Fail!!"
+
+make ARCH=arm64 tm2_pxp.dtb || echo "Compile dtb Fail!!"