ret i1 %c
}
+; FIXME: Vectors should fold the same way.
+
+define <2 x i1> @test10vec(<2 x i8> %a, <2 x i8> %b) {
+; CHECK-LABEL: @test10vec(
+; CHECK-NEXT: [[C:%.*]] = add <2 x i8> %a, %b
+; CHECK-NEXT: [[D:%.*]] = icmp ne <2 x i8> [[C]], zeroinitializer
+; CHECK-NEXT: ret <2 x i1> [[D]]
+;
+ %c = add <2 x i8> %a, %b
+ %d = icmp ne <2 x i8> %c, zeroinitializer
+ ret <2 x i1> %d
+}
+
define i1 @test11(i8 %A) {
; CHECK-LABEL: @test11(
; CHECK-NEXT: [[C:%.*]] = icmp ne i8 %A, 1
ret i1 %c
}
+; FIXME: Vectors should fold the same way.
+define <2 x i1> @test11vec(<2 x i8> %a) {
+; CHECK-LABEL: @test11vec(
+; CHECK-NEXT: [[B:%.*]] = add <2 x i8> %a, <i8 -1, i8 -1>
+; CHECK-NEXT: [[C:%.*]] = icmp ne <2 x i8> [[B]], zeroinitializer
+; CHECK-NEXT: ret <2 x i1> [[C]]
+;
+ %b = add <2 x i8> %a, <i8 -1, i8 -1>
+ %c = icmp ne <2 x i8> %b, zeroinitializer
+ ret <2 x i1> %c
+}
+
; Should be transformed into shl A, 1?
define i32 @test12(i32 %A, i32 %B) {
ret i1 %y
}
+; FIXME: Vectors should fold the same way.
+define <2 x i1> @test21vec(<2 x i32> %x) {
+; CHECK-LABEL: @test21vec(
+; CHECK-NEXT: [[T:%.*]] = add <2 x i32> %x, <i32 4, i32 4>
+; CHECK-NEXT: [[Y:%.*]] = icmp eq <2 x i32> [[T]], <i32 123, i32 123>
+; CHECK-NEXT: ret <2 x i1> [[Y]]
+;
+ %t = add <2 x i32> %x, <i32 4, i32 4>
+ %y = icmp eq <2 x i32> %t, <i32 123, i32 123>
+ ret <2 x i1> %y
+}
+
define i32 @test22(i32 %V) {
; CHECK-LABEL: @test22(
; CHECK-NEXT: switch i32 %V, label %Default [
ret i1 %C
}
+; FIXME: Vectors should fold the same way.
+
+define <2 x i1> @test9vec(<2 x i8> %a) {
+; CHECK-LABEL: @test9vec(
+; CHECK-NEXT: [[B:%.*]] = xor <2 x i8> %a, <i8 123, i8 123>
+; CHECK-NEXT: [[C:%.*]] = icmp eq <2 x i8> [[B]], <i8 34, i8 34>
+; CHECK-NEXT: ret <2 x i1> [[C]]
+;
+ %b = xor <2 x i8> %a, <i8 123, i8 123>
+ %c = icmp eq <2 x i8> %b, <i8 34, i8 34>
+ ret <2 x i1> %c
+}
+
define i8 @test10(i8 %A) {
; CHECK-LABEL: @test10(
; CHECK-NEXT: [[B:%.*]] = and i8 %A, 3
ret i1 %c
}
+; FIXME: Vectors should fold the same way.
+
+define <2 x i1> @test12vec(<2 x i8> %a) {
+; CHECK-LABEL: @test12vec(
+; CHECK-NEXT: [[B:%.*]] = xor <2 x i8> %a, <i8 4, i8 4>
+; CHECK-NEXT: [[C:%.*]] = icmp ne <2 x i8> [[B]], zeroinitializer
+; CHECK-NEXT: ret <2 x i1> [[C]]
+;
+ %b = xor <2 x i8> %a, <i8 4, i8 4>
+ %c = icmp ne <2 x i8> %b, zeroinitializer
+ ret <2 x i1> %c
+}
+
define i1 @test13(i8 %A, i8 %B) {
; CHECK-LABEL: @test13(
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i8 %A, %B
define i32 @test22(i1 %X) {
; CHECK-LABEL: @test22(
-; CHECK-NEXT: [[TMP1:%.*]] = zext i1 %X to i32
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[Z:%.*]] = zext i1 %X to i32
+; CHECK-NEXT: ret i32 [[Z]]
;
%Y = xor i1 %X, true
%Z = zext i1 %Y to i32
define i32 @fold_zext_xor_sandwich(i1 %X) {
; CHECK-LABEL: @fold_zext_xor_sandwich(
-; CHECK-NEXT: [[TMP1:%.*]] = zext i1 %X to i32
-; CHECK-NEXT: [[Q:%.*]] = xor i32 [[TMP1]], 3
+; CHECK-NEXT: [[Z:%.*]] = zext i1 %X to i32
+; CHECK-NEXT: [[Q:%.*]] = xor i32 [[Z]], 3
; CHECK-NEXT: ret i32 [[Q]]
;
%Y = xor i1 %X, true
define <2 x i32> @fold_zext_xor_sandwich_vec(<2 x i1> %X) {
; CHECK-LABEL: @fold_zext_xor_sandwich_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = zext <2 x i1> %X to <2 x i32>
-; CHECK-NEXT: [[Q:%.*]] = xor <2 x i32> [[TMP1]], <i32 3, i32 3>
+; CHECK-NEXT: [[Z:%.*]] = zext <2 x i1> %X to <2 x i32>
+; CHECK-NEXT: [[Q:%.*]] = xor <2 x i32> [[Z]], <i32 3, i32 3>
; CHECK-NEXT: ret <2 x i32> [[Q]]
;
%Y = xor <2 x i1> %X, <i1 true, i1 true>