rtw89: modify dcfo_comp to share with chips
authorYuan-Han Zhang <yuanhan1020@realtek.com>
Thu, 17 Mar 2022 05:55:32 +0000 (13:55 +0800)
committerKalle Valo <kvalo@kernel.org>
Thu, 17 Mar 2022 14:19:55 +0000 (16:19 +0200)
The dcfo_comp is digital CFO (central frequency offset) compensation.
Since the flow can be shared with all chips, add chip parameters to support
variant register address and format.

Signed-off-by: Yuan-Han Zhang <yuanhan1020@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20220317055543.40514-2-pkshih@realtek.com
drivers/net/wireless/realtek/rtw89/core.h
drivers/net/wireless/realtek/rtw89/phy.c
drivers/net/wireless/realtek/rtw89/reg.h
drivers/net/wireless/realtek/rtw89/rtw8852a.c
drivers/net/wireless/realtek/rtw89/rtw8852c.c

index 483cf45..51c99e5 100644 (file)
@@ -2332,6 +2332,8 @@ struct rtw89_chip_info {
        u32 c2h_ctrl_reg;
        const u32 *c2h_regs;
        const struct rtw89_page_regs *page_regs;
+       const struct rtw89_reg_def *dcfo_comp;
+       u8 dcfo_comp_sft;
 };
 
 union rtw89_bus_info {
index c6953a7..6a7e08b 100644 (file)
@@ -1705,9 +1705,11 @@ static void rtw89_phy_cfo_reset(struct rtw89_dev *rtwdev)
 
 static void rtw89_dcfo_comp(struct rtw89_dev *rtwdev, s32 curr_cfo)
 {
+       const struct rtw89_reg_def *dcfo_comp = rtwdev->chip->dcfo_comp;
        bool is_linked = rtwdev->total_sta_assoc > 0;
        s32 cfo_avg_312;
-       s32 dcfo_comp;
+       s32 dcfo_comp_val;
+       u8 dcfo_comp_sft = rtwdev->chip->dcfo_comp_sft;
        int sign;
 
        if (!is_linked) {
@@ -1718,13 +1720,13 @@ static void rtw89_dcfo_comp(struct rtw89_dev *rtwdev, s32 curr_cfo)
        rtw89_debug(rtwdev, RTW89_DBG_CFO, "DCFO: curr_cfo=%d\n", curr_cfo);
        if (curr_cfo == 0)
                return;
-       dcfo_comp = rtw89_phy_read32_mask(rtwdev, R_DCFO, B_DCFO);
+       dcfo_comp_val = rtw89_phy_read32_mask(rtwdev, R_DCFO, B_DCFO);
        sign = curr_cfo > 0 ? 1 : -1;
-       cfo_avg_312 = (curr_cfo << 3) / 5 + sign * dcfo_comp;
+       cfo_avg_312 = (curr_cfo << dcfo_comp_sft) / 5 + sign * dcfo_comp_val;
        rtw89_debug(rtwdev, RTW89_DBG_CFO, "DCFO: avg_cfo=%d\n", cfo_avg_312);
        if (rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv == CHIP_CBV)
                cfo_avg_312 = -cfo_avg_312;
-       rtw89_phy_set_phy_regs(rtwdev, R_DCFO_COMP_S0, B_DCFO_COMP_S0_MSK,
+       rtw89_phy_set_phy_regs(rtwdev, dcfo_comp->addr, dcfo_comp->mask,
                               cfo_avg_312);
 }
 
index ec5e70b..a239bf0 100644 (file)
 #define R_CHBW_MOD 0x4978
 #define B_CHBW_MOD_PRICH GENMASK(11, 8)
 #define B_CHBW_MOD_SBW GENMASK(13, 12)
+#define R_DCFO_COMP_S0_V1 0x4A40
+#define B_DCFO_COMP_S0_V1_MSK GENMASK(13, 0)
 #define R_BMODE_PDTH_V1 0x4B64
 #define B_BMODE_PDTH_LOWER_BOUND_MSK_V1 GENMASK(31, 24)
 #define R_BMODE_PDTH_EN_V1 0x4B74
index c429eea..392f6e6 100644 (file)
@@ -402,6 +402,10 @@ static const struct rtw89_page_regs rtw8852a_page_regs = {
        .wp_page_info1  = R_AX_WP_PAGE_INFO1,
 };
 
+static const struct rtw89_reg_def rtw8852a_dcfo_comp = {
+       R_DCFO_COMP_S0, B_DCFO_COMP_S0_MSK
+};
+
 static void rtw8852ae_efuse_parsing(struct rtw89_efuse *efuse,
                                    struct rtw8852a_efuse *map)
 {
@@ -2091,6 +2095,8 @@ const struct rtw89_chip_info rtw8852a_chip_info = {
        .c2h_ctrl_reg           = R_AX_C2HREG_CTRL,
        .c2h_regs               = rtw8852a_c2h_regs,
        .page_regs              = &rtw8852a_page_regs,
+       .dcfo_comp              = &rtw8852a_dcfo_comp,
+       .dcfo_comp_sft          = 3,
 };
 EXPORT_SYMBOL(rtw8852a_chip_info);
 
index 35a9f40..f37acfe 100644 (file)
@@ -44,6 +44,10 @@ static const struct rtw89_page_regs rtw8852c_page_regs = {
        .wp_page_info1  = R_AX_WP_PAGE_INFO1_V1,
 };
 
+static const struct rtw89_reg_def rtw8852c_dcfo_comp = {
+       R_DCFO_COMP_S0_V1, B_DCFO_COMP_S0_V1_MSK
+};
+
 static int rtw8852c_pwr_on_func(struct rtw89_dev *rtwdev)
 {
        u32 val32;
@@ -470,6 +474,8 @@ const struct rtw89_chip_info rtw8852c_chip_info = {
        .c2h_ctrl_reg           = R_AX_C2HREG_CTRL_V1,
        .c2h_regs               = rtw8852c_c2h_regs,
        .page_regs              = &rtw8852c_page_regs,
+       .dcfo_comp              = &rtw8852c_dcfo_comp,
+       .dcfo_comp_sft          = 5,
 };
 EXPORT_SYMBOL(rtw8852c_chip_info);