* config/tc-cris.c: Likewise.
* config/tc-hppa.c: Likewise.
* config/tc-i370.c: Likewise.
* config/tc-mips.c: Likewise.
* config/tc-mn10200.c: Likewise.
* config/tc-mn10300.c: Likewise.
* config/tc-sh.c: Likewise.
* config/tc-tahoe.c: Likewise.
* config/tc-v850.c: Likewise.
2001-10-11 Kazu Hirata <kazu@hxi.com>
+ * config/tc-alpha.c: Fix comment typos.
+ * config/tc-cris.c: Likewise.
+ * config/tc-hppa.c: Likewise.
+ * config/tc-i370.c: Likewise.
+ * config/tc-mips.c: Likewise.
+ * config/tc-mn10200.c: Likewise.
+ * config/tc-mn10300.c: Likewise.
+ * config/tc-sh.c: Likewise.
+ * config/tc-tahoe.c: Likewise.
+ * config/tc-v850.c: Likewise.
+
+2001-10-11 Kazu Hirata <kazu@hxi.com>
+
* app.c: Fix comment typos.
* bit_fix.h: Likewise.
* expr.c: Likewise.
}
/* Return true if we must always emit a reloc for a type and false if
- there is some hope of resolving it a assembly time. */
+ there is some hope of resolving it at assembly time. */
int
alpha_force_relocation (f)
break;
/* Allow complex expressions as the constant part. It still
- has to be a assembly-time constant or there will be an
+ has to be an assembly-time constant or there will be an
error emitting the reloc. This makes the PIC qualifiers
idempotent; foo:GOTOFF+32 == foo+32:GOTOFF. The former we
recognize here; the latter is parsed in the incoming
{
/* Sigh. To be compatable with the HP assembler and to help
poorly written assembly code, we assign a type based on
- the the current segment. Note only BSF_FUNCTION really
+ the current segment. Note only BSF_FUNCTION really
matters, we do not need to set the full SYMBOL_TYPE_* info. */
if (now_seg == text_section)
symbol_get_bfdsym (symbol)->flags |= BSF_FUNCTION;
return 1;
/* It is necessary to force PC-relative calls/jumps to have a relocation
- entry if they're going to need either a argument relocation or long
+ entry if they're going to need either an argument relocation or long
call stub. */
if (fixp->fx_pcrel
&& arg_reloc_stub_needed (symbol_arg_reloc_info (fixp->fx_addsy),
*
* in: Input_line_pointer points to 1st char of operand.
*
- * out: A expressionS.
+ * out: An expressionS.
* The operand may have been a register: in this case, X_op == O_register,
* X_add_number is set to the register number, and truth is returned.
* Input_line_pointer->(next non-blank) char after operand, or is in its
}
}
- /* check for a address constant expression */
+ /* Check for an address constant expression. */
/* We will put PSW-relative addresses in the text section,
* and adress literals in the .data (or other) section. */
else if (i370_addr_cons (&ex))
static int mips_trap;
/* 1 if double width floating point constants should not be constructed
- by a assembling two single width halves into two single width floating
+ by assembling two single width halves into two single width floating
point registers which just happen to alias the double width destination
register. On some architectures this aliasing can be disabled by a bit
in the status register, and the setting of this bit cannot be determined
|| *reloc_type == BFD_RELOC_16_PCREL_S2),
reloc_type[0]);
- /* These relocations can have a addend that won't fit in
+ /* These relocations can have an addend that won't fit in
4 octets for 64bit assembly. */
if (HAVE_64BIT_GPRS &&
(*reloc_type == BFD_RELOC_16
4, address_expr, false,
reloc_type[1]);
- /* These relocations can have a addend that won't fit in
+ /* These relocations can have an addend that won't fit in
4 octets for 64bit assembly. */
if (HAVE_64BIT_GPRS &&
(*reloc_type == BFD_RELOC_16
address_expr, false,
reloc_type[2]);
- /* These relocations can have a addend that won't fit in
+ /* These relocations can have an addend that won't fit in
4 octets for 64bit assembly. */
if (HAVE_64BIT_GPRS &&
(*reloc_type == BFD_RELOC_16
case '<': /* must be at least one digit */
/*
* According to the manual, if the shift amount is greater
- * than 31 or less than 0 the the shift amount should be
- * mod 32. In reality the mips assembler issues an error.
+ * than 31 or less than 0, then the shift amount should be
+ * mod 32. In reality the mips assembler issues an error.
* We issue a warning and mask out all but the low 5 bits.
*/
my_getExpression (&imm_expr, s);
/* A percent_op was encountered. */
if (nest_level)
{
- /* Don't try to get a expression if it is already blanked out. */
+ /* Don't try to get an expression if it is already blanked out. */
if (*(str + strspn (str + 1, " )")) != ')')
{
char save;
#ifdef OBJ_ELF
/* The ELF backend needs to know that we are changing sections, so
that .previous works correctly. We could do something like check
- for a obj_section_change_hook macro, but that might be confusing
+ for an obj_section_change_hook macro, but that might be confusing
as it would not be appropriate to use it in the section changing
functions in read.c, since obj-elf.c intercepts those. FIXME:
This should be cleaner, somehow. */
return;
}
- /* .cpload should be a in .set noreorder section. */
+ /* .cpload should be in .set noreorder section. */
if (mips_opts.noreorder == 0)
as_warn (_(".cpload not in noreorder section"));
*
* in: Input_line_pointer points to 1st char of operand.
*
- * out: A expressionS.
+ * out: An expressionS.
* The operand may have been a register: in this case, X_op == O_register,
* X_add_number is set to the register number, and truth is returned.
* Input_line_pointer->(next non-blank) char after operand, or is in
*
* in: Input_line_pointer points to 1st char of operand.
*
- * out: A expressionS.
+ * out: An expressionS.
* The operand may have been a register: in this case, X_op == O_register,
* X_add_number is set to the register number, and truth is returned.
* Input_line_pointer->(next non-blank) char after operand, or is in
*
* in: Input_line_pointer points to 1st char of operand.
*
- * out: A expressionS.
+ * out: An expressionS.
* The operand may have been a register: in this case, X_op == O_register,
* X_add_number is set to the register number, and truth is returned.
* Input_line_pointer->(next non-blank) char after operand, or is in
*
* in: Input_line_pointer points to 1st char of operand.
*
- * out: A expressionS.
+ * out: An expressionS.
* The operand may have been a register: in this case, X_op == O_register,
* X_add_number is set to the register number, and truth is returned.
* Input_line_pointer->(next non-blank) char after operand, or is in
*
* in: Input_line_pointer points to 1st char of operand.
*
- * out: A expressionS.
+ * out: An expressionS.
* The operand may have been a register: in this case, X_op == O_register,
* X_add_number is set to the register number, and truth is returned.
* Input_line_pointer->(next non-blank) char after operand, or is in
*
* in: Input_line_pointer points to 1st char of operand.
*
- * out: A expressionS.
+ * out: An expressionS.
* The operand may have been a register: in this case, X_op == O_register,
* X_add_number is set to the register number, and truth is returned.
* Input_line_pointer->(next non-blank) char after operand, or is in
*
* in: Input_line_pointer points to 1st char of operand.
*
- * out: A expressionS.
+ * out: An expressionS.
* The operand may have been a register: in this case, X_op == O_register,
* X_add_number is set to the register number, and truth is returned.
* Input_line_pointer->(next non-blank) char after operand, or is in
*
* in: Input_line_pointer points to 1st char of operand.
*
- * out: A expressionS.
+ * out: An expressionS.
* The operand may have been a register: in this case, X_op == O_register,
* X_add_number is set to the register number, and truth is returned.
* Input_line_pointer->(next non-blank) char after operand, or is in
/* Toggle the true/false bit of the bcond. */
buffer[highbyte] ^= 0x2;
- /* If this is a dalayed branch, we may not put the the bra in the
+ /* If this is a dalayed branch, we may not put the bra in the
slot. So we change it to a non-delayed branch, like that:
b! cond slot_label; bra disp; slot_label: slot_insn
??? We should try if swapping the conditional branch and
default:
/*
- * Major bug. We can't handle the case of a operator
+ * Major bug. We can't handle the case of an operator
* expression in a synthetic opcode variable-length
* instruction. We don't have a frag type that is smart
- * enough to relax a operator, and so we just force all
+ * enough to relax an operator, and so we just force all
* operators to behave like SEG_PASS1s. Clearly, if there is
* a demand we can invent a new or modified frag type and
* then coding up a frag for this case will be easy.
}
else
{
- /* It's a integer, and I know it's size. */
+ /* It's an integer, and I know it's size. */
if ((unsigned) this_add_number < 0x40)
{
/* Will it fit in a literal? */
*
* in: Input_line_pointer points to 1st char of operand.
*
- * out: A expressionS.
+ * out: An expressionS.
* The operand may have been a register: in this case, X_op == O_register,
* X_add_number is set to the register number, and truth is returned.
* Input_line_pointer->(next non-blank) char after operand, or is in
* ACCEPT_LIST_NAMES is true iff the special names PS and SR may be
* accepted.
*
- * out: A expressionS structure in expressionP.
+ * out: An expressionS structure in expressionP.
* The operand may have been a register: in this case, X_op == O_register,
* X_add_number is set to the register number, and truth is returned.
* Input_line_pointer->(next non-blank) char after operand, or is in
*
* in: INPUT_LINE_POINTER points to 1st char of operand.
*
- * out: A expressionS.
+ * out: An expressionS.
* The operand may have been a register: in this case, X_op == O_register,
* X_add_number is set to the register number, and truth is returned.
* Input_line_pointer->(next non-blank) char after operand, or is in
projects / external / binutils.git / commitdiff