/**
* SPARCCPUClass:
+ * @parent_realize: The parent class' realize handler.
* @parent_reset: The parent class' reset handler.
*
* A SPARC CPU model.
CPUClass parent_class;
/*< public >*/
+ DeviceRealize parent_realize;
void (*parent_reset)(CPUState *cpu);
} SPARCCPUClass;
object_unref(OBJECT(cpu));
return NULL;
}
- qemu_init_vcpu(env);
+
+ object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
return cpu;
}
cpu_fprintf(f, "\n");
}
+static void sparc_cpu_realizefn(DeviceState *dev, Error **errp)
+{
+ SPARCCPU *cpu = SPARC_CPU(dev);
+ SPARCCPUClass *scc = SPARC_CPU_GET_CLASS(dev);
+
+ qemu_init_vcpu(&cpu->env);
+
+ scc->parent_realize(dev, errp);
+}
+
static void sparc_cpu_initfn(Object *obj)
{
SPARCCPU *cpu = SPARC_CPU(obj);
{
SPARCCPUClass *scc = SPARC_CPU_CLASS(oc);
CPUClass *cc = CPU_CLASS(oc);
+ DeviceClass *dc = DEVICE_CLASS(oc);
+
+ scc->parent_realize = dc->realize;
+ dc->realize = sparc_cpu_realizefn;
scc->parent_reset = cc->reset;
cc->reset = sparc_cpu_reset;