intel_galileo_rev_g: fix pwm on IO5
authorThomas Ingleby <thomas.c.ingleby@intel.com>
Thu, 26 Jun 2014 17:55:38 +0000 (18:55 +0100)
committerThomas Ingleby <thomas.c.ingleby@intel.com>
Thu, 26 Jun 2014 17:55:38 +0000 (18:55 +0100)
* Incorrect mapping.

Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
src/intel_galileo_rev_g.c

index 20c4ade..a87e4be 100644 (file)
@@ -117,7 +117,7 @@ mraa_intel_galileo_gen2()
     b->pins[5].gpio.complex_cap  = (mraa_pin_cap_complex_t) {1,1,0,1,1};
     b->pins[5].gpio.output_enable = 18;
     b->pins[5].gpio.pullup_enable = 19;
-    b->pins[5].pwm.pinmap = 4;
+    b->pins[5].pwm.pinmap = 3;
     b->pins[5].pwm.parent_id = 0;
     b->pins[5].pwm.mux_total = 2;
     b->pins[5].pwm.mux[0].pin = 66;