ipmscan0: can@130d0000 {
compatible = "ipms,can";
- reg = <0x0 0x130d0000 0x0 0x1000>;
- clocks = <&canclk>;
- clock-names = "ipms_can_clk";
+ reg = <0x0 0x130d0000 0x0 0x1000>,
+ <0x0 0x13030000 0x0 0x10000>;
+ reg-names = "reg_base","sys_syscon";
interrupts = <112>;
+ clocks = <&canclk>,
+ <&clkgen JH7110_CAN0_CTRL_CLK_APB>,
+ <&clkgen JH7110_CAN0_CTRL_CLK_CAN>,
+ <&clkgen JH7110_CAN0_CTRL_CLK_TIMER>;
+ clock-names = "ipms_can_clk",
+ "apb_clk",
+ "core_clk",
+ "timer_clk";
+ resets = <&rstgen RSTN_U0_CAN_CTRL_APB>,
+ <&rstgen RSTN_U0_CAN_CTRL_CORE>,
+ <&rstgen RSTN_U0_CAN_CTRL_TIMER>;
+ reset-names = "rst_apb",
+ "rst_core",
+ "rst_timer";
status = "disabled";
};
ipmscan1: can@130c0000 {
- compatible = "ipms,canfd";
- reg = <0x0 0x130c0000 0x0 0x1000>;
- clocks = <&canclk>;
- clock-names = "ipms_can_clk";
+ compatible = "ipms,can";
+ reg = <0x0 0x130c0000 0x0 0x1000>,
+ <0x0 0x13030000 0x0 0x10000>;
+ reg-names = "reg_base","sys_syscon";
interrupts = <113>;
+ clocks = <&canclk>,
+ <&clkgen JH7110_CAN1_CTRL_CLK_APB>,
+ <&clkgen JH7110_CAN1_CTRL_CLK_CAN>,
+ <&clkgen JH7110_CAN1_CTRL_CLK_TIMER>;
+ clock-names = "ipms_can_clk",
+ "apb_clk",
+ "core_clk",
+ "timer_clk";
+ resets = <&rstgen RSTN_U1_CAN_CTRL_APB>,
+ <&rstgen RSTN_U1_CAN_CTRL_CORE>,
+ <&rstgen RSTN_U1_CAN_CTRL_TIMER>;
+ reset-names = "rst_apb",
+ "rst_core",
+ "rst_timer";
status = "disabled";
};