[InstCombine] Add a test file that contains safe select transforms (NFC)

diff --git a/llvm/test/Transforms/InstCombine/select-safe-transforms.ll b/llvm/test/Transforms/InstCombine/select-safe-transforms.ll
new file mode 100644 (file)
index 0000000..48067bf
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/select-safe-transforms.ll
@@ -0,0 +1,76 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -instcombine-unsafe-select-transform=0 -instcombine -S | FileCheck %s
+
+define i1 @cond_eq_and(i8 %X, i8 %Y, i8 noundef %C) {
+; CHECK-LABEL: @cond_eq_and(
+; CHECK-NEXT:    [[COND:%.*]] = icmp eq i8 [[X:%.*]], [[C:%.*]]
+; CHECK-NEXT:    [[LHS:%.*]] = icmp ult i8 [[X]], [[Y:%.*]]
+; CHECK-NEXT:    [[RES:%.*]] = select i1 [[COND]], i1 [[LHS]], i1 false
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+  %cond = icmp eq i8 %X, %C
+  %lhs = icmp ult i8 %X, %Y
+  %res = select i1 %cond, i1 %lhs, i1 false
+  ret i1 %res
+}
+
+define i1 @cond_eq_or(i8 %X, i8 %Y, i8 noundef %C) {
+; CHECK-LABEL: @cond_eq_or(
+; CHECK-NEXT:    [[COND:%.*]] = icmp ne i8 [[X:%.*]], [[C:%.*]]
+; CHECK-NEXT:    [[LHS:%.*]] = icmp ult i8 [[X]], [[Y:%.*]]
+; CHECK-NEXT:    [[RES:%.*]] = select i1 [[COND]], i1 true, i1 [[LHS]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+  %cond = icmp ne i8 %X, %C
+  %lhs = icmp ult i8 %X, %Y
+  %res = select i1 %cond, i1 true, i1 %lhs
+  ret i1 %res
+}
+
+define i1 @merge_and(i1 %X, i1 %Y) {
+; CHECK-LABEL: @merge_and(
+; CHECK-NEXT:    [[C:%.*]] = select i1 [[X:%.*]], i1 [[Y:%.*]], i1 false
+; CHECK-NEXT:    [[RES:%.*]] = and i1 [[C]], [[X]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+  %c = select i1 %X, i1 %Y, i1 false
+  %res = and i1 %X, %c
+  ret i1 %res
+}
+
+define i1 @merge_or(i1 %X, i1 %Y) {
+; CHECK-LABEL: @merge_or(
+; CHECK-NEXT:    [[C:%.*]] = select i1 [[X:%.*]], i1 true, i1 [[Y:%.*]]
+; CHECK-NEXT:    [[RES:%.*]] = or i1 [[C]], [[X]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+  %c = select i1 %X, i1 true, i1 %Y
+  %res = or i1 %X, %c
+  ret i1 %res
+}
+
+define i1 @xor_and(i1 %c, i32 %X, i32 %Y) {
+; CHECK-LABEL: @xor_and(
+; CHECK-NEXT:    [[COMP:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[C:%.*]], i1 [[COMP]], i1 false
+; CHECK-NEXT:    [[RES:%.*]] = xor i1 [[SEL]], true
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+  %comp = icmp ult i32 %X, %Y
+  %sel = select i1 %c, i1 %comp, i1 false
+  %res = xor i1 %sel, true
+  ret i1 %res
+}
+
+define i1 @xor_or(i1 %c, i32 %X, i32 %Y) {
+; CHECK-LABEL: @xor_or(
+; CHECK-NEXT:    [[COMP:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[C:%.*]], i1 true, i1 [[COMP]]
+; CHECK-NEXT:    [[RES:%.*]] = xor i1 [[SEL]], true
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+  %comp = icmp ult i32 %X, %Y
+  %sel = select i1 %c, i1 true, i1 %comp
+  %res = xor i1 %sel, true
+  ret i1 %res
+}