///
/// Returns the set of context parameters that are currently constrained. In
/// case the full set of parameters is needed, see @getFullParamSpace.
- __isl_give isl_space *getParamSpace() const;
+ isl::space getParamSpace() const;
/// Return the full space of parameters.
///
isl_union_map *&ReductionTagMap,
isl_union_set *&TaggedStmtDomain,
Dependences::AnalysisLevel Level) {
- isl_space *Space = S.getParamSpace();
+ isl_space *Space = S.getParamSpace().release();
Read = isl_union_map_empty(isl_space_copy(Space));
MustWrite = isl_union_map_empty(isl_space_copy(Space));
MayWrite = isl_union_map_empty(isl_space_copy(Space));
return true;
isl_union_map *Dependences = getDependences(TYPE_RAW | TYPE_WAW | TYPE_WAR);
- isl_space *Space = S.getParamSpace();
+ isl_space *Space = S.getParamSpace().release();
isl_union_map *Schedule = isl_union_map_empty(Space);
isl_space *ScheduleSpace = nullptr;
// Stmt[i0, i1] -> [i0, i1]
__isl_give isl_union_map *PolyhedralInfo::getScheduleForLoop(const Scop *S,
Loop *L) const {
- isl_union_map *Schedule = isl_union_map_empty(S->getParamSpace());
+ isl_union_map *Schedule = isl_union_map_empty(S->getParamSpace().release());
int CurrDim = S->getRelativeLoopDepth(L);
DEBUG(dbgs() << "Relative loop depth:\t" << CurrDim << "\n");
assert(CurrDim >= 0 && "Loop in region should have at least depth one");
if (isRead()) {
// Check whether there is an access for every statement instance.
isl::set StmtDomain = getStatement()->getDomain();
- StmtDomain = StmtDomain.intersect_params(
- getStatement()->getParent()->getContext());
+ StmtDomain =
+ StmtDomain.intersect_params(getStatement()->getParent()->getContext());
isl::set NewDomain = NewAccess.domain();
assert(StmtDomain.is_subset(NewDomain) &&
"Partial READ accesses not supported");
isl_set *UserContext =
isl_set_read_from_str(getIslCtx(), UserContextStr.c_str());
- isl_space *Space = getParamSpace();
+ isl_space *Space = getParamSpace().release();
if (isl_space_dim(Space, isl_dim_param) !=
isl_set_dim(UserContext, isl_dim_param)) {
auto SpaceStr = isl_space_to_str(Space);
isl_set_gist_params(AssumptionContext, DomainParameters);
}
- AssumptionContext = isl_set_gist_params(AssumptionContext, S.getContext().release());
+ AssumptionContext =
+ isl_set_gist_params(AssumptionContext, S.getContext().release());
return AssumptionContext;
}
// otherwise we would access out of bound data. Now, knowing that code is
// only executed for the case m >= 0, it is sufficient to assume p >= 0.
AssumedContext = simplifyAssumptionContext(AssumedContext, *this);
- InvalidContext = isl_set_align_params(InvalidContext, getParamSpace());
+ InvalidContext =
+ isl_set_align_params(InvalidContext, getParamSpace().release());
}
/// Add the minimal/maximal access in @p Set to @p User.
MinMaxAccesses.reserve(AliasGroup.size());
isl::union_set Domains = give(S.getDomains());
- isl::union_map Accesses = isl::union_map::empty(give(S.getParamSpace()));
+ isl::union_map Accesses = isl::union_map::empty(S.getParamSpace());
for (MemoryAccess *MA : AliasGroup)
Accesses = Accesses.add_map(give(MA->getAccessRelation().release()));
// Under the union of all predecessor conditions we can reach this block.
isl::set PredDom = getPredecessorDomainConstraints(BB, Domain, DT, LI);
Domain = Domain.intersect(PredDom).coalesce();
- Domain = Domain.align_params(isl::manage(getParamSpace()));
+ Domain = Domain.align_params(getParamSpace());
Loop *BBLoop = getRegionNodeLoop(RN, LI);
if (BBLoop && BBLoop->getHeader() == BB && contains(BBLoop))
}
isl::set Scop::getContext() const { return isl::manage(isl_set_copy(Context)); }
-__isl_give isl_space *Scop::getParamSpace() const {
- return isl_set_get_space(Context);
-}
+isl::space Scop::getParamSpace() const { return getContext().get_space(); }
isl::space Scop::getFullParamSpace() const {
std::vector<isl::id> FortranIDs;
}
void Scop::invalidate(AssumptionKind Kind, DebugLoc Loc, BasicBlock *BB) {
- addAssumption(Kind, isl_set_empty(getParamSpace()), Loc, AS_ASSUMPTION, BB);
+ addAssumption(Kind, isl_set_empty(getParamSpace().release()), Loc,
+ AS_ASSUMPTION, BB);
}
__isl_give isl_set *Scop::getInvalidContext() const {
isl::union_map
Scop::getAccessesOfType(std::function<bool(MemoryAccess &)> Predicate) {
- isl::union_map Accesses = isl::union_map::empty(isl::manage(getParamSpace()));
+ isl::union_map Accesses = isl::union_map::empty(getParamSpace());
for (ScopStmt &Stmt : *this) {
for (MemoryAccess *MA : Stmt) {
if (UseContext)
Build = isl_ast_build_from_context(S.getContext().release());
else
- Build = isl_ast_build_from_context(isl_set_universe(S.getParamSpace()));
+ Build = isl_ast_build_from_context(
+ isl_set_universe(S.getParamSpace().release()));
Build = isl_ast_build_set_at_each_domain(Build, AtEachDomain, nullptr);
auto SchedDom = isl_set_from_union_set(
isl_union_map_domain(isl_union_map_copy(Schedule)));
auto AccDom = isl_map_domain(MA->getAccessRelation().release());
- Dom = isl_set_intersect_params(Dom, Stmt->getParent()->getContext().release());
- SchedDom =
- isl_set_intersect_params(SchedDom, Stmt->getParent()->getContext().release());
+ Dom = isl_set_intersect_params(Dom,
+ Stmt->getParent()->getContext().release());
+ SchedDom = isl_set_intersect_params(
+ SchedDom, Stmt->getParent()->getContext().release());
assert(isl_set_is_subset(SchedDom, AccDom) &&
"Access relation not defined on full schedule domain");
assert(isl_set_is_subset(Dom, AccDom) &&
return nullptr;
}
- auto *Build = isl_ast_build_from_context(isl_set_universe(S.getParamSpace()));
+ auto *Build =
+ isl_ast_build_from_context(isl_set_universe(S.getParamSpace().release()));
isl_set *Universe = isl_set_universe(isl_set_get_space(Domain));
bool AlwaysExecuted = isl_set_is_equal(Domain, Universe);
isl_set_free(Universe);
/// @returns live range reordering information that can be used to setup
/// PPCG.
static MustKillsInfo computeMustKillsInfo(const Scop &S) {
- const isl::space ParamSpace(isl::manage(S.getParamSpace()));
+ const isl::space ParamSpace = S.getParamSpace();
MustKillsInfo Info;
// 1. Collect all ScopArrayInfo that satisfy *any* of the criteria:
}
Value *GPUNodeBuilder::getArraySize(gpu_array_info *Array) {
- isl::ast_build Build =
- isl::ast_build::from_context(S.getContext());
+ isl::ast_build Build = isl::ast_build::from_context(S.getContext());
Value *ArraySize = ConstantInt::get(Builder.getInt64Ty(), Array->size);
if (!gpu_array_is_scalar(Array)) {
if (gpu_array_is_scalar(Array))
return nullptr;
- isl::ast_build Build =
- isl::ast_build::from_context(S.getContext());
+ isl::ast_build Build = isl::ast_build::from_context(S.getContext());
isl::set Min = isl::manage(isl_set_copy(Array->extent)).lexmin();
for (auto &SAI : S.arrays())
SubtreeValues.remove(SAI->getBasePtr());
- isl_space *Space = S.getParamSpace();
+ isl_space *Space = S.getParamSpace().release();
for (long i = 0; i < isl_space_dim(Space, isl_dim_param); i++) {
isl_id *Id = isl_space_get_dim_id(Space, isl_dim_param, i);
assert(IDToValue.count(Id));
///
/// @return The relation describing all tagged memory accesses.
isl_union_map *getTaggedAccesses(enum MemoryAccess::AccessType AccessTy) {
- isl_union_map *Accesses = isl_union_map_empty(S->getParamSpace());
+ isl_union_map *Accesses = isl_union_map_empty(S->getParamSpace().release());
for (auto &Stmt : *S)
for (auto &Acc : Stmt)
/// `-polly-ignore-parameter-bounds` enabled, the Scop::Context does not
/// contain all parameter dimensions.
/// So, use the helper `alignPwAffs` to align all the `isl_pw_aff` together.
- isl_space *SeedAlignSpace = S->getParamSpace();
+ isl_space *SeedAlignSpace = S->getParamSpace().release();
SeedAlignSpace = isl_space_add_dims(SeedAlignSpace, isl_dim_set, 1);
isl_space *AlignSpace = nullptr;
///
/// @returns An identity map between the arrays in the scop.
isl_union_map *getArrayIdentity() {
- isl_union_map *Maps = isl_union_map_empty(S->getParamSpace());
+ isl_union_map *Maps = isl_union_map_empty(S->getParamSpace().release());
for (auto &Array : S->arrays()) {
isl_space *Space = Array->getSpace().release();
return false;
}
- auto ScheduleMap = isl_union_map_empty(S.getParamSpace());
+ auto ScheduleMap = isl_union_map_empty(S.getParamSpace().release());
for (ScopStmt &Stmt : S) {
if (NewSchedule.find(&Stmt) != NewSchedule.end())
ScheduleMap = isl_union_map_add_map(ScheduleMap, NewSchedule[&Stmt]);
NewAccessDomain =
isl_set_intersect_params(NewAccessDomain, S.getContext().release());
- CurrentAccessDomain =
- isl_set_intersect_params(CurrentAccessDomain, S.getContext().release());
+ CurrentAccessDomain = isl_set_intersect_params(CurrentAccessDomain,
+ S.getContext().release());
if (MA->isRead() &&
isl_set_is_subset(CurrentAccessDomain, NewAccessDomain) ==
for (auto &Stmt : *S) {
isl::set Domain = Stmt.getDomain();
isl::union_map WillBeOverwritten =
- isl::union_map::empty(give(S->getParamSpace()));
+ isl::union_map::empty(S->getParamSpace());
SmallVector<MemoryAccess *, 32> Accesses(getAccessesInOrder(Stmt));
auto AccRel = MA->getAccessRelation();
AccRel = AccRel.intersect_domain(Domain);
- AccRel = AccRel.intersect_params(give(S->getContext()));
+ AccRel = AccRel.intersect_params(S->getContext());
// If a value is read in-between, do not consider it as overwritten.
if (MA->isRead()) {
/// In all cases, both writes must write the same values.
void coalesceWrites() {
for (auto &Stmt : *S) {
- isl::set Domain =
- Stmt.getDomain().intersect_params(give(S->getContext()));
+ isl::set Domain = Stmt.getDomain().intersect_params(S->getContext());
// We let isl do the lookup for the same-value condition. For this, we
// wrap llvm::Value into an isl::set such that isl can do the lookup in
// List of all eligible (for coalescing) writes of the future.
// { [Domain[] -> Element[]] -> [Value[] -> MemoryAccess[]] }
- isl::union_map FutureWrites =
- isl::union_map::empty(give(S->getParamSpace()));
+ isl::union_map FutureWrites = isl::union_map::empty(S->getParamSpace());
// Iterate over accesses from the last to the first.
SmallVector<MemoryAccess *, 32> Accesses(getAccessesInOrder(Stmt));
};
isl::set Domain = Stmt.getDomain();
- Domain = Domain.intersect_params(give(S->getContext()));
+ Domain = Domain.intersect_params(S->getContext());
// List of element reads that still have the same value while iterating
// through the MemoryAccesses.
// { [Domain[] -> Element[]] -> Val[] }
- isl::union_map Known = isl::union_map::empty(give(S->getParamSpace()));
+ isl::union_map Known = isl::union_map::empty(S->getParamSpace());
SmallVector<MemoryAccess *, 32> Accesses(getAccessesInOrder(Stmt));
for (MemoryAccess *MA : Accesses) {