They are now always defined to either 0 or 1.
Originally committed as revision 28311 to svn://svn.mplayerhq.hu/mplayer/trunk/libswscale
long srcStride1, long srcStride2,
long srcStride3, long dstStride);
-#if defined(ARCH_X86) && defined(CONFIG_GPL)
+#if ARCH_X86 && CONFIG_GPL
DECLARE_ASM_CONST(8, uint64_t, mmx_null) = 0x0000000000000000ULL;
DECLARE_ASM_CONST(8, uint64_t, mmx_one) = 0xFFFFFFFFFFFFFFFFULL;
DECLARE_ASM_CONST(8, uint64_t, mask32b) = 0x000000FF000000FFULL;
DECLARE_ASM_CONST(8, uint64_t, red_15mask) = 0x00007c0000007c00ULL;
DECLARE_ASM_CONST(8, uint64_t, green_15mask) = 0x000003e0000003e0ULL;
DECLARE_ASM_CONST(8, uint64_t, blue_15mask) = 0x0000001f0000001fULL;
-#endif /* defined(ARCH_X86) */
+#endif /* ARCH_X86 */
#define RGB2YUV_SHIFT 8
#define BY ((int)( 0.098*(1<<RGB2YUV_SHIFT)+0.5))
#undef HAVE_MMX2
#undef HAVE_3DNOW
#undef HAVE_SSE2
+#define HAVE_MMX 0
+#define HAVE_MMX2 0
+#define HAVE_3DNOW 0
+#define HAVE_SSE2 0
#define RENAME(a) a ## _C
#include "rgb2rgb_template.c"
-#if defined(ARCH_X86) && defined(CONFIG_GPL)
+#if ARCH_X86 && CONFIG_GPL
//MMX versions
#undef RENAME
-#define HAVE_MMX
-#undef HAVE_MMX2
-#undef HAVE_3DNOW
-#undef HAVE_SSE2
+#undef HAVE_MMX
+#define HAVE_MMX 1
#define RENAME(a) a ## _MMX
#include "rgb2rgb_template.c"
//MMX2 versions
#undef RENAME
-#define HAVE_MMX
-#define HAVE_MMX2
-#undef HAVE_3DNOW
-#undef HAVE_SSE2
+#undef HAVE_MMX2
+#define HAVE_MMX2 1
#define RENAME(a) a ## _MMX2
#include "rgb2rgb_template.c"
//3DNOW versions
#undef RENAME
-#define HAVE_MMX
#undef HAVE_MMX2
-#define HAVE_3DNOW
-#undef HAVE_SSE2
+#undef HAVE_3DNOW
+#define HAVE_MMX2 0
+#define HAVE_3DNOW 1
#define RENAME(a) a ## _3DNOW
#include "rgb2rgb_template.c"
*/
void sws_rgb2rgb_init(int flags){
-#if (defined(HAVE_MMX2) || defined(HAVE_3DNOW) || defined(HAVE_MMX)) && defined(CONFIG_GPL)
+#if (HAVE_MMX2 || HAVE_3DNOW || HAVE_MMX) && CONFIG_GPL
if (flags & SWS_CPU_CAPS_MMX2)
rgb2rgb_init_MMX2();
else if (flags & SWS_CPU_CAPS_3DNOW)
else if (flags & SWS_CPU_CAPS_MMX)
rgb2rgb_init_MMX();
else
-#endif /* defined(HAVE_MMX2) || defined(HAVE_3DNOW) || defined(HAVE_MMX) */
+#endif /* HAVE_MMX2 || HAVE_3DNOW || HAVE_MMX */
rgb2rgb_init_C();
}
#undef PREFETCHW
#undef PAVGB
-#ifdef HAVE_SSE2
+#if HAVE_SSE2
#define MMREG_SIZE 16
#else
#define MMREG_SIZE 8
#endif
-#ifdef HAVE_3DNOW
+#if HAVE_3DNOW
#define PREFETCH "prefetch"
#define PREFETCHW "prefetchw"
#define PAVGB "pavgusb"
-#elif defined (HAVE_MMX2)
+#elif HAVE_MMX2
#define PREFETCH "prefetchnta"
#define PREFETCHW "prefetcht0"
#define PAVGB "pavgb"
#define PREFETCHW " # nop"
#endif
-#ifdef HAVE_3DNOW
+#if HAVE_3DNOW
/* On K6 femms is faster than emms. On K7 femms is directly mapped to emms. */
#define EMMS "femms"
#else
#define EMMS "emms"
#endif
-#ifdef HAVE_MMX2
+#if HAVE_MMX2
#define MOVNTQ "movntq"
#define SFENCE "sfence"
#else
uint8_t *dest = dst;
const uint8_t *s = src;
const uint8_t *end;
- #ifdef HAVE_MMX
+ #if HAVE_MMX
const uint8_t *mm_end;
#endif
end = s + src_size;
- #ifdef HAVE_MMX
+ #if HAVE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*s):"memory");
mm_end = end - 23;
__asm__ volatile("movq %0, %%mm7"::"m"(mask32):"memory");
uint8_t *dest = dst;
const uint8_t *s = src;
const uint8_t *end;
-#ifdef HAVE_MMX
+#if HAVE_MMX
const uint8_t *mm_end;
#endif
end = s + src_size;
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*s):"memory");
mm_end = end - 31;
while (s < mm_end)
register const uint8_t *end;
const uint8_t *mm_end;
end = s + src_size;
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*s));
__asm__ volatile("movq %0, %%mm4"::"m"(mask15s));
mm_end = end - 15;
register const uint8_t *end;
const uint8_t *mm_end;
end = s + src_size;
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*s));
__asm__ volatile("movq %0, %%mm7"::"m"(mask15rg));
__asm__ volatile("movq %0, %%mm6"::"m"(mask15b));
{
const uint8_t *s = src;
const uint8_t *end;
-#ifdef HAVE_MMX
+#if HAVE_MMX
const uint8_t *mm_end;
#endif
uint16_t *d = (uint16_t *)dst;
end = s + src_size;
-#ifdef HAVE_MMX
+#if HAVE_MMX
mm_end = end - 15;
#if 1 //is faster only if multiplies are reasonably fast (FIXME figure out on which CPUs this is faster, on Athlon it is slightly faster)
__asm__ volatile(
{
const uint8_t *s = src;
const uint8_t *end;
-#ifdef HAVE_MMX
+#if HAVE_MMX
const uint8_t *mm_end;
#endif
uint16_t *d = (uint16_t *)dst;
end = s + src_size;
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*src):"memory");
__asm__ volatile(
"movq %0, %%mm7 \n\t"
{
const uint8_t *s = src;
const uint8_t *end;
-#ifdef HAVE_MMX
+#if HAVE_MMX
const uint8_t *mm_end;
#endif
uint16_t *d = (uint16_t *)dst;
end = s + src_size;
-#ifdef HAVE_MMX
+#if HAVE_MMX
mm_end = end - 15;
#if 1 //is faster only if multiplies are reasonably fast (FIXME figure out on which CPUs this is faster, on Athlon it is slightly faster)
__asm__ volatile(
{
const uint8_t *s = src;
const uint8_t *end;
-#ifdef HAVE_MMX
+#if HAVE_MMX
const uint8_t *mm_end;
#endif
uint16_t *d = (uint16_t *)dst;
end = s + src_size;
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*src):"memory");
__asm__ volatile(
"movq %0, %%mm7 \n\t"
{
const uint8_t *s = src;
const uint8_t *end;
-#ifdef HAVE_MMX
+#if HAVE_MMX
const uint8_t *mm_end;
#endif
uint16_t *d = (uint16_t *)dst;
end = s + src_size;
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*src):"memory");
__asm__ volatile(
"movq %0, %%mm7 \n\t"
{
const uint8_t *s = src;
const uint8_t *end;
-#ifdef HAVE_MMX
+#if HAVE_MMX
const uint8_t *mm_end;
#endif
uint16_t *d = (uint16_t *)dst;
end = s + src_size;
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*src):"memory");
__asm__ volatile(
"movq %0, %%mm7 \n\t"
{
const uint8_t *s = src;
const uint8_t *end;
-#ifdef HAVE_MMX
+#if HAVE_MMX
const uint8_t *mm_end;
#endif
uint16_t *d = (uint16_t *)dst;
end = s + src_size;
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*src):"memory");
__asm__ volatile(
"movq %0, %%mm7 \n\t"
{
const uint8_t *s = src;
const uint8_t *end;
-#ifdef HAVE_MMX
+#if HAVE_MMX
const uint8_t *mm_end;
#endif
uint16_t *d = (uint16_t *)dst;
end = s + src_size;
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*src):"memory");
__asm__ volatile(
"movq %0, %%mm7 \n\t"
static inline void RENAME(rgb15tobgr24)(const uint8_t *src, uint8_t *dst, long src_size)
{
const uint16_t *end;
-#ifdef HAVE_MMX
+#if HAVE_MMX
const uint16_t *mm_end;
#endif
uint8_t *d = dst;
const uint16_t *s = (const uint16_t*)src;
end = s + src_size/2;
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*s):"memory");
mm_end = end - 7;
while (s < mm_end)
static inline void RENAME(rgb16tobgr24)(const uint8_t *src, uint8_t *dst, long src_size)
{
const uint16_t *end;
-#ifdef HAVE_MMX
+#if HAVE_MMX
const uint16_t *mm_end;
#endif
uint8_t *d = (uint8_t *)dst;
const uint16_t *s = (const uint16_t *)src;
end = s + src_size/2;
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*s):"memory");
mm_end = end - 7;
while (s < mm_end)
static inline void RENAME(rgb15to32)(const uint8_t *src, uint8_t *dst, long src_size)
{
const uint16_t *end;
-#ifdef HAVE_MMX
+#if HAVE_MMX
const uint16_t *mm_end;
#endif
uint8_t *d = dst;
const uint16_t *s = (const uint16_t *)src;
end = s + src_size/2;
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*s):"memory");
__asm__ volatile("pxor %%mm7,%%mm7 \n\t":::"memory");
mm_end = end - 3;
static inline void RENAME(rgb16to32)(const uint8_t *src, uint8_t *dst, long src_size)
{
const uint16_t *end;
-#ifdef HAVE_MMX
+#if HAVE_MMX
const uint16_t *mm_end;
#endif
uint8_t *d = dst;
const uint16_t *s = (const uint16_t*)src;
end = s + src_size/2;
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*s):"memory");
__asm__ volatile("pxor %%mm7,%%mm7 \n\t":::"memory");
mm_end = end - 3;
long idx = 15 - src_size;
const uint8_t *s = src-idx;
uint8_t *d = dst-idx;
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile(
"test %0, %0 \n\t"
"jns 2f \n\t"
PREFETCH" 32(%1, %0) \n\t"
"movq (%1, %0), %%mm0 \n\t"
"movq 8(%1, %0), %%mm1 \n\t"
-# ifdef HAVE_MMX2
+# if HAVE_MMX2
"pshufw $177, %%mm0, %%mm3 \n\t"
"pshufw $177, %%mm1, %%mm5 \n\t"
"pand %%mm7, %%mm0 \n\t"
static inline void RENAME(rgb24tobgr24)(const uint8_t *src, uint8_t *dst, long src_size)
{
unsigned i;
-#ifdef HAVE_MMX
+#if HAVE_MMX
long mmx_size= 23 - src_size;
__asm__ volatile (
"test %%"REG_a", %%"REG_a" \n\t"
const long chromWidth= width>>1;
for (y=0; y<height; y++)
{
-#ifdef HAVE_MMX
+#if HAVE_MMX
//FIXME handle 2 lines at once (fewer prefetches, reuse some chroma, but very likely memory-limited anyway)
__asm__ volatile(
"xor %%"REG_a", %%"REG_a" \n\t"
);
#else
-#if defined ARCH_ALPHA && defined HAVE_MVI
+#if ARCH_ALPHA && HAVE_MVI
#define pl2yuy2(n) \
y1 = yc[n]; \
y2 = yc2[n]; \
ysrc += lumStride;
dst += dstStride;
}
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__( EMMS" \n\t"
SFENCE" \n\t"
:::"memory");
const long chromWidth= width>>1;
for (y=0; y<height; y++)
{
-#ifdef HAVE_MMX
+#if HAVE_MMX
//FIXME handle 2 lines at once (fewer prefetches, reuse some chroma, but very likely memory-limited anyway)
__asm__ volatile(
"xor %%"REG_a", %%"REG_a" \n\t"
ysrc += lumStride;
dst += dstStride;
}
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__( EMMS" \n\t"
SFENCE" \n\t"
:::"memory");
const long chromWidth= width>>1;
for (y=0; y<height; y+=2)
{
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile(
"xor %%"REG_a", %%"REG_a" \n\t"
"pcmpeqw %%mm7, %%mm7 \n\t"
ydst += lumStride;
src += srcStride;
}
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile( EMMS" \n\t"
SFENCE" \n\t"
:::"memory");
dst+= dstStride;
for (y=1; y<srcHeight; y++){
-#if defined (HAVE_MMX2) || defined (HAVE_3DNOW)
+#if HAVE_MMX2 || HAVE_3DNOW
const long mmxSize= srcWidth&~15;
__asm__ volatile(
"mov %4, %%"REG_a" \n\t"
}
#endif
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile( EMMS" \n\t"
SFENCE" \n\t"
:::"memory");
const long chromWidth= width>>1;
for (y=0; y<height; y+=2)
{
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile(
"xor %%"REG_a", %%"REG_a" \n\t"
"pcmpeqw %%mm7, %%mm7 \n\t"
ydst += lumStride;
src += srcStride;
}
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile( EMMS" \n\t"
SFENCE" \n\t"
:::"memory");
{
long y;
const long chromWidth= width>>1;
-#ifdef HAVE_MMX
+#if HAVE_MMX
for (y=0; y<height-2; y+=2)
{
long i;
"1: \n\t"
PREFETCH" 64(%0, %%"REG_d") \n\t"
PREFETCH" 64(%1, %%"REG_d") \n\t"
-#if defined (HAVE_MMX2) || defined (HAVE_3DNOW)
+#if HAVE_MMX2 || HAVE_3DNOW
"movq (%0, %%"REG_d"), %%mm0 \n\t"
"movq (%1, %%"REG_d"), %%mm1 \n\t"
"movq 6(%0, %%"REG_d"), %%mm2 \n\t"
"packssdw %%mm1, %%mm0 \n\t" // V1 V0 U1 U0
"psraw $7, %%mm0 \n\t"
-#if defined (HAVE_MMX2) || defined (HAVE_3DNOW)
+#if HAVE_MMX2 || HAVE_3DNOW
"movq 12(%0, %%"REG_d"), %%mm4 \n\t"
"movq 12(%1, %%"REG_d"), %%mm1 \n\t"
"movq 18(%0, %%"REG_d"), %%mm2 \n\t"
{
long w;
-#ifdef HAVE_MMX
-#ifdef HAVE_SSE2
+#if HAVE_MMX
+#if HAVE_SSE2
__asm__(
"xor %%"REG_a", %%"REG_a" \n\t"
"1: \n\t"
src1 += src1Stride;
src2 += src2Stride;
}
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__(
EMMS" \n\t"
SFENCE" \n\t"
{
long y,x,w,h;
w=width/2; h=height/2;
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile(
PREFETCH" %0 \n\t"
PREFETCH" %1 \n\t"
const uint8_t* s1=src1+srcStride1*(y>>1);
uint8_t* d=dst1+dstStride1*y;
x=0;
-#ifdef HAVE_MMX
+#if HAVE_MMX
for (;x<w-31;x+=32)
{
__asm__ volatile(
const uint8_t* s2=src2+srcStride2*(y>>1);
uint8_t* d=dst2+dstStride2*y;
x=0;
-#ifdef HAVE_MMX
+#if HAVE_MMX
for (;x<w-31;x+=32)
{
__asm__ volatile(
#endif
for (;x<w;x++) d[2*x]=d[2*x+1]=s2[x];
}
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__(
EMMS" \n\t"
SFENCE" \n\t"
const uint8_t* vp=src3+srcStride3*(y>>2);
uint8_t* d=dst+dstStride*y;
x=0;
-#ifdef HAVE_MMX
+#if HAVE_MMX
for (;x<w-7;x+=8)
{
__asm__ volatile(
d[8*x+7] = vp[x];
}
}
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__(
EMMS" \n\t"
SFENCE" \n\t"
sws_scale(dstContext, src, srcStride, 0, srcH, dst, dstStride);
sws_scale(outContext, dst, dstStride, 0, dstH, out, refStride);
-#if defined(ARCH_X86)
+#if ARCH_X86
__asm__ volatile ("emms\n\t");
#endif
}
sws_scale(sws, rgb_src, rgb_stride, 0, H, src, stride);
-#if defined(ARCH_X86)
+#if ARCH_X86
__asm__ volatile ("emms\n\t");
#endif
#include <unistd.h>
#include "config.h"
#include <assert.h>
-#ifdef HAVE_SYS_MMAN_H
+#if HAVE_SYS_MMAN_H
#include <sys/mman.h>
#if defined(MAP_ANON) && !defined(MAP_ANONYMOUS)
#define MAP_ANONYMOUS MAP_ANON
write special BGR->BGR scaler
*/
-#if defined(ARCH_X86) && defined (CONFIG_GPL)
+#if ARCH_X86 && CONFIG_GPL
DECLARE_ASM_CONST(8, uint64_t, bF8)= 0xF8F8F8F8F8F8F8F8LL;
DECLARE_ASM_CONST(8, uint64_t, bFC)= 0xFCFCFCFCFCFCFCFCLL;
DECLARE_ASM_CONST(8, uint64_t, w10)= 0x0010001000100010LL;
DECLARE_ASM_CONST(8, uint64_t, ff_bgr24toUVOffset)= 0x0040400000404000ULL;
-#endif /* defined(ARCH_X86) */
+#endif /* ARCH_X86 */
// clipping helper table for C implementations:
static unsigned char clip_table[768];
//Note: we have C, X86, MMX, MMX2, 3DNOW version therse no 3DNOW+MMX2 one
//Plain C versions
-#if !defined (HAVE_MMX) || defined (RUNTIME_CPUDETECT) || !defined(CONFIG_GPL)
+#if !HAVE_MMX || defined (RUNTIME_CPUDETECT) || !CONFIG_GPL
#define COMPILE_C
#endif
-#ifdef ARCH_PPC
-#if (defined (HAVE_ALTIVEC) || defined (RUNTIME_CPUDETECT)) && defined (CONFIG_GPL)
+#if ARCH_PPC
+#if (HAVE_ALTIVEC || defined (RUNTIME_CPUDETECT)) && CONFIG_GPL
#define COMPILE_ALTIVEC
#endif //HAVE_ALTIVEC
#endif //ARCH_PPC
-#if defined(ARCH_X86)
+#if ARCH_X86
-#if ((defined (HAVE_MMX) && !defined (HAVE_3DNOW) && !defined (HAVE_MMX2)) || defined (RUNTIME_CPUDETECT)) && defined (CONFIG_GPL)
+#if ((HAVE_MMX && !HAVE_3DNOW && !HAVE_MMX2) || defined (RUNTIME_CPUDETECT)) && CONFIG_GPL
#define COMPILE_MMX
#endif
-#if (defined (HAVE_MMX2) || defined (RUNTIME_CPUDETECT)) && defined (CONFIG_GPL)
+#if (HAVE_MMX2 || defined (RUNTIME_CPUDETECT)) && CONFIG_GPL
#define COMPILE_MMX2
#endif
-#if ((defined (HAVE_3DNOW) && !defined (HAVE_MMX2)) || defined (RUNTIME_CPUDETECT)) && defined (CONFIG_GPL)
+#if ((HAVE_3DNOW && !HAVE_MMX2) || defined (RUNTIME_CPUDETECT)) && CONFIG_GPL
#define COMPILE_3DNOW
#endif
#endif //ARCH_X86 || ARCH_X86_64
#undef HAVE_MMX
#undef HAVE_MMX2
#undef HAVE_3DNOW
+#undef HAVE_ALTIVEC
+#define HAVE_MMX 0
+#define HAVE_MMX2 0
+#define HAVE_3DNOW 0
+#define HAVE_ALTIVEC 0
#ifdef COMPILE_C
-#undef HAVE_MMX
-#undef HAVE_MMX2
-#undef HAVE_3DNOW
-#undef HAVE_ALTIVEC
#define RENAME(a) a ## _C
#include "swscale_template.c"
#endif
#ifdef COMPILE_ALTIVEC
#undef RENAME
-#define HAVE_ALTIVEC
+#undef HAVE_ALTIVEC
+#define HAVE_ALTIVEC 1
#define RENAME(a) a ## _altivec
#include "swscale_template.c"
#endif
-#if defined(ARCH_X86)
+#if ARCH_X86
//X86 versions
/*
//MMX versions
#ifdef COMPILE_MMX
#undef RENAME
-#define HAVE_MMX
+#undef HAVE_MMX
#undef HAVE_MMX2
#undef HAVE_3DNOW
+#define HAVE_MMX 1
+#define HAVE_MMX2 0
+#define HAVE_3DNOW 0
#define RENAME(a) a ## _MMX
#include "swscale_template.c"
#endif
//MMX2 versions
#ifdef COMPILE_MMX2
#undef RENAME
-#define HAVE_MMX
-#define HAVE_MMX2
+#undef HAVE_MMX
+#undef HAVE_MMX2
#undef HAVE_3DNOW
+#define HAVE_MMX 1
+#define HAVE_MMX2 1
+#define HAVE_3DNOW 0
#define RENAME(a) a ## _MMX2
#include "swscale_template.c"
#endif
//3DNOW versions
#ifdef COMPILE_3DNOW
#undef RENAME
-#define HAVE_MMX
+#undef HAVE_MMX
#undef HAVE_MMX2
-#define HAVE_3DNOW
+#undef HAVE_3DNOW
+#define HAVE_MMX 1
+#define HAVE_MMX2 0
+#define HAVE_3DNOW 1
#define RENAME(a) a ## _3DNow
#include "swscale_template.c"
#endif
int64_t *filter2=NULL;
const int64_t fone= 1LL<<54;
int ret= -1;
-#if defined(ARCH_X86)
+#if ARCH_X86
if (flags & SWS_CPU_CAPS_MMX)
__asm__ volatile("emms\n\t"::: "memory"); //FIXME this should not be required but it IS (even for non-MMX versions)
#endif
static SwsFunc getSwsFunc(int flags){
-#if defined(RUNTIME_CPUDETECT) && defined (CONFIG_GPL)
-#if defined(ARCH_X86)
+#if defined(RUNTIME_CPUDETECT) && CONFIG_GPL
+#if ARCH_X86
// ordered per speed fastest first
if (flags & SWS_CPU_CAPS_MMX2)
return swScale_MMX2;
return swScale_C;
#else
-#ifdef ARCH_PPC
+#if ARCH_PPC
if (flags & SWS_CPU_CAPS_ALTIVEC)
return swScale_altivec;
else
return swScale_C;
#endif
return swScale_C;
-#endif /* defined(ARCH_X86) */
+#endif /* ARCH_X86 */
#else //RUNTIME_CPUDETECT
-#ifdef HAVE_MMX2
+#if HAVE_MMX2
return swScale_MMX2;
-#elif defined (HAVE_3DNOW)
+#elif HAVE_3DNOW
return swScale_3DNow;
-#elif defined (HAVE_MMX)
+#elif HAVE_MMX
return swScale_MMX;
-#elif defined (HAVE_ALTIVEC)
+#elif HAVE_ALTIVEC
return swScale_altivec;
#else
return swScale_C;
int unscaled, needsDither;
int srcRange, dstRange;
SwsFilter dummyFilter= {NULL, NULL, NULL, NULL};
-#if defined(ARCH_X86)
+#if ARCH_X86
if (flags & SWS_CPU_CAPS_MMX)
__asm__ volatile("emms\n\t"::: "memory");
#endif
-#if !defined(RUNTIME_CPUDETECT) || !defined (CONFIG_GPL) //ensure that the flags match the compiled variant if cpudetect is off
+#if !defined(RUNTIME_CPUDETECT) || !CONFIG_GPL //ensure that the flags match the compiled variant if cpudetect is off
flags &= ~(SWS_CPU_CAPS_MMX|SWS_CPU_CAPS_MMX2|SWS_CPU_CAPS_3DNOW|SWS_CPU_CAPS_ALTIVEC|SWS_CPU_CAPS_BFIN);
-#ifdef HAVE_MMX2
+#if HAVE_MMX2
flags |= SWS_CPU_CAPS_MMX|SWS_CPU_CAPS_MMX2;
-#elif defined (HAVE_3DNOW)
+#elif HAVE_3DNOW
flags |= SWS_CPU_CAPS_MMX|SWS_CPU_CAPS_3DNOW;
-#elif defined (HAVE_MMX)
+#elif HAVE_MMX
flags |= SWS_CPU_CAPS_MMX;
-#elif defined (HAVE_ALTIVEC)
+#elif HAVE_ALTIVEC
flags |= SWS_CPU_CAPS_ALTIVEC;
-#elif defined (ARCH_BFIN)
+#elif ARCH_BFIN
flags |= SWS_CPU_CAPS_BFIN;
#endif
#endif /* RUNTIME_CPUDETECT */
{
c->swScale= PlanarToNV12Wrapper;
}
-#ifdef CONFIG_GPL
+#if CONFIG_GPL
/* yuv2bgr */
if ((srcFormat==PIX_FMT_YUV420P || srcFormat==PIX_FMT_YUV422P) && (isBGR(dstFormat) || isRGB(dstFormat))
&& !(flags & SWS_ACCURATE_RND) && !(dstH&1))
c->swScale= gray16swap;
}
-#ifdef ARCH_BFIN
+#if ARCH_BFIN
if (flags & SWS_CPU_CAPS_BFIN)
ff_bfin_get_unscaled_swscale (c);
#endif
(flags&SWS_BICUBLIN) ? (flags|SWS_BILINEAR) : flags,
srcFilter->chrV, dstFilter->chrV, c->param);
-#ifdef HAVE_ALTIVEC
+#if HAVE_ALTIVEC
c->vYCoeffsBank = av_malloc(sizeof (vector signed short)*c->vLumFilterSize*c->dstH);
c->vCCoeffsBank = av_malloc(sizeof (vector signed short)*c->vChrFilterSize*c->chrDstH);
}
else
{
-#if defined(ARCH_X86)
+#if ARCH_X86
av_log(c, AV_LOG_VERBOSE, "using X86-Asm scaler for horizontal scaling\n");
#else
if (flags & SWS_FAST_BILINEAR)
av_freep(&c->vChrFilter);
av_freep(&c->hLumFilter);
av_freep(&c->hChrFilter);
-#ifdef HAVE_ALTIVEC
+#if HAVE_ALTIVEC
av_freep(&c->vYCoeffsBank);
av_freep(&c->vCCoeffsBank);
#endif
av_freep(&c->hLumFilterPos);
av_freep(&c->hChrFilterPos);
-#if defined(ARCH_X86) && defined(CONFIG_GPL)
+#if ARCH_X86 && CONFIG_GPL
#ifdef MAP_ANONYMOUS
if (c->funnyYCode) munmap(c->funnyYCode, MAX_FUNNY_CODE_SIZE);
if (c->funnyUVCode) munmap(c->funnyUVCode, MAX_FUNNY_CODE_SIZE);
#endif
c->funnyYCode=NULL;
c->funnyUVCode=NULL;
-#endif /* defined(ARCH_X86) */
+#endif /* ARCH_X86 */
av_freep(&c->lumMmx2Filter);
av_freep(&c->chrMmx2Filter);
#include "config.h"
-#ifdef HAVE_ALTIVEC_H
+#if HAVE_ALTIVEC_H
#include <altivec.h>
#endif
#define ALT32_CORR 1
#endif
-#ifdef ARCH_X86_64
+#if ARCH_X86_64
# define APCK_PTR2 8
# define APCK_COEF 16
# define APCK_SIZE 24
uint64_t u_temp __attribute__((aligned(8)));
uint64_t v_temp __attribute__((aligned(8)));
-#ifdef HAVE_ALTIVEC
+#if HAVE_ALTIVEC
vector signed short CY;
vector signed short CRV;
#endif
-#ifdef ARCH_BFIN
+#if ARCH_BFIN
uint32_t oy __attribute__((aligned(4)));
uint32_t oc __attribute__((aligned(4)));
uint32_t zero __attribute__((aligned(4)));
uint32_t gmask __attribute__((aligned(4)));
#endif
-#ifdef HAVE_VIS
+#if HAVE_VIS
uint64_t sparc_coeffs[10] __attribute__((aligned(8)));
#endif
#undef EMMS
#undef SFENCE
-#ifdef HAVE_3DNOW
+#if HAVE_3DNOW
/* On K6 femms is faster than emms. On K7 femms is directly mapped to emms. */
#define EMMS "femms"
#else
#define EMMS "emms"
#endif
-#ifdef HAVE_3DNOW
+#if HAVE_3DNOW
#define PREFETCH "prefetch"
#define PREFETCHW "prefetchw"
-#elif defined (HAVE_MMX2)
+#elif HAVE_MMX2
#define PREFETCH "prefetchnta"
#define PREFETCHW "prefetcht0"
#else
#define PREFETCHW " # nop"
#endif
-#ifdef HAVE_MMX2
+#if HAVE_MMX2
#define SFENCE "sfence"
#else
#define SFENCE " # nop"
#endif
-#ifdef HAVE_MMX2
+#if HAVE_MMX2
#define PAVGB(a,b) "pavgb " #a ", " #b " \n\t"
-#elif defined (HAVE_3DNOW)
+#elif HAVE_3DNOW
#define PAVGB(a,b) "pavgusb " #a ", " #b " \n\t"
#endif
-#ifdef HAVE_MMX2
+#if HAVE_MMX2
#define REAL_MOVNTQ(a,b) "movntq " #a ", " #b " \n\t"
#else
#define REAL_MOVNTQ(a,b) "movq " #a ", " #b " \n\t"
#endif
#define MOVNTQ(a,b) REAL_MOVNTQ(a,b)
-#ifdef HAVE_ALTIVEC
+#if HAVE_ALTIVEC
#include "swscale_altivec_template.c"
#endif
"cmp "#dstw", "#index" \n\t"\
" jb 1b \n\t"
-#ifdef HAVE_MMX2
+#if HAVE_MMX2
#undef WRITEBGR24
#define WRITEBGR24(dst, dstw, index) WRITEBGR24MMX2(dst, dstw, index)
#else
int16_t *chrFilter, int16_t **chrSrc, int chrFilterSize,
uint8_t *dest, uint8_t *uDest, uint8_t *vDest, long dstW, long chrDstW)
{
-#ifdef HAVE_MMX
+#if HAVE_MMX
if(!(c->flags & SWS_BITEXACT)){
if (c->flags & SWS_ACCURATE_RND){
if (uDest){
return;
}
#endif
-#ifdef HAVE_ALTIVEC
+#if HAVE_ALTIVEC
yuv2yuvX_altivec_real(lumFilter, lumSrc, lumFilterSize,
chrFilter, chrSrc, chrFilterSize,
dest, uDest, vDest, dstW, chrDstW);
uint8_t *dest, uint8_t *uDest, uint8_t *vDest, long dstW, long chrDstW)
{
int i;
-#ifdef HAVE_MMX
+#if HAVE_MMX
if(!(c->flags & SWS_BITEXACT)){
long p= uDest ? 3 : 1;
uint8_t *src[3]= {lumSrc + dstW, chrSrc + chrDstW, chrSrc + VOFW + chrDstW};
int16_t *chrFilter, int16_t **chrSrc, int chrFilterSize,
uint8_t *dest, long dstW, long dstY)
{
-#ifdef HAVE_MMX
+#if HAVE_MMX
long dummy=0;
if(!(c->flags & SWS_BITEXACT)){
if (c->flags & SWS_ACCURATE_RND){
}
}
#endif /* HAVE_MMX */
-#ifdef HAVE_ALTIVEC
+#if HAVE_ALTIVEC
/* The following list of supported dstFormat values should
match what's found in the body of altivec_yuv2packedX() */
if (c->dstFormat==PIX_FMT_ABGR || c->dstFormat==PIX_FMT_BGRA ||
int uvalpha1=4095-uvalpha;
int i;
-#ifdef HAVE_MMX
+#if HAVE_MMX
if(!(c->flags & SWS_BITEXACT)){
switch(c->dstFormat)
{
return;
}
-#ifdef HAVE_MMX
+#if HAVE_MMX
if(!(flags & SWS_BITEXACT)){
if (uvalpha < 2048) // note this is not correct (shifts chrominance by 0.5 pixels) but it is a bit faster
{
static inline void RENAME(yuy2ToY)(uint8_t *dst, uint8_t *src, long width, uint32_t *unused)
{
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile(
"movq "MANGLE(bm01010101)", %%mm2 \n\t"
"mov %0, %%"REG_a" \n\t"
static inline void RENAME(yuy2ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, long width, uint32_t *unused)
{
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile(
"movq "MANGLE(bm01010101)", %%mm4 \n\t"
"mov %0, %%"REG_a" \n\t"
* yuy2ToY/UV)(dst, src+1, ...) would have 100% unaligned accesses. */
static inline void RENAME(uyvyToY)(uint8_t *dst, uint8_t *src, long width, uint32_t *unused)
{
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile(
"mov %0, %%"REG_a" \n\t"
"1: \n\t"
static inline void RENAME(uyvyToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, long width, uint32_t *unused)
{
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile(
"movq "MANGLE(bm01010101)", %%mm4 \n\t"
"mov %0, %%"REG_a" \n\t"
BGR2UV(uint16_t, rgb16ToUV, 0, 0, 0, 0xF800, 0x07E0, 0x001F, RU , GU<<5, BU<<11, RV , GV<<5, BV<<11, RGB2YUV_SHIFT+8)
BGR2UV(uint16_t, rgb15ToUV, 0, 0, 0, 0x7C00, 0x03E0, 0x001F, RU , GU<<5, BU<<10, RV , GV<<5, BV<<10, RGB2YUV_SHIFT+7)
-#ifdef HAVE_MMX
+#if HAVE_MMX
static inline void RENAME(bgr24ToY_mmx)(uint8_t *dst, uint8_t *src, long width, int srcFormat)
{
static inline void RENAME(bgr24ToY)(uint8_t *dst, uint8_t *src, long width, uint32_t *unused)
{
-#ifdef HAVE_MMX
+#if HAVE_MMX
RENAME(bgr24ToY_mmx)(dst, src, width, PIX_FMT_BGR24);
#else
int i;
static inline void RENAME(bgr24ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, long width, uint32_t *unused)
{
-#ifdef HAVE_MMX
+#if HAVE_MMX
RENAME(bgr24ToUV_mmx)(dstU, dstV, src1, width, PIX_FMT_BGR24);
#else
int i;
static inline void RENAME(rgb24ToY)(uint8_t *dst, uint8_t *src, long width, uint32_t *unused)
{
-#ifdef HAVE_MMX
+#if HAVE_MMX
RENAME(bgr24ToY_mmx)(dst, src, width, PIX_FMT_RGB24);
#else
int i;
static inline void RENAME(rgb24ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, long width, uint32_t *unused)
{
-#ifdef HAVE_MMX
+#if HAVE_MMX
assert(src1==src2);
RENAME(bgr24ToUV_mmx)(dstU, dstV, src1, width, PIX_FMT_RGB24);
#else
static inline void RENAME(hScale)(int16_t *dst, int dstW, uint8_t *src, int srcW, int xInc,
int16_t *filter, int16_t *filterPos, long filterSize)
{
-#ifdef HAVE_MMX
+#if HAVE_MMX
assert(filterSize % 4 == 0 && filterSize>0);
if (filterSize==4) // Always true for upscaling, sometimes for down, too.
{
);
}
#else
-#ifdef HAVE_ALTIVEC
+#if HAVE_ALTIVEC
hScale_altivec_real(dst, dstW, src, srcW, xInc, filter, filterPos, filterSize);
#else
int i;
src= formatConvBuffer;
}
-#ifdef HAVE_MMX
+#if HAVE_MMX
// Use the new MMX scaler if the MMX2 one can't be used (it is faster than the x86 ASM one).
if (!(flags&SWS_FAST_BILINEAR) || (!canMMX2BeUsed))
#else
}
else // fast bilinear upscale / crap downscale
{
-#if defined(ARCH_X86)
-#ifdef HAVE_MMX2
+#if ARCH_X86
+#if HAVE_MMX2
int i;
#if defined(PIC)
uint64_t ebxsave __attribute__((aligned(8)));
PREFETCH" 32(%%"REG_c") \n\t"
PREFETCH" 64(%%"REG_c") \n\t"
-#ifdef ARCH_X86_64
+#if ARCH_X86_64
#define FUNNY_Y_CODE \
"movl (%%"REG_b"), %%esi \n\t"\
:: "r" (src), "m" (dst), "m" (dstWidth), "m" (xInc_shr16), "m" (xInc_mask)
: "%"REG_a, "%"REG_d, "%ecx", "%"REG_D, "%esi"
);
-#ifdef HAVE_MMX2
+#if HAVE_MMX2
} //if MMX2 can't be used
#endif
#else
dst[i]= (src[xx]<<7) + (src[xx+1] - src[xx])*xalpha;
xpos+=xInc;
}
-#endif /* defined(ARCH_X86) */
+#endif /* ARCH_X86 */
}
if(c->srcRange != c->dstRange && !(isRGB(c->dstFormat) || isBGR(c->dstFormat))){
src2= formatConvBuffer+VOFW;
}
-#ifdef HAVE_MMX
+#if HAVE_MMX
// Use the new MMX scaler if the MMX2 one can't be used (it is faster than the x86 ASM one).
if (!(flags&SWS_FAST_BILINEAR) || (!canMMX2BeUsed))
#else
}
else // fast bilinear upscale / crap downscale
{
-#if defined(ARCH_X86)
-#ifdef HAVE_MMX2
+#if ARCH_X86
+#if HAVE_MMX2
int i;
#if defined(PIC)
uint64_t ebxsave __attribute__((aligned(8)));
PREFETCH" 32(%%"REG_c") \n\t"
PREFETCH" 64(%%"REG_c") \n\t"
-#ifdef ARCH_X86_64
+#if ARCH_X86_64
#define FUNNY_UV_CODE \
"movl (%%"REG_b"), %%esi \n\t"\
/* GCC 3.3 makes MPlayer crash on IA-32 machines when using "g" operand here,
which is needed to support GCC 4.0. */
-#if defined(ARCH_X86_64) && ((__GNUC__ > 3) || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4))
+#if ARCH_X86_64 && ((__GNUC__ > 3) || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4))
:: "m" (src1), "m" (dst), "g" ((long)dstWidth), "m" (xInc_shr16), "m" (xInc_mask),
#else
:: "m" (src1), "m" (dst), "m" ((long)dstWidth), "m" (xInc_shr16), "m" (xInc_mask),
"r" (src2)
: "%"REG_a, "%"REG_d, "%ecx", "%"REG_D, "%esi"
);
-#ifdef HAVE_MMX2
+#if HAVE_MMX2
} //if MMX2 can't be used
#endif
#else
*/
xpos+=xInc;
}
-#endif /* defined(ARCH_X86) */
+#endif /* ARCH_X86 */
}
if(c->srcRange != c->dstRange && !(isRGB(c->dstFormat) || isBGR(c->dstFormat))){
int i;
break; //we can't output a dstY line so let's try with the next slice
}
-#ifdef HAVE_MMX
+#if HAVE_MMX
c->blueDither= ff_dither8[dstY&1];
if (c->dstFormat == PIX_FMT_RGB555 || c->dstFormat == PIX_FMT_BGR555)
c->greenDither= ff_dither8[dstY&1];
{
int16_t **lumSrcPtr= lumPixBuf + lumBufIndex + firstLumSrcY - lastInLumBuf + vLumBufSize;
int16_t **chrSrcPtr= chrPixBuf + chrBufIndex + firstChrSrcY - lastInChrBuf + vChrBufSize;
-#ifdef HAVE_MMX
+#if HAVE_MMX
int i;
if (flags & SWS_ACCURATE_RND){
int s= APCK_SIZE / 8;
}
}
-#ifdef HAVE_MMX
+#if HAVE_MMX
__asm__ volatile(SFENCE:::"memory");
__asm__ volatile(EMMS:::"memory");
#endif
extern const uint8_t dither_8x8_73[8][8];
extern const uint8_t dither_8x8_220[8][8];
-#ifdef HAVE_MMX
+#if HAVE_MMX
/* hope these constant values are cache line aligned */
DECLARE_ASM_CONST(8, uint64_t, mmx_00ffw) = 0x00ff00ff00ff00ffULL;
DECLARE_ASM_CONST(8, uint64_t, mmx_redmask) = 0xf8f8f8f8f8f8f8f8ULL;
DECLARE_ASM_CONST(8, uint64_t, mmx_grnmask) = 0xfcfcfcfcfcfcfcfcULL;
-#undef HAVE_MMX
-
//MMX versions
#undef RENAME
-#define HAVE_MMX
#undef HAVE_MMX2
#undef HAVE_3DNOW
+#define HAVE_MMX2 0
+#define HAVE_3DNOW 0
#define RENAME(a) a ## _MMX
#include "yuv2rgb_template.c"
//MMX2 versions
#undef RENAME
-#define HAVE_MMX
-#define HAVE_MMX2
-#undef HAVE_3DNOW
+#undef HAVE_MMX2
+#define HAVE_MMX2 1
#define RENAME(a) a ## _MMX2
#include "yuv2rgb_template.c"
SwsFunc yuv2rgb_get_func_ptr (SwsContext *c)
{
-#if defined(HAVE_MMX2) || defined(HAVE_MMX)
+#if HAVE_MMX2 || HAVE_MMX
if (c->flags & SWS_CPU_CAPS_MMX2){
switch(c->dstFormat){
case PIX_FMT_RGB32: return yuv420_rgb32_MMX2;
}
}
#endif
-#ifdef HAVE_VIS
+#if HAVE_VIS
{
SwsFunc t= yuv2rgb_init_vis(c);
if (t) return t;
}
#endif
-#ifdef CONFIG_MLIB
+#if CONFIG_MLIB
{
SwsFunc t= yuv2rgb_init_mlib(c);
if (t) return t;
}
#endif
-#ifdef HAVE_ALTIVEC
+#if HAVE_ALTIVEC
if (c->flags & SWS_CPU_CAPS_ALTIVEC)
{
SwsFunc t = yuv2rgb_init_altivec(c);
}
#endif
-#ifdef ARCH_BFIN
+#if ARCH_BFIN
if (c->flags & SWS_CPU_CAPS_BFIN)
{
SwsFunc t = ff_bfin_yuv2rgb_get_func_ptr (c);
#undef EMMS
#undef SFENCE
-#ifdef HAVE_3DNOW
+#if HAVE_3DNOW
/* On K6 femms is faster than emms. On K7 femms is directly mapped to emms. */
#define EMMS "femms"
#else
#define EMMS "emms"
#endif
-#ifdef HAVE_MMX2
+#if HAVE_MMX2
#define MOVNTQ "movntq"
#define SFENCE "sfence"
#else
"1: \n\t"
YUV2RGB
/* mm0=B, %%mm2=G, %%mm1=R */
-#ifdef HAVE_MMX2
+#if HAVE_MMX2
"movq "MANGLE(ff_M24A)", %%mm4 \n\t"
"movq "MANGLE(ff_M24C)", %%mm7 \n\t"
"pshufw $0x50, %%mm0, %%mm5 \n\t" /* B3 B2 B3 B2 B1 B0 B1 B0 */