x86-64: Clear the R_X86_64_converted_reloc_bit bit
authorH.J. Lu <hjl.tools@gmail.com>
Mon, 2 Jul 2018 20:08:09 +0000 (13:08 -0700)
committerH.J. Lu <hjl.tools@gmail.com>
Mon, 2 Jul 2018 20:08:09 +0000 (13:08 -0700)
We need to clear the R_X86_64_converted_reloc_bit bit after setting it
to avoid leaking it out by --emit-relocs.

bfd/

PR ld/23324
* elf64-x86-64.c (elf_x86_64_relocate_section): Clear the
R_X86_64_converted_reloc_bit bit.

ld/

PR ld/23324
* testsuite/ld-x86-64/pr23324.s: New file.
* testsuite/ld-x86-64/pr23324a.d: Likewise.
* testsuite/ld-x86-64/pr23324b.d: Likewise.

bfd/ChangeLog
bfd/elf64-x86-64.c
ld/ChangeLog
ld/testsuite/ld-x86-64/pr23324.s [new file with mode: 0644]
ld/testsuite/ld-x86-64/pr23324a.d [new file with mode: 0644]
ld/testsuite/ld-x86-64/pr23324b.d [new file with mode: 0644]
ld/testsuite/ld-x86-64/x86-64.exp

index a7d8ce7..5fc2fec 100644 (file)
@@ -1,3 +1,9 @@
+2018-07-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR ld/23324
+       * elf64-x86-64.c (elf_x86_64_relocate_section): Clear the
+       R_X86_64_converted_reloc_bit bit.
+
 2018-07-02  Jeff Muizelaar  <jrmuizel@gmail.com>
            Tom Tromey  <tom@tromey.com>
 
index 4349561..c3a6c31 100644 (file)
@@ -2431,8 +2431,13 @@ elf_x86_64_relocate_section (bfd *output_bfd,
          continue;
        }
 
+      r_symndx = htab->r_sym (rel->r_info);
       converted_reloc = (r_type & R_X86_64_converted_reloc_bit) != 0;
-      r_type &= ~R_X86_64_converted_reloc_bit;
+      if (converted_reloc)
+       {
+         r_type &= ~R_X86_64_converted_reloc_bit;
+         rel->r_info = htab->r_info (r_symndx, r_type);
+       }
 
       if (r_type >= (int) R_X86_64_standard)
        return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
@@ -2443,7 +2448,6 @@ elf_x86_64_relocate_section (bfd *output_bfd,
       else
        howto = (x86_64_elf_howto_table
                 + ARRAY_SIZE (x86_64_elf_howto_table) - 1);
-      r_symndx = htab->r_sym (rel->r_info);
       h = NULL;
       sym = NULL;
       sec = NULL;
index 31959a7..afa9ae8 100644 (file)
@@ -1,3 +1,10 @@
+2018-07-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR ld/23324
+       * testsuite/ld-x86-64/pr23324.s: New file.
+       * testsuite/ld-x86-64/pr23324a.d: Likewise.
+       * testsuite/ld-x86-64/pr23324b.d: Likewise.
+
 2018-07-02  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 
        * arm-dis.c (select_arm_features): Fix typo in heading comment.  Allow
diff --git a/ld/testsuite/ld-x86-64/pr23324.s b/ld/testsuite/ld-x86-64/pr23324.s
new file mode 100644 (file)
index 0000000..3bad019
--- /dev/null
@@ -0,0 +1,6 @@
+       .text
+       .globl  _start
+       .type   _start,@function
+_start:
+       movq    _start@GOTPCREL(%rip), %rsi
+       ret
diff --git a/ld/testsuite/ld-x86-64/pr23324a.d b/ld/testsuite/ld-x86-64/pr23324a.d
new file mode 100644 (file)
index 0000000..72a4742
--- /dev/null
@@ -0,0 +1,8 @@
+#source: pr23324.s
+#as: --64 -mrelax-relocations=yes
+#ld: -q -melf_x86_64 -pie
+#readelf: -r --wide
+
+Relocation section '.rela.text' at offset 0x[0-9a-f]+ contains 1 entry:
+ +Offset +Info +Type +Sym.* Value +Symbol's Name \+ Addend
+[0-9a-f]+ +[0-9a-f]+ +R_X86_64_PC32 +[0-9a-f]+ +_start - 4
diff --git a/ld/testsuite/ld-x86-64/pr23324b.d b/ld/testsuite/ld-x86-64/pr23324b.d
new file mode 100644 (file)
index 0000000..ad58d86
--- /dev/null
@@ -0,0 +1,8 @@
+#source: pr23324.s
+#as: --x32 -mrelax-relocations=yes
+#ld: -q -melf32_x86_64 -pie
+#readelf: -r --wide
+
+Relocation section '.rela.text' at offset 0x[0-9a-f]+ contains 1 entry:
+ +Offset +Info +Type +Sym.* Value +Symbol's Name \+ Addend
+[0-9a-f]+ +[0-9a-f]+ +R_X86_64_PC32 +[0-9a-f]+ +_start - 4
index d07054c..e6ec049 100644 (file)
@@ -397,6 +397,8 @@ run_dump_test "pr22782a"
 run_dump_test "pr22782b"
 run_dump_test "pr23189"
 run_dump_test "pr23194"
+run_dump_test "pr23324a"
+run_dump_test "pr23324b"
 
 if { ![istarget "x86_64-*-linux*"] && ![istarget "x86_64-*-nacl*"]} {
     return