drm/arm: Fix spelling typo in comments
authorpengfuyuan <pengfuyuan@kylinos.cn>
Fri, 27 May 2022 03:39:03 +0000 (11:39 +0800)
committerLiviu Dudau <liviu.dudau@arm.com>
Fri, 22 Jul 2022 11:54:51 +0000 (12:54 +0100)
Fix spelling typo in comments.

Reported-by: k2ci <kernel-bot@kylinos.cn>
Signed-off-by: pengfuyuan <pengfuyuan@kylinos.cn>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220426121639.39160-1-pengfuyuan@kylinos.cn
drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c
drivers/gpu/drm/arm/malidp_regs.h

index e672b9cffee3c986f2c3a47cac2ea0b19c02cd56..3276a3e82c628ecc47e512bbd5244157451dadd3 100644 (file)
@@ -1271,7 +1271,7 @@ int komeda_release_unclaimed_resources(struct komeda_pipeline *pipe,
        return 0;
 }
 
-/* Since standalong disabled components must be disabled separately and in the
+/* Since standalone disabled components must be disabled separately and in the
  * last, So a complete disable operation may needs to call pipeline_disable
  * twice (two phase disabling).
  * Phase 1: disable the common components, flush it.
index 514c50dcb74ddd65462b4e621a4b5f7199718f9a..3bc16db70ddbeb7112667e7261d9a75ce6fc8377 100644 (file)
 #define     MALIDP_SE_COEFFTAB_DATA_MASK       0x3fff
 #define     MALIDP_SE_SET_COEFFTAB_DATA(x) \
                ((x) & MALIDP_SE_COEFFTAB_DATA_MASK)
-/* Enhance coeffents reigster offset */
+/* Enhance coefficients register offset */
 #define MALIDP_SE_IMAGE_ENH                    0x3C
 /* ENH_LIMITS offset 0x0 */
 #define     MALIDP_SE_ENH_LOW_LEVEL            24