dt-bindings: rk1108-cru: rename RK1108 to RV1108
authorAndy Yan <andy.yan@rock-chips.com>
Fri, 17 Mar 2017 17:18:37 +0000 (18:18 +0100)
committerHeiko Stuebner <heiko@sntech.de>
Wed, 22 Mar 2017 17:02:57 +0000 (18:02 +0100)
Rockchip finally named the SOC as RV1108, so change it.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.txt [moved from Documentation/devicetree/bindings/clock/rockchip,rk1108-cru.txt with 83% similarity]

@@ -1,12 +1,12 @@
-* Rockchip RK1108 Clock and Reset Unit
+* Rockchip RV1108 Clock and Reset Unit
 
-The RK1108 clock controller generates and supplies clock to various
+The RV1108 clock controller generates and supplies clock to various
 controllers within the SoC and also implements a reset controller for SoC
 peripherals.
 
 Required Properties:
 
-- compatible: should be "rockchip,rk1108-cru"
+- compatible: should be "rockchip,rv1108-cru"
 - reg: physical base address of the controller and length of memory mapped
   region.
 - #clock-cells: should be 1.
@@ -19,7 +19,7 @@ Optional Properties:
 
 Each clock is assigned an identifier and client nodes can use this identifier
 to specify the clock which they consume. All available clocks are defined as
-preprocessor macros in the dt-bindings/clock/rk1108-cru.h headers and can be
+preprocessor macros in the dt-bindings/clock/rv1108-cru.h headers and can be
 used in device tree sources. Similar macros exist for the reset sources in
 these files.
 
@@ -38,7 +38,7 @@ clock-output-names:
 Example: Clock controller node:
 
        cru: cru@20200000 {
-               compatible = "rockchip,rk1108-cru";
+               compatible = "rockchip,rv1108-cru";
                reg = <0x20200000 0x1000>;
                rockchip,grf = <&grf>;
 
@@ -50,7 +50,7 @@ Example: UART controller node that consumes the clock generated by the clock
   controller:
 
        uart0: serial@10230000 {
-               compatible = "rockchip,rk1108-uart", "snps,dw-apb-uart";
+               compatible = "rockchip,rv1108-uart", "snps,dw-apb-uart";
                reg = <0x10230000 0x100>;
                interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
                reg-shift = <2>;