drm/i915: Support pageflipping interrupts for all 3-pipes on IVB

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 722cdfc..b4999b5 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -615,12 +615,20 @@ static irqreturn_t ivybridge_irq_handler(DRM_IRQ_ARGS)
                intel_finish_page_flip_plane(dev, 1);
        }
 
+       if (de_iir & DE_PLANEC_FLIP_DONE_IVB) {
+               intel_prepare_page_flip(dev, 2);
+               intel_finish_page_flip_plane(dev, 2);
+       }
+
        if (de_iir & DE_PIPEA_VBLANK_IVB)
                drm_handle_vblank(dev, 0);
 
        if (de_iir & DE_PIPEB_VBLANK_IVB)
                drm_handle_vblank(dev, 1);
 
+       if (de_iir & DE_PIPEC_VBLANK_IVB)
+               drm_handle_vblank(dev, 2);
+
        /* check event from PCH */
        if (de_iir & DE_PCH_EVENT_IVB) {
                if (pch_iir & SDE_HOTPLUG_MASK_CPT)
@@ -1418,8 +1426,8 @@ static int ivybridge_enable_vblank(struct drm_device *dev, int pipe)
                return -EINVAL;
 
        spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
-       ironlake_enable_display_irq(dev_priv, (pipe == 0) ?
-                                   DE_PIPEA_VBLANK_IVB : DE_PIPEB_VBLANK_IVB);
+       ironlake_enable_display_irq(dev_priv,
+                                   DE_PIPEA_VBLANK_IVB << (5 * pipe));
        spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
 
        return 0;
@@ -1486,8 +1494,8 @@ static void ivybridge_disable_vblank(struct drm_device *dev, int pipe)
        unsigned long irqflags;
 
        spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
-       ironlake_disable_display_irq(dev_priv, (pipe == 0) ?
-                                    DE_PIPEA_VBLANK_IVB : DE_PIPEB_VBLANK_IVB);
+       ironlake_disable_display_irq(dev_priv,
+                                    DE_PIPEA_VBLANK_IVB << (pipe * 5));
        spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
 }
 
@@ -1802,9 +1810,11 @@ static int ivybridge_irq_postinstall(struct drm_device *dev)
 {
        drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
        /* enable kind of interrupts always enabled */
-       u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE_IVB |
-               DE_PCH_EVENT_IVB | DE_PLANEA_FLIP_DONE_IVB |
-               DE_PLANEB_FLIP_DONE_IVB;
+       u32 display_mask =
+               DE_MASTER_IRQ_CONTROL | DE_GSE_IVB | DE_PCH_EVENT_IVB |
+               DE_PLANEC_FLIP_DONE_IVB |
+               DE_PLANEB_FLIP_DONE_IVB |
+               DE_PLANEA_FLIP_DONE_IVB;
        u32 render_irqs;
        u32 hotplug_mask;
 
@@ -1813,8 +1823,11 @@ static int ivybridge_irq_postinstall(struct drm_device *dev)
        /* should always can generate irq */
        I915_WRITE(DEIIR, I915_READ(DEIIR));
        I915_WRITE(DEIMR, dev_priv->irq_mask);
-       I915_WRITE(DEIER, display_mask | DE_PIPEA_VBLANK_IVB |
-                  DE_PIPEB_VBLANK_IVB);
+       I915_WRITE(DEIER,
+                  display_mask |
+                  DE_PIPEC_VBLANK_IVB |
+                  DE_PIPEB_VBLANK_IVB |
+                  DE_PIPEA_VBLANK_IVB);
        POSTING_READ(DEIER);
 
        dev_priv->gt_irq_mask = ~0;

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 3850b7b..10e71a9 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3221,11 +3221,14 @@
 #define DE_PCH_EVENT_IVB               (1<<28)
 #define DE_DP_A_HOTPLUG_IVB            (1<<27)
 #define DE_AUX_CHANNEL_A_IVB           (1<<26)
+#define DE_SPRITEC_FLIP_DONE_IVB       (1<<14)
+#define DE_PLANEC_FLIP_DONE_IVB                (1<<13)
+#define DE_PIPEC_VBLANK_IVB            (1<<10)
 #define DE_SPRITEB_FLIP_DONE_IVB       (1<<9)
-#define DE_SPRITEA_FLIP_DONE_IVB       (1<<4)
 #define DE_PLANEB_FLIP_DONE_IVB                (1<<8)
-#define DE_PLANEA_FLIP_DONE_IVB                (1<<3)
 #define DE_PIPEB_VBLANK_IVB            (1<<5)
+#define DE_SPRITEA_FLIP_DONE_IVB       (1<<4)
+#define DE_PLANEA_FLIP_DONE_IVB                (1<<3)
 #define DE_PIPEA_VBLANK_IVB            (1<<0)
 
 #define VLV_MASTER_IER                 0x4400c /* Gunit master IER */