riscv: select HAVE_POSIX_CPU_TIMERS_TASK_WORK
authorJisheng Zhang <jszhang@kernel.org>
Sun, 2 Oct 2022 04:49:31 +0000 (10:19 +0530)
committerAnup Patel <anup@brainfault.org>
Sun, 2 Oct 2022 04:49:31 +0000 (10:19 +0530)
Move POSIX CPU timer expiry and signal delivery into task context to
allow PREEMPT_RT setups to coexist with KVM.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
arch/riscv/Kconfig

index d6b0ffd..74082e2 100644 (file)
@@ -103,6 +103,7 @@ config RISCV
        select HAVE_PERF_EVENTS
        select HAVE_PERF_REGS
        select HAVE_PERF_USER_STACK_DUMP
+       select HAVE_POSIX_CPU_TIMERS_TASK_WORK
        select HAVE_REGS_AND_STACK_ACCESS_API
        select HAVE_FUNCTION_ARG_ACCESS_API
        select HAVE_STACKPROTECTOR