MIPS: remove cpu_has_64bit_addresses
authorChristoph Hellwig <hch@lst.de>
Thu, 16 Apr 2020 15:00:06 +0000 (17:00 +0200)
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>
Sun, 19 Apr 2020 14:08:29 +0000 (16:08 +0200)
This macro is identical to CONFIG_64BIT, and using a Kconfig variable
for the only places that checks them (the ioremap implementation) will
simplify later patches in this series.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
arch/mips/include/asm/cpu-features.h
arch/mips/include/asm/io.h
arch/mips/include/asm/mach-ath25/cpu-feature-overrides.h
arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
arch/mips/include/asm/mach-lantiq/falcon/cpu-feature-overrides.h
arch/mips/include/asm/mach-ralink/mt7620/cpu-feature-overrides.h
arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h
arch/mips/include/asm/mach-ralink/rt288x/cpu-feature-overrides.h
arch/mips/include/asm/mach-ralink/rt305x/cpu-feature-overrides.h
arch/mips/include/asm/mach-ralink/rt3883/cpu-feature-overrides.h
arch/mips/include/asm/mach-rc32434/cpu-feature-overrides.h

index de44c92b1c1fece58f296bfaa3b6f2a736ae8690..400b123cb6da71428a99418741115770a43e18d7 100644 (file)
 # ifndef cpu_has_64bit_gp_regs
 # define cpu_has_64bit_gp_regs         0
 # endif
-# ifndef cpu_has_64bit_addresses
-# define cpu_has_64bit_addresses       0
-# endif
 # ifndef cpu_vmbits
 # define cpu_vmbits 31
 # endif
 # ifndef cpu_has_64bit_gp_regs
 # define cpu_has_64bit_gp_regs         1
 # endif
-# ifndef cpu_has_64bit_addresses
-# define cpu_has_64bit_addresses       1
-# endif
 # ifndef cpu_vmbits
 # define cpu_vmbits cpu_data[0].vmbits
 # define __NEED_VMBITS_PROBE
index cf1f2a4a241898317d1c622a9af115e914bad4f4..7be323ed2bfd27da7d2e23b0c7bf26bed1b8a644 100644 (file)
@@ -166,7 +166,7 @@ static inline void __iomem * __ioremap_mode(phys_addr_t offset, unsigned long si
 
 #define __IS_LOW512(addr) (!((phys_addr_t)(addr) & (phys_addr_t) ~0x1fffffffULL))
 
-       if (cpu_has_64bit_addresses) {
+       if (IS_ENABLED(CONFIG_64BIT)) {
                u64 base = UNCAC_BASE;
 
                /*
@@ -275,7 +275,7 @@ static inline void iounmap(const volatile void __iomem *addr)
 
 #define __IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1)
 
-       if (cpu_has_64bit_addresses ||
+       if (IS_ENABLED(CONFIG_64BIT) ||
            (__builtin_constant_p(addr) && __IS_KSEG1(addr)))
                return;
 
index 95a0b580909d79790d8cc3ceacdb56cdafcaf655..a54f20d956a2c04f33379a720c7ca0918bee430a 100644 (file)
@@ -56,6 +56,5 @@
 #define cpu_has_64bits                 0
 #define cpu_has_64bit_zero_reg         0
 #define cpu_has_64bit_gp_regs          0
-#define cpu_has_64bit_addresses                0
 
 #endif /* __ASM_MACH_ATH25_CPU_FEATURE_OVERRIDES_H */
index e7c972fccd9ffe6984ab837266998c5292ef85e0..79ab3ad9fee82f292294c60843740451b64763b5 100644 (file)
@@ -45,7 +45,6 @@
 #define cpu_has_64bits         0
 #define cpu_has_64bit_zero_reg 0
 #define cpu_has_64bit_gp_regs  0
-#define cpu_has_64bit_addresses 0
 
 #define cpu_dcache_line_size() 32
 #define cpu_icache_line_size() 32
index f03c1c42dd90950d3b553eef16a5bfd1208e0e4d..10226976f7b765e64001d12c20f3790a2adeada5 100644 (file)
@@ -46,7 +46,6 @@
 #define cpu_has_64bits         0
 #define cpu_has_64bit_zero_reg 0
 #define cpu_has_64bit_gp_regs  0
-#define cpu_has_64bit_addresses        0
 
 #define cpu_dcache_line_size() 32
 #define cpu_icache_line_size() 32
index 6ea5908f0c110fe1cfa32e98219baddcfcd43091..c4579f1705c27cfa4d77d26e7c475d6fbd0bc7dc 100644 (file)
@@ -45,7 +45,6 @@
 #define cpu_has_64bits         0
 #define cpu_has_64bit_zero_reg 0
 #define cpu_has_64bit_gp_regs  0
-#define cpu_has_64bit_addresses        0
 
 #define cpu_dcache_line_size() 32
 #define cpu_icache_line_size() 32
index e06f517b2588732cdc8891a4e21686812e8016ac..168359a0a58d8b03bee1515a527ebde6e682b0fc 100644 (file)
@@ -46,7 +46,6 @@
 #define cpu_has_64bits         0
 #define cpu_has_64bit_zero_reg 0
 #define cpu_has_64bit_gp_regs  0
-#define cpu_has_64bit_addresses        0
 
 #define cpu_dcache_line_size() 32
 #define cpu_icache_line_size() 32
index 9c069646d0bd57ba5467ff3c34daa0348fdea374..fdaf8c9182bc5568bdf89c16cb65cd505cd459c7 100644 (file)
@@ -44,7 +44,6 @@
 #define cpu_has_64bits         0
 #define cpu_has_64bit_zero_reg 0
 #define cpu_has_64bit_gp_regs  0
-#define cpu_has_64bit_addresses        0
 
 #define cpu_dcache_line_size() 16
 #define cpu_icache_line_size() 16
index 2e423fd1538482a0452f43d0916feaf6e2b44e4b..7a385fe784a6677af09ba9ddd41384623507a7f0 100644 (file)
@@ -44,7 +44,6 @@
 #define cpu_has_64bits         0
 #define cpu_has_64bit_zero_reg 0
 #define cpu_has_64bit_gp_regs  0
-#define cpu_has_64bit_addresses        0
 
 #define cpu_dcache_line_size() 32
 #define cpu_icache_line_size() 32
index 7cee0e23258011b194e9a9620fa898b882907a96..0a61910f6521cb51f11014a4ace17184b5cefa2d 100644 (file)
@@ -43,7 +43,6 @@
 #define cpu_has_64bits         0
 #define cpu_has_64bit_zero_reg 0
 #define cpu_has_64bit_gp_regs  0
-#define cpu_has_64bit_addresses        0
 
 #define cpu_dcache_line_size() 32
 #define cpu_icache_line_size() 32
index bc46179fdf400b30d26020f354d3d258a23de175..8539ccfb69b79e62bfc92d918f61beb0fab4e05d 100644 (file)
@@ -54,7 +54,6 @@
 #define cpu_has_64bits                 0
 #define cpu_has_64bit_zero_reg         0
 #define cpu_has_64bit_gp_regs          0
-#define cpu_has_64bit_addresses                0
 
 #define cpu_has_inclusive_pcaches      0