bool isSetCCEquivalent(SDValue N, SDValue &LHS, SDValue &RHS,
SDValue &CC, bool MatchStrict = false) const;
bool isOneUseSetCC(SDValue N) const;
- bool isCheaperToUseNegatedFPOps(SDValue X, SDValue Y);
SDValue SimplifyNodeWithTwoResults(SDNode *N, unsigned LoOp,
unsigned HiOp);
return SDValue();
}
-/// Return true if both inputs are at least as cheap in negated form and at
-/// least one input is strictly cheaper in negated form.
-bool DAGCombiner::isCheaperToUseNegatedFPOps(SDValue X, SDValue Y) {
- TargetLowering::NegatibleCost LHSNeg =
- TLI.getNegatibleCost(X, DAG, LegalOperations, ForCodeSize);
- if (TargetLowering::NegatibleCost::Expensive == LHSNeg)
- return false;
-
- TargetLowering::NegatibleCost RHSNeg =
- TLI.getNegatibleCost(Y, DAG, LegalOperations, ForCodeSize);
- if (TargetLowering::NegatibleCost::Expensive == RHSNeg)
- return false;
-
- // Both negated operands are at least as cheap as their counterparts.
- // Check to see if at least one is cheaper negated.
- return (TargetLowering::NegatibleCost::Cheaper == LHSNeg ||
- TargetLowering::NegatibleCost::Cheaper == RHSNeg);
-}
-
SDValue DAGCombiner::visitFMUL(SDNode *N) {
SDValue N0 = N->getOperand(0);
SDValue N1 = N->getOperand(1);
return DAG.getNode(ISD::FNEG, DL, VT, N0);
// -N0 * -N1 --> N0 * N1
- if (isCheaperToUseNegatedFPOps(N0, N1)) {
- SDValue NegN0 = TLI.negateExpression(N0, DAG, LegalOperations, ForCodeSize);
- SDValue NegN1 = TLI.negateExpression(N1, DAG, LegalOperations, ForCodeSize);
+ TargetLowering::NegatibleCost CostN0 =
+ TargetLowering::NegatibleCost::Expensive;
+ TargetLowering::NegatibleCost CostN1 =
+ TargetLowering::NegatibleCost::Expensive;
+ SDValue NegN0 =
+ TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize, CostN0);
+ SDValue NegN1 =
+ TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1);
+ if (NegN0 && NegN1 &&
+ (CostN0 == TargetLowering::NegatibleCost::Cheaper ||
+ CostN1 == TargetLowering::NegatibleCost::Cheaper))
return DAG.getNode(ISD::FMUL, DL, VT, NegN0, NegN1, Flags);
- }
// fold (fmul X, (select (fcmp X > 0.0), -1.0, 1.0)) -> (fneg (fabs X))
// fold (fmul X, (select (fcmp X > 0.0), 1.0, -1.0)) -> (fabs X)
}
// (-N0 * -N1) + N2 --> (N0 * N1) + N2
- if (isCheaperToUseNegatedFPOps(N0, N1)) {
- SDValue NegN0 = TLI.negateExpression(N0, DAG, LegalOperations, ForCodeSize);
- SDValue NegN1 = TLI.negateExpression(N1, DAG, LegalOperations, ForCodeSize);
+ TargetLowering::NegatibleCost CostN0 =
+ TargetLowering::NegatibleCost::Expensive;
+ TargetLowering::NegatibleCost CostN1 =
+ TargetLowering::NegatibleCost::Expensive;
+ SDValue NegN0 =
+ TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize, CostN0);
+ SDValue NegN1 =
+ TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1);
+ if (NegN0 && NegN1 &&
+ (CostN0 == TargetLowering::NegatibleCost::Cheaper ||
+ CostN1 == TargetLowering::NegatibleCost::Cheaper))
return DAG.getNode(ISD::FMA, DL, VT, NegN0, NegN1, N2, Flags);
- }
if (UnsafeFPMath) {
if (N0CFP && N0CFP->isZero())
}
// (fdiv (fneg X), (fneg Y)) -> (fdiv X, Y)
- if (isCheaperToUseNegatedFPOps(N0, N1)) {
- SDValue Neg0 = TLI.negateExpression(N0, DAG, LegalOperations, ForCodeSize);
- SDValue Neg1 = TLI.negateExpression(N1, DAG, LegalOperations, ForCodeSize);
- return DAG.getNode(ISD::FDIV, SDLoc(N), VT, Neg0, Neg1, Flags);
- }
+ TargetLowering::NegatibleCost CostN0 =
+ TargetLowering::NegatibleCost::Expensive;
+ TargetLowering::NegatibleCost CostN1 =
+ TargetLowering::NegatibleCost::Expensive;
+ SDValue NegN0 =
+ TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize, CostN0);
+ SDValue NegN1 =
+ TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1);
+ if (NegN0 && NegN1 &&
+ (CostN0 == TargetLowering::NegatibleCost::Cheaper ||
+ CostN1 == TargetLowering::NegatibleCost::Cheaper))
+ return DAG.getNode(ISD::FDIV, SDLoc(N), VT, NegN0, NegN1, Flags);
return SDValue();
}
; CHECK-NEXT: addi 3, 3, .LCPI2_0@toc@l
; CHECK-NEXT: qvlfsx 0, 0, 3
; CHECK-NEXT: qvfmuls 4, 3, 3
-; CHECK-NEXT: qvfnmsubs 2, 2, 0, 2
-; CHECK-NEXT: qvfmadds 0, 2, 4, 0
+; CHECK-NEXT: qvfmsubs 2, 2, 0, 2
+; CHECK-NEXT: qvfnmsubs 0, 2, 4, 0
; CHECK-NEXT: qvfmuls 0, 3, 0
; CHECK-NEXT: qvfmul 1, 1, 0
; CHECK-NEXT: blr
; CHECK-NEXT: addi 3, 3, .LCPI6_0@toc@l
; CHECK-NEXT: qvlfsx 0, 0, 3
; CHECK-NEXT: qvfmuls 4, 3, 3
-; CHECK-NEXT: qvfnmsubs 2, 2, 0, 2
-; CHECK-NEXT: qvfmadds 0, 2, 4, 0
+; CHECK-NEXT: qvfmsubs 2, 2, 0, 2
+; CHECK-NEXT: qvfnmsubs 0, 2, 4, 0
; CHECK-NEXT: qvfmuls 0, 3, 0
; CHECK-NEXT: qvfmuls 1, 1, 0
; CHECK-NEXT: blr
; CHECK-NEXT: addis 3, 2, .LCPI16_0@toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI16_0@toc@l
; CHECK-NEXT: qvfmuls 4, 2, 2
-; CHECK-NEXT: qvfnmsubs 3, 1, 0, 1
-; CHECK-NEXT: qvfmadds 0, 3, 4, 0
+; CHECK-NEXT: qvfmsubs 3, 1, 0, 1
+; CHECK-NEXT: qvfnmsubs 0, 3, 4, 0
; CHECK-NEXT: qvlfsx 3, 0, 3
; CHECK-NEXT: addis 3, 2, .LCPI16_2@toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI16_2@toc@l
; CHECK-NEXT: addis 3, 2, .LCPI17_0@toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI17_0@toc@l
; CHECK-NEXT: qvfmuls 4, 2, 2
-; CHECK-NEXT: qvfnmsubs 3, 1, 0, 1
-; CHECK-NEXT: qvfmadds 0, 3, 4, 0
+; CHECK-NEXT: qvfmsubs 3, 1, 0, 1
+; CHECK-NEXT: qvfnmsubs 0, 3, 4, 0
; CHECK-NEXT: qvlfsx 3, 0, 3
; CHECK-NEXT: qvfmuls 0, 2, 0
; CHECK-NEXT: qvfmuls 0, 0, 1