watchdog: renesas_wdt: don't set divider while watchdog is running

[ Upstream commit e990e12741877e9bfac402ca468f4007a75f6e2a ]

The datasheet says we must stop the timer before changing the clock
divider. This can happen when the restart handler is called while the
watchdog is running.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/watchdog/renesas_wdt.c b/drivers/watchdog/renesas_wdt.c
index 88d81fe..d01efd3 100644 (file)
--- a/drivers/watchdog/renesas_wdt.c
+++ b/drivers/watchdog/renesas_wdt.c
@@ -77,12 +77,17 @@ static int rwdt_init_timeout(struct watchdog_device *wdev)
 static int rwdt_start(struct watchdog_device *wdev)
 {
        struct rwdt_priv *priv = watchdog_get_drvdata(wdev);
+       u8 val;
 
        pm_runtime_get_sync(wdev->parent);
 
-       rwdt_write(priv, 0, RWTCSRB);
-       rwdt_write(priv, priv->cks, RWTCSRA);
+       /* Stop the timer before we modify any register */
+       val = readb_relaxed(priv->base + RWTCSRA) & ~RWTCSRA_TME;
+       rwdt_write(priv, val, RWTCSRA);
+
        rwdt_init_timeout(wdev);
+       rwdt_write(priv, priv->cks, RWTCSRA);
+       rwdt_write(priv, 0, RWTCSRB);
 
        while (readb_relaxed(priv->base + RWTCSRA) & RWTCSRA_WRFLG)
                cpu_relax();