clk: qcom: gcc-sm8550: Add the missing RETAIN_FF_ENABLE GDSC flag

[ Upstream commit 1fe8273c8d4088dd68faaab8640ec95f381cbf1e ]

All of the 8550's GCC GDSCs can and should use the retain registers so
as not to lose their state when entering lower power modes.

Fixes: 955f2ea3b9e9 ("clk: qcom: Add GCC driver for SM8550")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231218-topic-8550_fixes-v1-3-ce1272d77540@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/clk/qcom/gcc-sm8550.c b/drivers/clk/qcom/gcc-sm8550.c
index 586126c..1c3d785 100644 (file)
--- a/drivers/clk/qcom/gcc-sm8550.c
+++ b/drivers/clk/qcom/gcc-sm8550.c
@@ -3002,7 +3002,7 @@ static struct gdsc pcie_0_gdsc = {
                .name = "pcie_0_gdsc",
        },
        .pwrsts = PWRSTS_OFF_ON,
-       .flags = POLL_CFG_GDSCR,
+       .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
 };
 
 static struct gdsc pcie_0_phy_gdsc = {
@@ -3011,7 +3011,7 @@ static struct gdsc pcie_0_phy_gdsc = {
                .name = "pcie_0_phy_gdsc",
        },
        .pwrsts = PWRSTS_OFF_ON,
-       .flags = POLL_CFG_GDSCR,
+       .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
 };
 
 static struct gdsc pcie_1_gdsc = {
@@ -3020,7 +3020,7 @@ static struct gdsc pcie_1_gdsc = {
                .name = "pcie_1_gdsc",
        },
        .pwrsts = PWRSTS_OFF_ON,
-       .flags = POLL_CFG_GDSCR,
+       .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
 };
 
 static struct gdsc pcie_1_phy_gdsc = {
@@ -3029,7 +3029,7 @@ static struct gdsc pcie_1_phy_gdsc = {
                .name = "pcie_1_phy_gdsc",
        },
        .pwrsts = PWRSTS_OFF_ON,
-       .flags = POLL_CFG_GDSCR,
+       .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
 };
 
 static struct gdsc ufs_phy_gdsc = {
@@ -3038,7 +3038,7 @@ static struct gdsc ufs_phy_gdsc = {
                .name = "ufs_phy_gdsc",
        },
        .pwrsts = PWRSTS_OFF_ON,
-       .flags = POLL_CFG_GDSCR,
+       .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
 };
 
 static struct gdsc ufs_mem_phy_gdsc = {
@@ -3047,7 +3047,7 @@ static struct gdsc ufs_mem_phy_gdsc = {
                .name = "ufs_mem_phy_gdsc",
        },
        .pwrsts = PWRSTS_OFF_ON,
-       .flags = POLL_CFG_GDSCR,
+       .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
 };
 
 static struct gdsc usb30_prim_gdsc = {
@@ -3056,7 +3056,7 @@ static struct gdsc usb30_prim_gdsc = {
                .name = "usb30_prim_gdsc",
        },
        .pwrsts = PWRSTS_OFF_ON,
-       .flags = POLL_CFG_GDSCR,
+       .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
 };
 
 static struct gdsc usb3_phy_gdsc = {
@@ -3065,7 +3065,7 @@ static struct gdsc usb3_phy_gdsc = {
                .name = "usb3_phy_gdsc",
        },
        .pwrsts = PWRSTS_OFF_ON,
-       .flags = POLL_CFG_GDSCR,
+       .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
 };
 
 static struct clk_regmap *gcc_sm8550_clocks[] = {