riscv: dts: starfive: Add PWM node

Adding StarFive PWM controller node to VisionFive 2 SoC.

Signed-off-by: William Qiu <william.qiu@starfivetech.com>

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index 7684bf7..4633a2c 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -157,6 +157,12 @@
        status = "okay";
 };
 
+&ptc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pwm_pins>;
+       status = "okay";
+};
+
 &sysgpio {
        i2c0_pins: i2c0-0 {
                i2c-pins {
@@ -214,6 +220,20 @@
                };
        };
 
+       pwm_pins: pwm-0 {
+               pwm-pins {
+                       pinmux = <GPIOMUX(46, GPOUT_SYS_PWM_CHANNEL0,
+                                       GPOEN_SYS_PWM0_CHANNEL0, GPI_NONE)>,
+                                       <GPIOMUX(59, GPOUT_SYS_PWM_CHANNEL1,
+                                       GPOEN_SYS_PWM0_CHANNEL1, GPI_NONE)>;
+                       bias-disable;
+                       drive-strength = <12>;
+                       input-disable;
+                       input-schmitt-disable;
+                       slew-rate = <0>;
+               };
+       };
+
        uart0_pins: uart0-0 {
                tx-pins {
                        pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 5ab1598..5634c77 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -486,6 +486,15 @@
                        status = "disabled";
                };
 
+               ptc: pwm@120d0000 {
+                       compatible = "starfive,jh7110-pwm";
+                       reg = <0x0 0x120d0000 0x0 0x10000>;
+                       clocks = <&syscrg JH7110_SYSCLK_PWM_APB>;
+                       resets = <&syscrg JH7110_SYSRST_PWM_APB>;
+                       #pwm-cells=<3>;
+                       status = "disabled";
+               };
+
                qspi: spi@13010000 {
                        compatible = "starfive,jh7110-qspi", "cdns,qspi-nor";
                        #address-cells = <1>;