constraints.md (Usn, [...]): New constraints.

2014-11-17  Zhenqiang Chen  <zhenqiang.chen@linaro.org>

	* config/aarch64/constraints.md (Usn, aarch64_ccmp_immediate,
	aarch64_ccmp_operand): New constraints.

From-SVN: r217642

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c5da331..6e3045d 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+014-11-17  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
+
+       * config/aarch64/constraints.md (Usn, aarch64_ccmp_immediate,
+       aarch64_ccmp_operand): New constraints.
+
 2014-11-17  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
 
        * Makefile.in: Add ccmp.o.

diff --git a/gcc/config/aarch64/constraints.md b/gcc/config/aarch64/constraints.md
index 807d0b1..a5ce66c 100644 (file)
--- a/gcc/config/aarch64/constraints.md
+++ b/gcc/config/aarch64/constraints.md
@@ -89,6 +89,11 @@
   (and (match_code "const_int")
        (match_test "(unsigned HOST_WIDE_INT) ival < 32")))
 
+(define_constraint "Usn"
+ "A constant that can be used with a CCMN operation (once negated)."
+ (and (match_code "const_int")
+      (match_test "IN_RANGE (ival, -31, 0)")))
+
 (define_constraint "Usd"
   "@internal
   A constraint that matches an immediate shift constant in DImode."

diff --git a/gcc/config/aarch64/predicates.md b/gcc/config/aarch64/predicates.md
index d5b0b2a..aa8f6f6 100644 (file)
--- a/gcc/config/aarch64/predicates.md
+++ b/gcc/config/aarch64/predicates.md
@@ -30,6 +30,14 @@
   (ior (match_code "symbol_ref")
        (match_operand 0 "register_operand")))
 
+(define_predicate "aarch64_ccmp_immediate"
+  (and (match_code "const_int")
+       (match_test "IN_RANGE (INTVAL (op), -31, 31)")))
+
+(define_predicate "aarch64_ccmp_operand"
+  (ior (match_operand 0 "register_operand")
+       (match_operand 0 "aarch64_ccmp_immediate")))
+
 (define_predicate "aarch64_simd_register"
   (and (match_code "reg")
        (ior (match_test "REGNO_REG_CLASS (REGNO (op)) == FP_LO_REGS")