{
struct radeon_winsys *ws = &cs->ws->base;
- const enum radeon_bo_domain domain = radv_amdgpu_cs_domain(ws);
+ /* Avoid memcpy from VRAM when a secondary cmdbuf can't always rely on IB2. */
+ const bool can_always_use_ib2 = cs->ws->info.gfx_level >= GFX8 && cs->hw_ip == AMD_IP_GFX;
+ const bool avoid_vram = cs->is_secondary && !can_always_use_ib2;
+ const enum radeon_bo_domain domain = avoid_vram ? RADEON_DOMAIN_GTT : radv_amdgpu_cs_domain(ws);
+ const enum radeon_bo_flag gtt_wc_flag = avoid_vram ? 0 : RADEON_FLAG_GTT_WC;
const enum radeon_bo_flag flags = RADEON_FLAG_CPU_ACCESS | RADEON_FLAG_NO_INTERPROCESS_SHARING |
- RADEON_FLAG_READ_ONLY | RADEON_FLAG_GTT_WC;
+ RADEON_FLAG_READ_ONLY | gtt_wc_flag;
return ws->buffer_create(ws, ib_size, cs->ws->info.ib_alignment, domain, flags,
RADV_BO_PRIORITY_CS, 0, &cs->ib_buffer);