mtd: rawnand: Use the NAND framework user_conf object for ECC flags

Instead of storing the ECC flags in chip->ecc.options, use
nanddev->ecc.user_conf.flags.

There is currently only one to save: NAND_ECC_MAXIMIZE.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-21-miquel.raynal@bootlin.com

diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c
index 7fcc5e6..c3902e0 100644 (file)
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -1046,6 +1046,7 @@ static int atmel_nand_pmecc_init(struct nand_chip *chip)
        const struct nand_ecc_props *requirements =
                nanddev_get_ecc_requirements(&chip->base);
        struct mtd_info *mtd = nand_to_mtd(chip);
+       struct nand_device *nanddev = mtd_to_nanddev(mtd);
        struct atmel_nand *nand = to_atmel_nand(chip);
        struct atmel_nand_controller *nc;
        struct atmel_pmecc_user_req req;
@@ -1070,7 +1071,7 @@ static int atmel_nand_pmecc_init(struct nand_chip *chip)
                        chip->ecc.size = val;
        }
 
-       if (chip->ecc.options & NAND_ECC_MAXIMIZE)
+       if (nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE_STRENGTH)
                req.ecc.strength = ATMEL_PMECC_MAXIMIZE_ECC_STRENGTH;
        else if (chip->ecc.strength)
                req.ecc.strength = chip->ecc.strength;

diff --git a/drivers/mtd/nand/raw/denali_pci.c b/drivers/mtd/nand/raw/denali_pci.c
index 2f77ee5..20c085a 100644 (file)
--- a/drivers/mtd/nand/raw/denali_pci.c
+++ b/drivers/mtd/nand/raw/denali_pci.c
@@ -100,7 +100,7 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
                goto out_remove_denali;
        }
 
-       dchip->chip.ecc.options |= NAND_ECC_MAXIMIZE;
+       dchip->chip.base.ecc.user_conf.flags |= NAND_ECC_MAXIMIZE_STRENGTH;
 
        dchip->nsels = nsels;
 

diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 8bb3e4e..3af9223 100644 (file)
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -5012,9 +5012,6 @@ static int rawnand_dt_init(struct nand_chip *chip)
        if (of_get_nand_on_flash_bbt(dn))
                chip->bbt_options |= NAND_BBT_USE_FLASH;
 
-       if (of_property_read_bool(dn, "nand-ecc-maximize"))
-               chip->ecc.options |= NAND_ECC_MAXIMIZE;
-
        of_get_nand_ecc_user_config(nand);
        of_get_nand_ecc_legacy_user_config(chip);
 
@@ -5145,6 +5142,7 @@ static void nand_scan_ident_cleanup(struct nand_chip *chip)
 static int nand_set_ecc_soft_ops(struct nand_chip *chip)
 {
        struct mtd_info *mtd = nand_to_mtd(chip);
+       struct nand_device *nanddev = mtd_to_nanddev(mtd);
        struct nand_ecc_ctrl *ecc = &chip->ecc;
 
        if (WARN_ON(ecc->engine_type != NAND_ECC_ENGINE_TYPE_SOFT))
@@ -5220,7 +5218,7 @@ static int nand_set_ecc_soft_ops(struct nand_chip *chip)
                 * used.
                 */
                if (mtd->ooblayout == nand_get_large_page_ooblayout() &&
-                   ecc->options & NAND_ECC_MAXIMIZE) {
+                   nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE_STRENGTH) {
                        int steps, bytes;
 
                        /* Always prefer 1k blocks over 512bytes ones */
@@ -5460,11 +5458,12 @@ nand_maximize_ecc(struct nand_chip *chip,
  * @caps: ECC engine caps info structure
  * @oobavail: OOB size that the ECC engine can use
  *
- * Choose the ECC configuration according to following logic
+ * Choose the ECC configuration according to following logic.
  *
  * 1. If both ECC step size and ECC strength are already set (usually by DT)
  *    then check if it is supported by this controller.
- * 2. If NAND_ECC_MAXIMIZE is set, then select maximum ECC strength.
+ * 2. If the user provided the nand-ecc-maximize property, then select maximum
+ *    ECC strength.
  * 3. Otherwise, try to match the ECC step size and ECC strength closest
  *    to the chip's requirement. If available OOB size can't fit the chip
  *    requirement then fallback to the maximum ECC step size and ECC strength.
@@ -5475,6 +5474,7 @@ int nand_ecc_choose_conf(struct nand_chip *chip,
                         const struct nand_ecc_caps *caps, int oobavail)
 {
        struct mtd_info *mtd = nand_to_mtd(chip);
+       struct nand_device *nanddev = mtd_to_nanddev(mtd);
 
        if (WARN_ON(oobavail < 0 || oobavail > mtd->oobsize))
                return -EINVAL;
@@ -5482,7 +5482,7 @@ int nand_ecc_choose_conf(struct nand_chip *chip,
        if (chip->ecc.size && chip->ecc.strength)
                return nand_check_ecc_caps(chip, caps, oobavail);
 
-       if (chip->ecc.options & NAND_ECC_MAXIMIZE)
+       if (nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE_STRENGTH)
                return nand_maximize_ecc(chip, caps, oobavail);
 
        if (!nand_match_ecc_req(chip, caps, oobavail))

diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
index b7b764e..2a7ca30 100644 (file)
--- a/drivers/mtd/nand/raw/sunxi_nand.c
+++ b/drivers/mtd/nand/raw/sunxi_nand.c
@@ -1609,12 +1609,13 @@ static int sunxi_nand_hw_ecc_ctrl_init(struct nand_chip *nand,
        static const u8 strengths[] = { 16, 24, 28, 32, 40, 48, 56, 60, 64 };
        struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller);
        struct mtd_info *mtd = nand_to_mtd(nand);
+       struct nand_device *nanddev = mtd_to_nanddev(mtd);
        struct sunxi_nand_hw_ecc *data;
        int nsectors;
        int ret;
        int i;
 
-       if (ecc->options & NAND_ECC_MAXIMIZE) {
+       if (nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE_STRENGTH) {
                int bytes;
 
                ecc->size = 1024;

diff --git a/drivers/mtd/nand/raw/tegra_nand.c b/drivers/mtd/nand/raw/tegra_nand.c
index 100c18e..fbf6772 100644 (file)
--- a/drivers/mtd/nand/raw/tegra_nand.c
+++ b/drivers/mtd/nand/raw/tegra_nand.c
@@ -840,9 +840,10 @@ static int tegra_nand_get_strength(struct nand_chip *chip, const int *strength,
                                   int strength_len, int bits_per_step,
                                   int oobsize)
 {
+       struct nand_device *base = mtd_to_nanddev(nand_to_mtd(chip));
        const struct nand_ecc_props *requirements =
-               nanddev_get_ecc_requirements(&chip->base);
-       bool maximize = chip->ecc.options & NAND_ECC_MAXIMIZE;
+               nanddev_get_ecc_requirements(base);
+       bool maximize = base->ecc.user_conf.flags & NAND_ECC_MAXIMIZE_STRENGTH;
        int i;
 
        /*

diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 671e609..aac0794 100644 (file)
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -98,7 +98,6 @@ struct nand_chip;
  * pages and you want to rely on the default implementation.
  */
 #define NAND_ECC_GENERIC_ERASED_CHECK  BIT(0)
-#define NAND_ECC_MAXIMIZE              BIT(1)
 
 /*
  * Option constants for bizarre disfunctionality and real