; CHECK: t4
; CHECK: vmrs APSR_nzcv, fpscr
; CHECK: if.then
-; CHECK-NOT movs
+; CHECK-NOT: movs
%0 = load double* %q, align 4
%cmp = fcmp olt double %0, 1.000000e+01
%incdec.ptr1 = getelementptr inbounds i32* %p, i32 1
entry:
tail call void @llvm.memset.p0i8.i64(i8* %x, i8 77, i64 16, i32 4, i1 false)
ret void
-; CHECK define void @MemSetTest
+; CHECK: define void @MemSetTest
; CHECK: call i8* @memset
; CHECK: ret void
}
; CHECK: @fsub_x_0
define float @fsub_x_0(float %a) {
%ret = fsub float %a, 0.0
-; CHECK ret float %a
+; CHECK: ret float %a
ret float %ret
}
; CHECK: @fadd_x_n0
define float @fadd_x_n0(float %a) {
%ret = fadd float %a, -0.0
-; CHECK ret float %a
+; CHECK: ret float %a
ret float %ret
}