def mno_avx512dq : Flag<["-"], "mno-avx512dq">, Group<m_x86_Features_Group>;
def mno_avx512bw : Flag<["-"], "mno-avx512bw">, Group<m_x86_Features_Group>;
def mno_avx512vl : Flag<["-"], "mno-avx512vl">, Group<m_x86_Features_Group>;
+def mno_avx512vbmi : Flag<["-"], "mno-avx512vbmi">, Group<m_x86_Features_Group>;
+def mno_avx512ifma : Flag<["-"], "mno-avx512ifma">, Group<m_x86_Features_Group>;
def mno_pclmul : Flag<["-"], "mno-pclmul">, Group<m_x86_Features_Group>;
def mno_lzcnt : Flag<["-"], "mno-lzcnt">, Group<m_x86_Features_Group>;
def mno_rdrnd : Flag<["-"], "mno-rdrnd">, Group<m_x86_Features_Group>;
def mavx512dq : Flag<["-"], "mavx512dq">, Group<m_x86_Features_Group>;
def mavx512bw : Flag<["-"], "mavx512bw">, Group<m_x86_Features_Group>;
def mavx512vl : Flag<["-"], "mavx512vl">, Group<m_x86_Features_Group>;
+def mavx512vbmi : Flag<["-"], "mavx512vbmi">, Group<m_x86_Features_Group>;
+def mavx512ifma : Flag<["-"], "mavx512ifma">, Group<m_x86_Features_Group>;
def mpclmul : Flag<["-"], "mpclmul">, Group<m_x86_Features_Group>;
def mlzcnt : Flag<["-"], "mlzcnt">, Group<m_x86_Features_Group>;
def mrdrnd : Flag<["-"], "mrdrnd">, Group<m_x86_Features_Group>;
case AVX512F:
Features["avx512f"] = Features["avx512cd"] = Features["avx512er"] =
Features["avx512pf"] = Features["avx512dq"] = Features["avx512bw"] =
- Features["avx512vl"] = false;
+ Features["avx512vl"] = Features["avx512vbmi"] =
+ Features["avx512ifma"] = false;
}
}
setSSELevel(Features, AVX2, Enabled);
} else if (Name == "avx512f") {
setSSELevel(Features, AVX512F, Enabled);
- } else if (Name == "avx512cd" || Name == "avx512er" || Name == "avx512pf"
- || Name == "avx512dq" || Name == "avx512bw" || Name == "avx512vl") {
+ } else if (Name == "avx512cd" || Name == "avx512er" || Name == "avx512pf" ||
+ Name == "avx512dq" || Name == "avx512bw" || Name == "avx512vl" ||
+ Name == "avx512vbmi" || Name == "avx512ifma") {
if (Enabled)
setSSELevel(Features, AVX512F, Enabled);
} else if (Name == "fma") {
Builder.defineMacro("__AVX512BW__");
if (HasAVX512VL)
Builder.defineMacro("__AVX512VL__");
+ if (HasAVX512VBMI)
+ Builder.defineMacro("__AVX512VBMI__");
+ if (HasAVX512IFMA)
+ Builder.defineMacro("__AVX512IFMA__");
if (HasSHA)
Builder.defineMacro("__SHA__");
// CHECK: qq{{.*}} #5
// CHECK: #0 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2"
// CHECK: #1 = {{.*}}"target-cpu"="ivybridge" "target-features"="+aes,+avx,+cx16,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+xsave,+xsaveopt"
-// CHECK: #2 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,-aes,-avx,-avx2,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512pf,-avx512vl,-f16c,-fma,-fma4,-pclmul,-sha,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-xop,-xsave,-xsaveopt"
+// CHECK: #2 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,-aes,-avx,-avx2,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512ifma,-avx512pf,-avx512vbmi,-avx512vl,-f16c,-fma,-fma4,-pclmul,-sha,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-xop,-xsave,-xsaveopt"
// CHECK: #3 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3"
// CHECK: #4 = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+cx16,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+xsave,+xsaveopt,-aes"
// CHECK: #5 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+sse,+sse2,-3dnow,-3dnowa,-mmx"
// CHECK_CNL_M32: #define __AVX512CD__ 1
// CHECK_CNL_M32: #define __AVX512DQ__ 1
// CHECK_CNL_M32: #define __AVX512F__ 1
+// CHECK_CNL_M32: #define __AVX512IFMA__ 1
+// CHECK_CNL_M32: #define __AVX512VBMI__ 1
// CHECK_CNL_M32: #define __AVX512VL__ 1
// CHECK_CNL_M32: #define __AVX__ 1
// CHECK_CNL_M32: #define __BMI2__ 1
// CHECK_CNL_M64: #define __AVX512CD__ 1
// CHECK_CNL_M64: #define __AVX512DQ__ 1
// CHECK_CNL_M64: #define __AVX512F__ 1
+// CHECK_CNL_M64: #define __AVX512IFMA__ 1
+// CHECK_CNL_M64: #define __AVX512VBMI__ 1
// CHECK_CNL_M64: #define __AVX512VL__ 1
// CHECK_CNL_M64: #define __AVX__ 1
// CHECK_CNL_M64: #define __BMI2__ 1
// AVX512F2: #define __SSE__ 1
// AVX512F2: #define __SSSE3__ 1
+// RUN: %clang -target i386-unknown-unknown -march=atom -mavx512ifma -x c -E -dM -o - %s | FileCheck --check-prefix=AVX512IFMA %s
+
+// AVX512IFMA: #define __AVX2__ 1
+// AVX512IFMA: #define __AVX512F__ 1
+// AVX512IFMA: #define __AVX512IFMA__ 1
+// AVX512IFMA: #define __AVX__ 1
+// AVX512IFMA: #define __SSE2_MATH__ 1
+// AVX512IFMA: #define __SSE2__ 1
+// AVX512IFMA: #define __SSE3__ 1
+// AVX512IFMA: #define __SSE4_1__ 1
+// AVX512IFMA: #define __SSE4_2__ 1
+// AVX512IFMA: #define __SSE_MATH__ 1
+// AVX512IFMA: #define __SSE__ 1
+// AVX512IFMA: #define __SSSE3__ 1
+
+// RUN: %clang -target i386-unknown-unknown -march=atom -mavx512vbmi -x c -E -dM -o - %s | FileCheck --check-prefix=AVX512VBMI %s
+
+// AVX512VBMI: #define __AVX2__ 1
+// AVX512VBMI: #define __AVX512F__ 1
+// AVX512VBMI: #define __AVX512VBMI__ 1
+// AVX512VBMI: #define __AVX__ 1
+// AVX512VBMI: #define __SSE2_MATH__ 1
+// AVX512VBMI: #define __SSE2__ 1
+// AVX512VBMI: #define __SSE3__ 1
+// AVX512VBMI: #define __SSE4_1__ 1
+// AVX512VBMI: #define __SSE4_2__ 1
+// AVX512VBMI: #define __SSE_MATH__ 1
+// AVX512VBMI: #define __SSE__ 1
+// AVX512VBMI: #define __SSSE3__ 1
+
// RUN: %clang -target i386-unknown-unknown -march=atom -msse4.2 -x c -E -dM -o - %s | FileCheck --check-prefix=SSE42POPCNT %s
// SSE42POPCNT: #define __POPCNT__ 1