// dcbt ra, rb, th [server]
// dcbt th, ra, rb [embedded]
// where th can be omitted when it is 0. dcbtst is the same.
- if (MI->getOpcode() == PPC::DCBT || MI->getOpcode() == PPC::DCBTST) {
+ // On AIX, only emit the extended mnemonics for dcbt and dcbtst if
+ // the "modern assembler" is available.
+ if ((MI->getOpcode() == PPC::DCBT || MI->getOpcode() == PPC::DCBTST) &&
+ (!TT.isOSAIX() || STI.getFeatureBits()[PPC::FeatureModernAIXAs])) {
unsigned char TH = MI->getOperand(0).getImm();
O << "\tdcbt";
if (MI->getOpcode() == PPC::DCBTST)
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: lwz 3, L..C0(2) # @vpa
; CHECK-AIX-NEXT: lwz 3, 0(3)
-; CHECK-AIX-NEXT: dcbtstt 0, 3
+; CHECK-AIX-NEXT: dcbtst 0, 3, 16
; CHECK-AIX-NEXT: blr
;
; CHECK-AIX64-LABEL: test_dcbtstt:
; CHECK-AIX64: # %bb.0: # %entry
; CHECK-AIX64-NEXT: ld 3, L..C0(2) # @vpa
; CHECK-AIX64-NEXT: ld 3, 0(3)
-; CHECK-AIX64-NEXT: dcbtstt 0, 3
+; CHECK-AIX64-NEXT: dcbtst 0, 3, 16
; CHECK-AIX64-NEXT: blr
entry:
%0 = load i8*, i8** @vpa, align 8
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: lwz 3, L..C0(2) # @vpa
; CHECK-AIX-NEXT: lwz 3, 0(3)
-; CHECK-AIX-NEXT: dcbtt 0, 3
+; CHECK-AIX-NEXT: dcbt 0, 3, 16
; CHECK-AIX-NEXT: blr
;
; CHECK-AIX64-LABEL: test_dcbtt:
; CHECK-AIX64: # %bb.0: # %entry
; CHECK-AIX64-NEXT: ld 3, L..C0(2) # @vpa
; CHECK-AIX64-NEXT: ld 3, 0(3)
-; CHECK-AIX64-NEXT: dcbtt 0, 3
+; CHECK-AIX64-NEXT: dcbt 0, 3, 16
; CHECK-AIX64-NEXT: blr
entry:
%0 = load i8*, i8** @vpa, align 8