Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform changes from Olof Johansson:
 "This branch contains mostly additions and changes to platform
  enablement and SoC-level drivers.  Since there's sometimes a
  dependency on device-tree changes, there's also a fair amount of
  those in this branch.

  Pieces worth mentioning are:

   - Mbus driver for Marvell platforms, allowing kernel configuration
     and resource allocation of on-chip peripherals.
   - Enablement of the mbus infrastructure from Marvell PCI-e drivers.
   - Preparation of MSI support for Marvell platforms.
   - Addition of new PCI-e host controller driver for Tegra platforms
   - Some churn caused by sharing of macro names between i.MX 6Q and 6DL
     platforms in the device tree sources and header files.
   - Various suspend/PM updates for Tegra, including LP1 support.
   - Versatile Express support for MCPM, part of big little support.
   - Allwinner platform support for A20 and A31 SoCs (dual and quad
     Cortex-A7)
   - OMAP2+ support for DRA7, a new Cortex-A15-based SoC.

  The code that touches other architectures are patches moving MSI
  arch-specific functions over to weak symbols and removal of
  ARCH_SUPPORTS_MSI, acked by PCI maintainers"

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (266 commits)
  tegra-cpuidle: provide stub when !CONFIG_CPU_IDLE
  PCI: tegra: replace devm_request_and_ioremap by devm_ioremap_resource
  ARM: tegra: Drop ARCH_SUPPORTS_MSI and sort list
  ARM: dts: vf610-twr: enable i2c0 device
  ARM: dts: i.MX51: Add one more I2C2 pinmux entry
  ARM: dts: i.MX51: Move pins configuration under "iomuxc" label
  ARM: dtsi: imx6qdl-sabresd: Add USB OTG vbus pin to pinctrl_hog
  ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator
  ARM: dts: imx27-phytec-phycore-som: Enable AUDMUX
  ARM: dts: i.MX27: Disable AUDMUX in the template
  ARM: dts: wandboard: Add support for SDIO bcm4329
  ARM: i.MX5 clocks: Remove optional clock setup (CKIH1) from i.MX51 template
  ARM: dts: imx53-qsb: Make USBH1 functional
  ARM i.MX6Q: dts: Enable I2C1 with EEPROM and PMIC on Phytec phyFLEX-i.MX6 Ouad module
  ARM i.MX6Q: dts: Enable SPI NOR flash on Phytec phyFLEX-i.MX6 Ouad module
  ARM: dts: imx6qdl-sabresd: Add touchscreen support
  ARM: imx: add ocram clock for imx53
  ARM: dts: imx: ocram size is different between imx6q and imx6dl
  ARM: dts: imx27-phytec-phycore-som: Fix regulator settings
  ARM: dts: i.MX27: Remove clock name from CPU node
  ...

diff --cc MAINTAINERS
Simple merge

diff --cc arch/arm/Kconfig
Simple merge

diff --cc arch/arm/boot/dts/Makefile
Simple merge

diff --cc arch/arm/configs/omap2plus_defconfig
Simple merge

diff --cc arch/arm/kernel/bios32.c
Simple merge

diff --cc arch/arm/mach-davinci/board-da850-evm.c
Simple merge

diff --cc arch/arm/mach-davinci/board-dm355-leopard.c
Simple merge

diff --cc arch/arm/mach-davinci/board-dm644x-evm.c
Simple merge

diff --cc arch/arm/mach-davinci/board-dm646x-evm.c
Simple merge

diff --cc arch/arm/mach-davinci/board-neuros-osd2.c
Simple merge

diff --cc arch/arm/mach-dove/common.c
Simple merge

diff --cc arch/arm/mach-imx/Kconfig
Simple merge

diff --cc arch/arm/mach-imx/mach-imx6q.c
Simple merge

diff --cc arch/arm/mach-kirkwood/common.c
Simple merge

diff --cc arch/arm/mach-mvebu/platsmp.c
index f9c09b75d4d7fd26dda62686290ba5b6d23b5529,c6b00fce6d8deccdde5473bca3bf670fcf702000..ff69c2df298b6b2ce69f742c7f5b6dbcf179f821
--- 1/arch/arm/mach-mvebu/platsmp.c
--- 2/arch/arm/mach-mvebu/platsmp.c
+++ b/arch/arm/mach-mvebu/platsmp.c
@@@ -29,28 -30,31 +30,31 @@@
  #include "pmsu.h"
  #include "coherency.h"
  
+ #define AXP_BOOTROM_BASE 0xfff00000
+ #define AXP_BOOTROM_SIZE 0x100000
+ 
 +static struct clk *__init get_cpu_clk(int cpu)
 +{
 +      struct clk *cpu_clk;
 +      struct device_node *np = of_get_cpu_node(cpu, NULL);
 +
 +      if (WARN(!np, "missing cpu node\n"))
 +              return NULL;
 +      cpu_clk = of_clk_get(np, 0);
 +      if (WARN_ON(IS_ERR(cpu_clk)))
 +              return NULL;
 +      return cpu_clk;
 +}
 +
  void __init set_secondary_cpus_clock(void)
  {
 -      int thiscpu;
 +      int thiscpu, cpu;
        unsigned long rate;
 -      struct clk *cpu_clk = NULL;
 -      struct device_node *np = NULL;
 +      struct clk *cpu_clk;
  
        thiscpu = smp_processor_id();
 -      for_each_node_by_type(np, "cpu") {
 -              int err;
 -              int cpu;
 -
 -              err = of_property_read_u32(np, "reg", &cpu);
 -              if (WARN_ON(err))
 -                      return;
 -
 -              if (cpu == thiscpu) {
 -                      cpu_clk = of_clk_get(np, 0);
 -                      break;
 -              }
 -      }
 -      if (WARN_ON(IS_ERR(cpu_clk)))
 +      cpu_clk = get_cpu_clk(thiscpu);
 +      if (!cpu_clk)
                return;
        clk_prepare_enable(cpu_clk);
        rate = clk_get_rate(cpu_clk);

diff --cc arch/arm/mach-omap2/Kconfig
Simple merge

diff --cc arch/arm/mach-omap2/timer.c
Simple merge

diff --cc arch/arm/mach-shmobile/Kconfig
Simple merge

diff --cc arch/arm/mach-tegra/Kconfig
index 59925cc896fb324e0340b0a836a65b8383e011d8,fdfff97db82419a731a5f9592f1481e624c24fd7..67a76f2dfb9f62b99351e0e7ecb4d8c877b08d4b
--- 1/arch/arm/mach-tegra/Kconfig
--- 2/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@@ -6,9 -7,10 +7,10 @@@ config ARCH_TEGR
        select CLKSRC_MMIO
        select CLKSRC_OF
        select COMMON_CLK
+       select CPU_V7
        select GENERIC_CLOCKEVENTS
        select HAVE_ARM_SCU if SMP
 -      select HAVE_ARM_TWD if LOCAL_TIMERS
 +      select HAVE_ARM_TWD if SMP
        select HAVE_CLK
        select HAVE_SMP
        select MIGHT_HAVE_CACHE_L2X0

diff --cc arch/arm/mach-tegra/tegra.c
index fc97cfd52769f687120639481d683f675193478e,fe56fcafdf1504e14cf8dfa7b1e4cca1b2da5cbb..5b8605547a09113a65daaf65b902d9a6098fe522
--- 1/arch/arm/mach-tegra/tegra.c
--- 2/arch/arm/mach-tegra/tegra.c
+++ b/arch/arm/mach-tegra/tegra.c
@@@ -77,31 -112,10 +77,9 @@@ static void __init tegra_dt_init(void
         * devices
         */
  out:
 -      of_platform_populate(NULL, of_default_bus_match_table,
 -                              tegra20_auxdata_lookup, parent);
 +      of_platform_populate(NULL, of_default_bus_match_table, NULL, parent);
  }
  
- static void __init trimslice_init(void)
- {
- #ifdef CONFIG_TEGRA_PCI
-       int ret;
- 
-       ret = tegra_pcie_init(true, true);
-       if (ret)
-               pr_err("tegra_pci_init() failed: %d\n", ret);
- #endif
- }
- 
- static void __init harmony_init(void)
- {
- #ifdef CONFIG_TEGRA_PCI
-       int ret;
- 
-       ret = harmony_pcie_init();
-       if (ret)
-               pr_err("harmony_pcie_init() failed: %d\n", ret);
- #endif
- }
- 
  static void __init paz00_init(void)
  {
        if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))

diff --cc arch/arm/mach-ux500/cpu-db8500.c
Simple merge

diff --cc arch/arm/mach-vexpress/Kconfig
Simple merge

diff --cc arch/ia64/Kconfig
Simple merge

diff --cc arch/mips/Kconfig
Simple merge

diff --cc arch/powerpc/Kconfig
Simple merge

diff --cc arch/s390/Kconfig
Simple merge

diff --cc arch/s390/include/asm/pci.h
Simple merge

diff --cc arch/tile/Kconfig
Simple merge

diff --cc arch/x86/Kconfig
Simple merge

diff --cc drivers/pci/host/Kconfig
Simple merge

diff --cc drivers/pci/host/Makefile
index ab79ccb5bbff623da1ed2191e8c0b3c22a3f0536,a733fb0f7856e47f9a1bcbcc1a571b7ffc075e94..c9a997b2690dc9532e7654ae804c0697652679ae
--- 1/drivers/pci/host/Makefile
--- 2/drivers/pci/host/Makefile
+++ b/drivers/pci/host/Makefile
@@@ -1,3 -1,3 +1,4 @@@
 -obj-$(CONFIG_PCI_MVEBU) += pci-mvebu.o
  obj-$(CONFIG_PCIE_DW) += pcie-designware.o
 +obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o
 +obj-$(CONFIG_PCI_MVEBU) += pci-mvebu.o
+ obj-$(CONFIG_PCI_TEGRA) += pci-tegra.o

diff --cc drivers/pci/host/pci-mvebu.c
index ce1543a584a30c1eca9391adad1dcf3e21e7a87b,847c10971182f855f785641b46059bf35cd56303..729d5a101d621ece6d36b425ad213a48a57a859f
--- 1/drivers/pci/host/pci-mvebu.c
--- 2/drivers/pci/host/pci-mvebu.c
+++ b/drivers/pci/host/pci-mvebu.c
@@@ -725,11 -728,55 +728,55 @@@ mvebu_pcie_map_registers(struct platfor
  
        ret = of_address_to_resource(np, 0, &regs);
        if (ret)
 -              return NULL;
 +              return ERR_PTR(ret);
  
 -      return devm_request_and_ioremap(&pdev->dev, &regs);
 +      return devm_ioremap_resource(&pdev->dev, &regs);
  }
  
+ #define DT_FLAGS_TO_TYPE(flags)       (((flags) >> 24) & 0x03)
+ #define    DT_TYPE_IO                 0x1
+ #define    DT_TYPE_MEM32              0x2
+ #define DT_CPUADDR_TO_TARGET(cpuaddr) (((cpuaddr) >> 56) & 0xFF)
+ #define DT_CPUADDR_TO_ATTR(cpuaddr)   (((cpuaddr) >> 48) & 0xFF)
+ 
+ static int mvebu_get_tgt_attr(struct device_node *np, int devfn,
+                             unsigned long type, int *tgt, int *attr)
+ {
+       const int na = 3, ns = 2;
+       const __be32 *range;
+       int rlen, nranges, rangesz, pna, i;
+ 
+       range = of_get_property(np, "ranges", &rlen);
+       if (!range)
+               return -EINVAL;
+ 
+       pna = of_n_addr_cells(np);
+       rangesz = pna + na + ns;
+       nranges = rlen / sizeof(__be32) / rangesz;
+ 
+       for (i = 0; i < nranges; i++) {
+               u32 flags = of_read_number(range, 1);
+               u32 slot = of_read_number(range, 2);
+               u64 cpuaddr = of_read_number(range + na, pna);
+               unsigned long rtype;
+ 
+               if (DT_FLAGS_TO_TYPE(flags) == DT_TYPE_IO)
+                       rtype = IORESOURCE_IO;
+               else if (DT_FLAGS_TO_TYPE(flags) == DT_TYPE_MEM32)
+                       rtype = IORESOURCE_MEM;
+ 
+               if (slot == PCI_SLOT(devfn) && type == rtype) {
+                       *tgt = DT_CPUADDR_TO_TARGET(cpuaddr);
+                       *attr = DT_CPUADDR_TO_ATTR(cpuaddr);
+                       return 0;
+               }
+ 
+               range += rangesz;
+       }
+ 
+       return -ENOENT;
+ }
+ 
  static int __init mvebu_pcie_probe(struct platform_device *pdev)
  {
        struct mvebu_pcie *pcie;
@@@ -816,11 -857,26 +857,27 @@@
                if (port->devfn < 0)
                        continue;
  
+               ret = mvebu_get_tgt_attr(np, port->devfn, IORESOURCE_MEM,
+                                        &port->mem_target, &port->mem_attr);
+               if (ret < 0) {
+                       dev_err(&pdev->dev, "PCIe%d.%d: cannot get tgt/attr for mem window\n",
+                               port->port, port->lane);
+                       continue;
+               }
+ 
+               ret = mvebu_get_tgt_attr(np, port->devfn, IORESOURCE_IO,
+                                        &port->io_target, &port->io_attr);
+               if (ret < 0) {
+                       dev_err(&pdev->dev, "PCIe%d.%d: cannot get tgt/attr for io window\n",
+                               port->port, port->lane);
+                       continue;
+               }
+ 
                port->base = mvebu_pcie_map_registers(pdev, child, port);
 -              if (!port->base) {
 +              if (IS_ERR(port->base)) {
                        dev_err(&pdev->dev, "PCIe%d.%d: cannot map registers\n",
                                port->port, port->lane);
 +                      port->base = NULL;
                        continue;
                }
  

diff --cc drivers/pci/probe.c
Simple merge

diff --cc include/linux/pci.h
Simple merge