Remove harcoded XHCI lists and detect mode, speed based on DT.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Serial-changes: 2
- Remove also XHCI macros from hardware.h
- Remove additional new line in zcu106
#define ARASAN_NAND_BASEADDR 0xFF100000
-#define ZYNQMP_USB0_XHCI_BASEADDR 0xFE200000
-#define ZYNQMP_USB1_XHCI_BASEADDR 0xFE300000
-
#define ZYNQMP_TCM_BASE_ADDR 0xFFE00000
#define ZYNQMP_TCM_SIZE 0x40000
puts("Board: Xilinx ZynqMP\n");
return 0;
}
-
-#ifdef CONFIG_USB_DWC3
-static struct dwc3_device dwc3_device_data0 = {
- .maximum_speed = USB_SPEED_HIGH,
- .base = ZYNQMP_USB0_XHCI_BASEADDR,
- .dr_mode = USB_DR_MODE_PERIPHERAL,
- .index = 0,
-};
-
-static struct dwc3_device dwc3_device_data1 = {
- .maximum_speed = USB_SPEED_HIGH,
- .base = ZYNQMP_USB1_XHCI_BASEADDR,
- .dr_mode = USB_DR_MODE_PERIPHERAL,
- .index = 1,
-};
-
-int usb_gadget_handle_interrupts(int index)
-{
- dwc3_uboot_handle_interrupt(index);
- return 0;
-}
-
-int board_usb_init(int index, enum usb_init_type init)
-{
- debug("%s: index %x\n", __func__, index);
-
-#if defined(CONFIG_USB_GADGET_DOWNLOAD)
- g_dnl_set_serialnumber(CONFIG_SYS_CONFIG_NAME);
-#endif
-
- switch (index) {
- case 0:
- return dwc3_uboot_init(&dwc3_device_data0);
- case 1:
- return dwc3_uboot_init(&dwc3_device_data1);
- };
-
- return -1;
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
- dwc3_uboot_exit(index);
- return 0;
-}
-#endif
CONFIG_USB_XHCI_ZYNQMP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_XHCI_ZYNQMP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_XHCI_ZYNQMP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_XHCI_ZYNQMP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_XHCI_ZYNQMP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_XHCI_ZYNQMP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_XHCI_ZYNQMP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_XHCI_ZYNQMP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_XHCI_ZYNQMP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_XHCI_ZYNQMP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_XHCI_ZYNQMP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_STORAGE=y
#define CONFIG_ZYNQ_SDHCI0
#define CONFIG_ZYNQ_SDHCI1
-#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
#include <configs/xilinx_zynqmp.h>
#ifndef __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H
#define __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H
-#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB1_XHCI_BASEADDR}
-
#include <configs/xilinx_zynqmp.h>
#endif /* __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H */
#define CONFIG_ZYNQ_SDHCI1
-#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
- ZYNQMP_USB1_XHCI_BASEADDR}
-
#include <configs/xilinx_zynqmp.h>
#endif /* __CONFIG_ZYNQMP_ZC1751_XM017_DC3_H */
{0, {{I2C_MUX_PCA9548, 0x75, 7} } }, \
}
-#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
- ZYNQMP_USB1_XHCI_BASEADDR}
-
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_PCA953X
-#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
-
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_ZYNQ_EEPROM_BUS 5
#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54
#define CONFIG_PCA953X
-#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
-
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#include <configs/xilinx_zynqmp.h>
#define CONFIG_PCA953X
-#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
-
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_ZYNQ_EEPROM_BUS 5
#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54
#define CONFIG_PCA953X
-#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
-
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_ZYNQ_EEPROM_BUS 5
#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54