drm/aspeed: Fix vga_pw sysfs output
authorJoel Stanley <joel@jms.id.au>
Wed, 17 Nov 2021 01:01:45 +0000 (09:01 +0800)
committerMaxime Ripard <maxime@cerno.tech>
Fri, 19 Nov 2021 11:00:14 +0000 (12:00 +0100)
Before the drm driver had support for this file there was a driver that
exposed the contents of the vga password register to userspace. It would
present the entire register instead of interpreting it.

The drm implementation chose to mask of the lower bit, without explaining
why. This breaks the existing userspace, which is looking for 0xa8 in
the lower byte.

Change our implementation to expose the entire register.

Fixes: 696029eb36c0 ("drm/aspeed: Add sysfs for output settings")
Reported-by: Oskar Senft <osk@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Jeremy Kerr <jk@codeconstruct.com.au>
Tested-by: Oskar Senft <osk@google.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20211117010145.297253-1-joel@jms.id.au
drivers/gpu/drm/aspeed/aspeed_gfx_drv.c

index b53fee6..65f1728 100644 (file)
@@ -291,7 +291,7 @@ vga_pw_show(struct device *dev, struct device_attribute *attr, char *buf)
        if (rc)
                return rc;
 
-       return sprintf(buf, "%u\n", reg & 1);
+       return sprintf(buf, "%u\n", reg);
 }
 static DEVICE_ATTR_RO(vga_pw);