net: stmmac: enable MTL ECC Error Address Status Over-ride by default
authorVoon Weifeng <weifeng.voon@intel.com>
Wed, 31 Mar 2021 16:18:25 +0000 (00:18 +0800)
committerDavid S. Miller <davem@davemloft.net>
Wed, 31 Mar 2021 22:09:40 +0000 (15:09 -0700)
Turn on the MEEAO field of MTL_ECC_Control_Register by default.

As the MTL ECC Error Address Status Over-ride(MEEAO) is set by default,
the following error address fields will hold the last valid address
where the error is detected.

Signed-off-by: Voon Weifeng <weifeng.voon@intel.com>
Signed-off-by: Tan Tee Min <tee.min.tan@intel.com>
Co-developed-by: Wong Vee Khee <vee.khee.wong@linux.intel.com>
Signed-off-by: Wong Vee Khee <vee.khee.wong@linux.intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/stmicro/stmmac/dwmac5.c
drivers/net/ethernet/stmicro/stmmac/dwmac5.h

index 5b010eb..d8c6ff7 100644 (file)
@@ -192,6 +192,7 @@ int dwmac5_safety_feat_config(void __iomem *ioaddr, unsigned int asp)
 
        /* 1. Enable Safety Features */
        value = readl(ioaddr + MTL_ECC_CONTROL);
+       value |= MEEAO; /* MTL ECC Error Addr Status Override */
        value |= TSOEE; /* TSO ECC */
        value |= MRXPEE; /* MTL RX Parser ECC */
        value |= MESTEE; /* MTL EST ECC */
index ff555d8..6b2fd37 100644 (file)
@@ -98,6 +98,7 @@
 #define ADDR                           GENMASK(15, 0)
 #define MTL_RXP_IACC_DATA              0x00000cb4
 #define MTL_ECC_CONTROL                        0x00000cc0
+#define MEEAO                          BIT(8)
 #define TSOEE                          BIT(4)
 #define MRXPEE                         BIT(3)
 #define MESTEE                         BIT(2)