vpu: add vpu support for axg

PD#142470: add vpu support for axg

Change-Id: I9be3f440ac25f09e393544121aa33446ff76ff58
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>

diff --git a/arch/arm64/boot/dts/amlogic/axg_pxp.dts b/arch/arm64/boot/dts/amlogic/axg_pxp.dts
index 07d58c3..53f298f 100644 (file)
--- a/arch/arm64/boot/dts/amlogic/axg_pxp.dts
+++ b/arch/arm64/boot/dts/amlogic/axg_pxp.dts
@@ -190,6 +190,20 @@
                status = "disable";
        };
 
+       vpu {
+               compatible = "amlogic, vpu";
+               dev_name = "vpu";
+               status = "ok";
+               clocks = <&clkc CLKID_VPU_MUX
+                       &clkc CLKID_VAPB_MUX
+                       &clkc CLKID_VPU_INTR>;
+               clock-names = "vpu_clk",
+                       "vapb_clk",
+                       "vpu_intr";
+               clk_level = <3>;
+               /* 0: 100.0M    1: 166.7M    2: 200.0M    3: 250.0M */
+       };
+
 }; /* end of / */
 
 &spicc_a{

diff --git a/arch/arm64/boot/dts/amlogic/axg_s400.dts b/arch/arm64/boot/dts/amlogic/axg_s400.dts
index fc89d8c..3a7d902 100644 (file)
--- a/arch/arm64/boot/dts/amlogic/axg_s400.dts
+++ b/arch/arm64/boot/dts/amlogic/axg_s400.dts
@@ -373,6 +373,21 @@
                pinctrl-names = "default";
                pinctrl-0 = <&b_uart_pins>;
        };
+
+       vpu {
+               compatible = "amlogic, vpu";
+               dev_name = "vpu";
+               status = "ok";
+               clocks = <&clkc CLKID_VPU_MUX
+                       &clkc CLKID_VAPB_MUX
+                       &clkc CLKID_VPU_INTR>;
+               clock-names = "vpu_clk",
+                       "vapb_clk",
+                       "vpu_intr";
+               clk_level = <3>;
+               /* 0: 100.0M    1: 166.7M    2: 200.0M    3: 250.0M */
+       };
+
        /* Sound iomap */
        aml_snd_iomap {
                compatible = "amlogic, snd_iomap";

diff --git a/drivers/amlogic/media/common/vpu/vpu.c b/drivers/amlogic/media/common/vpu/vpu.c
index 584bf7f..165d3c2 100644 (file)
--- a/drivers/amlogic/media/common/vpu/vpu.c
+++ b/drivers/amlogic/media/common/vpu/vpu.c
@@ -34,7 +34,8 @@
 #include "vpu_module.h"
 
 /* v01: initial version */
-#define VPU_VERION        "v01"
+/* v02: add axg support */
+#define VPU_VERION        "v02"
 
 enum vpu_chip_e vpu_chip_type;
 int vpu_debug_print_flag;
@@ -65,7 +66,7 @@ int vpu_chip_valid_check(void)
 
 static void vpu_chip_detect(void)
 {
-#if 0
+#if 1
        unsigned int cpu_type;
 
        cpu_type = get_cpu_type();
@@ -91,6 +92,11 @@ static void vpu_chip_detect(void)
                vpu_conf.clk_level_dft = CLK_LEVEL_DFT_TXL;
                vpu_conf.clk_level_max = CLK_LEVEL_MAX_TXL;
                break;
+       case MESON_CPU_MAJOR_ID_AXG:
+               vpu_chip_type = VPU_CHIP_AXG;
+               vpu_conf.clk_level_dft = CLK_LEVEL_DFT_AXG;
+               vpu_conf.clk_level_max = CLK_LEVEL_MAX_AXG;
+               break;
        default:
                vpu_chip_type = VPU_CHIP_MAX;
                vpu_conf.clk_level_dft = 0;
@@ -583,12 +589,16 @@ static ssize_t vpu_mem_debug(struct class *class, struct class_attribute *attr,
        _reg2 = HHI_VPU_MEM_PD_REG2;
        switch (buf[0]) {
        case 'r':
-               VPUPR("mem_pd0: 0x%08x\n", vpu_hiu_read(_reg0));
-               VPUPR("mem_pd1: 0x%08x\n", vpu_hiu_read(_reg1));
-               if ((vpu_chip_type == VPU_CHIP_GXL) ||
-                       (vpu_chip_type == VPU_CHIP_GXM) ||
-                       (vpu_chip_type == VPU_CHIP_TXL)) {
-                       VPUPR("mem_pd2: 0x%08x\n", vpu_hiu_read(_reg2));
+               if (vpu_chip_type == VPU_CHIP_AXG) {
+                       VPUPR("mem_pd0: 0x%08x\n", vpu_hiu_read(_reg0));
+               } else {
+                       VPUPR("mem_pd0: 0x%08x\n", vpu_hiu_read(_reg0));
+                       VPUPR("mem_pd1: 0x%08x\n", vpu_hiu_read(_reg1));
+                       if ((vpu_chip_type == VPU_CHIP_GXL) ||
+                               (vpu_chip_type == VPU_CHIP_GXM) ||
+                               (vpu_chip_type == VPU_CHIP_TXL)) {
+                               VPUPR("mem_pd2: 0x%08x\n", vpu_hiu_read(_reg2));
+                       }
                }
                break;
        case 'w':

diff --git a/drivers/amlogic/media/common/vpu/vpu.h b/drivers/amlogic/media/common/vpu/vpu.h
index 6455860..62c16ff 100644 (file)
--- a/drivers/amlogic/media/common/vpu/vpu.h
+++ b/drivers/amlogic/media/common/vpu/vpu.h
@@ -29,6 +29,7 @@ enum vpu_chip_e {
        VPU_CHIP_GXL,
        VPU_CHIP_GXM,
        VPU_CHIP_TXL,
+       VPU_CHIP_AXG,
        VPU_CHIP_MAX,
 };
 

diff --git a/drivers/amlogic/media/common/vpu/vpu_clk.h b/drivers/amlogic/media/common/vpu/vpu_clk.h
index 864b464..e17773c 100644 (file)
--- a/drivers/amlogic/media/common/vpu/vpu_clk.h
+++ b/drivers/amlogic/media/common/vpu/vpu_clk.h
@@ -28,24 +28,28 @@
 
 /* GXBB */
 /* freq max=666M, default=666M */
-#define CLK_LEVEL_DFT_GXBB     3
+#define CLK_LEVEL_DFT_GXBB     7
 #define CLK_LEVEL_MAX_GXBB     8
 /* GXTVBB */
 /* freq max=666M, default=666M */
-#define CLK_LEVEL_DFT_GXTVBB     3
+#define CLK_LEVEL_DFT_GXTVBB     7
 #define CLK_LEVEL_MAX_GXTVBB     8
 /* GXL */
 /* freq max=666M, default=666M */
-#define CLK_LEVEL_DFT_GXL     3
+#define CLK_LEVEL_DFT_GXL     7
 #define CLK_LEVEL_MAX_GXL     8
 /* GXM */
 /* freq max=666M, default=666M */
-#define CLK_LEVEL_DFT_GXM     3
+#define CLK_LEVEL_DFT_GXM     7
 #define CLK_LEVEL_MAX_GXM     8
 /* TXL */
 /* freq max=666M, default=666M */
-#define CLK_LEVEL_DFT_TXL     3
+#define CLK_LEVEL_DFT_TXL     7
 #define CLK_LEVEL_MAX_TXL     8
+/* AXG */
+/* freq max=250M, default=250M */
+#define CLK_LEVEL_DFT_AXG     3
+#define CLK_LEVEL_MAX_AXG     4
 
 /* vpu clk setting */
 enum vpu_mux_e {
@@ -67,7 +71,7 @@ static unsigned int fclk_div_table[] = {
        2, /* invalid */
 };
 
-/* gxbb, gxtvbb, gxl, gxm, txl, fpll=2000M */
+/* gxbb, gxtvbb, gxl, gxm, txl, axg, fpll=2000M */
 static unsigned int vpu_clk_table[10][3] = {
        /* frequency   clk_mux       div */
        {100000000,    FCLK_DIV5,    3}, /* 0 */

diff --git a/drivers/amlogic/media/common/vpu/vpu_ctrl.c b/drivers/amlogic/media/common/vpu/vpu_ctrl.c
index 59a2922..fdbcf63 100644 (file)
--- a/drivers/amlogic/media/common/vpu/vpu_ctrl.c
+++ b/drivers/amlogic/media/common/vpu/vpu_ctrl.c
@@ -48,16 +48,11 @@ static spinlock_t vpu_clk_gate_lock;
  *      switch_vpu_mem_pd_vmod(VPU_VIU_OSD1, VPU_MEM_POWER_DOWN);
  *
  */
-void switch_vpu_mem_pd_vmod(unsigned int vmod, int flag)
+static void switch_vpu_mem_pd_gx(unsigned int vmod, int flag)
 {
        unsigned long flags = 0;
        unsigned int _reg0, _reg1, _reg2;
        unsigned int val;
-       int ret = 0;
-
-       ret = vpu_chip_valid_check();
-       if (ret)
-               return;
 
        spin_lock_irqsave(&vpu_mem_lock, flags);
 
@@ -177,11 +172,61 @@ void switch_vpu_mem_pd_vmod(unsigned int vmod, int flag)
                }
                break;
        default:
-               VPUPR("switch_vpu_mem_pd: unsupport vpu mod\n");
+               VPUPR("switch_vpu_mem_pd: unsupport vpu mod: %d\n", vmod);
+               break;
+       }
+
+       spin_unlock_irqrestore(&vpu_mem_lock, flags);
+}
+
+static void switch_vpu_mem_pd_axg(unsigned int vmod, int flag)
+{
+       unsigned long flags = 0;
+       unsigned int _reg0;
+       unsigned int val;
+
+       spin_lock_irqsave(&vpu_mem_lock, flags);
+
+       val = (flag == VPU_MEM_POWER_ON) ? 0 : 3;
+       _reg0 = HHI_VPU_MEM_PD_REG0;
+
+       switch (vmod) {
+       case VPU_VIU_OSD1:
+               vpu_hiu_setb(_reg0, val, 0, 2);
+               break;
+       case VPU_VIU_OFIFO:
+               vpu_hiu_setb(_reg0, val, 2, 2);
+               break;
+       case VPU_VPU_ARB:
+               vpu_hiu_setb(_reg0, val, 4, 2);
+               break;
+       case VPU_VENCI:
+               vpu_hiu_setb(_reg0, val, 6, 2);
+               break;
+       default:
+               VPUPR("switch_vpu_mem_pd: unsupport vpu mod: %d\n", vmod);
                break;
        }
 
        spin_unlock_irqrestore(&vpu_mem_lock, flags);
+}
+
+void switch_vpu_mem_pd_vmod(unsigned int vmod, int flag)
+{
+       int ret = 0;
+
+       ret = vpu_chip_valid_check();
+       if (ret)
+               return;
+
+       switch (vpu_chip_type) {
+       case VPU_CHIP_AXG:
+               switch_vpu_mem_pd_axg(vmod, flag);
+               break;
+       default:
+               switch_vpu_mem_pd_gx(vmod, flag);
+               break;
+       }
 
        if (vpu_debug_print_flag) {
                VPUPR("switch_vpu_mem_pd: %s %s\n",
@@ -208,15 +253,11 @@ void switch_vpu_mem_pd_vmod(unsigned int vmod, int flag)
  *
  */
 #define VPU_MEM_PD_ERR        0xffff
-int get_vpu_mem_pd_vmod(unsigned int vmod)
+
+static int get_vpu_mem_pd_gx(unsigned int vmod)
 {
        unsigned int _reg0, _reg1, _reg2;
-       unsigned int val;
-       int ret = 0;
-
-       ret = vpu_chip_valid_check();
-       if (ret)
-               return -1;
+       unsigned int val = VPU_MEM_PD_ERR;
 
        _reg0 = HHI_VPU_MEM_PD_REG0;
        _reg1 = HHI_VPU_MEM_PD_REG1;
@@ -339,9 +380,57 @@ int get_vpu_mem_pd_vmod(unsigned int vmod)
                break;
        }
 
-       if (val == 0)
+       return val;
+}
+
+static int get_vpu_mem_pd_axg(unsigned int vmod)
+{
+       unsigned int _reg0;
+       unsigned int val = VPU_MEM_PD_ERR;
+
+       _reg0 = HHI_VPU_MEM_PD_REG0;
+
+       switch (vmod) {
+       case VPU_VIU_OSD1:
+               val = vpu_hiu_getb(_reg0, 0, 2);
+               break;
+       case VPU_VIU_OFIFO:
+               val = vpu_hiu_getb(_reg0, 2, 2);
+               break;
+       case VPU_VPU_ARB:
+               val = vpu_hiu_getb(_reg0, 4, 2);
+               break;
+       case VPU_VENCL:
+               val = vpu_hiu_getb(_reg0, 6, 2);
+               break;
+       default:
+               val = VPU_MEM_PD_ERR;
+               break;
+       }
+
+       return val;
+}
+
+int get_vpu_mem_pd_vmod(unsigned int vmod)
+{
+       int ret = 0;
+
+       ret = vpu_chip_valid_check();
+       if (ret)
+               return -1;
+
+       switch (vpu_chip_type) {
+       case VPU_CHIP_AXG:
+               ret = get_vpu_mem_pd_axg(vmod);
+               break;
+       default:
+               ret = get_vpu_mem_pd_gx(vmod);
+               break;
+       }
+
+       if (ret == 0)
                return VPU_MEM_POWER_ON;
-       else if ((val == 0x3) || (val == 0xf))
+       else if ((ret == 0x3) || (ret == 0xf))
                return VPU_MEM_POWER_DOWN;
        else
                return -1;

diff --git a/drivers/amlogic/media/common/vpu/vpu_reg.c b/drivers/amlogic/media/common/vpu/vpu_reg.c
index eca999d..ac3794b 100644 (file)
--- a/drivers/amlogic/media/common/vpu/vpu_reg.c
+++ b/drivers/amlogic/media/common/vpu/vpu_reg.c
@@ -43,7 +43,7 @@ struct reg_map_s {
 static struct reg_map_s *vpu_map;
 static int vpu_map_num;
 
-static struct reg_map_s vpu_reg_maps[] = {
+static struct reg_map_s vpu_reg_maps_gx[] = {
        { /* HIU */
                .base_addr = 0xc883c000,
                .size = 0x400,
@@ -54,13 +54,41 @@ static struct reg_map_s vpu_reg_maps[] = {
        },
 };
 
+static struct reg_map_s vpu_reg_maps_axg[] = {
+       { /* HIU */
+               .base_addr = 0xff63c000,
+               .size = 0x400,
+       },
+       { /* VCBUS */
+               .base_addr = 0xff900000,
+               .size = 0xa000,
+       },
+};
+
 int vpu_ioremap(void)
 {
        int i;
        int ret = 0;
 
-       vpu_map = vpu_reg_maps;
-       vpu_map_num = ARRAY_SIZE(vpu_reg_maps);
+       switch (vpu_chip_type) {
+       case VPU_CHIP_GXBB:
+       case VPU_CHIP_GXTVBB:
+       case VPU_CHIP_GXL:
+       case VPU_CHIP_GXM:
+       case VPU_CHIP_TXL:
+               vpu_map = vpu_reg_maps_gx;
+               vpu_map_num = ARRAY_SIZE(vpu_reg_maps_gx);
+               break;
+       case VPU_CHIP_AXG:
+               vpu_map = vpu_reg_maps_axg;
+               vpu_map_num = ARRAY_SIZE(vpu_reg_maps_axg);
+               break;
+       default:
+               vpu_map = NULL;
+               vpu_map_num = 0;
+               VPUERR("%s: invalid chip type\n", __func__);
+               break;
+       }
 
        for (i = 0; i < vpu_map_num; i++) {
                vpu_map[i].p = ioremap(vpu_map[i].base_addr, vpu_map[i].size);