Merge tag 'at91-soc' of git://github.com/at91linux/linux-at91 into late/cleanup

From Nicolas Ferre <nicolas.ferre@atmel.com>:

DT modifications for generic slave DMA binding.
Addition of MCI and I2C DMA bindings.
A little DT machine compatibility removal for SAMA5.

* tag 'at91-soc' of git://github.com/at91linux/linux-at91:
  ARM: at91/sama5d34ek.dts: remove not needed compatibility string
  ARM: at91: dts: add MCI DMA support
  ARM: at91: dts: add i2c dma support
  ARM: at91: dts: set #dma-cells to the correct value

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

diff --combined arch/arm/boot/dts/at91sam9x5.dtsi
index a98c0d5,ffd450f..cbb9473
--- 1/arch/arm/boot/dts/at91sam9x5.dtsi
--- 2/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@@ -104,12 -104,14 +104,14 @@@
                                compatible = "atmel,at91sam9g45-dma";
                                reg = <0xffffec00 0x200>;
                                interrupts = <20 4 0>;
+                               #dma-cells = <2>;
                        };
  
                        dma1: dma-controller@ffffee00 {
                                compatible = "atmel,at91sam9g45-dma";
                                reg = <0xffffee00 0x200>;
                                interrupts = <21 4 0>;
+                               #dma-cells = <2>;
                        };
  
                        pinctrl@fffff400 {
@@@ -238,32 -240,8 +240,32 @@@
                                nand {
                                        pinctrl_nand: nand-0 {
                                                atmel,pins =
 -                                                      <3 4 0x0 0x1    /* PD5 gpio RDY pin pull_up */
 -                                                       3 5 0x0 0x1>;  /* PD4 gpio enable pin pull_up */
 +                                                      <3 0 0x1 0x0    /* PD0 periph A Read Enable */
 +                                                       3 1 0x1 0x0    /* PD1 periph A Write Enable */
 +                                                       3 2 0x1 0x0    /* PD2 periph A Address Latch Enable */
 +                                                       3 3 0x1 0x0    /* PD3 periph A Command Latch Enable */
 +                                                       3 4 0x0 0x1    /* PD4 gpio Chip Enable pin pull_up */
 +                                                       3 5 0x0 0x1    /* PD5 gpio RDY/BUSY pin pull_up */
 +                                                       3 6 0x1 0x0    /* PD6 periph A Data bit 0 */
 +                                                       3 7 0x1 0x0    /* PD7 periph A Data bit 1 */
 +                                                       3 8 0x1 0x0    /* PD8 periph A Data bit 2 */
 +                                                       3 9 0x1 0x0    /* PD9 periph A Data bit 3 */
 +                                                       3 10 0x1 0x0   /* PD10 periph A Data bit 4 */
 +                                                       3 11 0x1 0x0   /* PD11 periph A Data bit 5 */
 +                                                       3 12 0x1 0x0   /* PD12 periph A Data bit 6 */
 +                                                       3 13 0x1 0x0>; /* PD13 periph A Data bit 7 */
 +                                      };
 +
 +                                      pinctrl_nand_16bits: nand_16bits-0 {
 +                                              atmel,pins =
 +                                                      <3 14 0x1 0x0   /* PD14 periph A Data bit 8 */
 +                                                       3 15 0x1 0x0   /* PD15 periph A Data bit 9 */
 +                                                       3 16 0x1 0x0   /* PD16 periph A Data bit 10 */
 +                                                       3 17 0x1 0x0   /* PD17 periph A Data bit 11 */
 +                                                       3 18 0x1 0x0   /* PD18 periph A Data bit 12 */
 +                                                       3 19 0x1 0x0   /* PD19 periph A Data bit 13 */
 +                                                       3 20 0x1 0x0   /* PD20 periph A Data bit 14 */
 +                                                       3 21 0x1 0x0>; /* PD21 periph A Data bit 15 */
                                        };
                                };
  
@@@ -399,6 -377,8 +401,8 @@@
                                compatible = "atmel,hsmci";
                                reg = <0xf0008000 0x600>;
                                interrupts = <12 4 0>;
+                               dmas = <&dma0 1 0>;
+                               dma-names = "rxtx";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                status = "disabled";
@@@ -408,6 -388,8 +412,8 @@@
                                compatible = "atmel,hsmci";
                                reg = <0xf000c000 0x600>;
                                interrupts = <26 4 0>;
+                               dmas = <&dma1 1 0>;
+                               dma-names = "rxtx";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                status = "disabled";
@@@ -469,6 -451,9 +475,9 @@@
                                compatible = "atmel,at91sam9x5-i2c";
                                reg = <0xf8010000 0x100>;
                                interrupts = <9 4 6>;
+                               dmas = <&dma0 1 7>,
+                                      <&dma0 1 8>;
+                               dma-names = "tx", "rx";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                status = "disabled";
@@@ -478,6 -463,9 +487,9 @@@
                                compatible = "atmel,at91sam9x5-i2c";
                                reg = <0xf8014000 0x100>;
                                interrupts = <10 4 6>;
+                               dmas = <&dma1 1 5>,
+                                      <&dma1 1 6>;
+                               dma-names = "tx", "rx";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                status = "disabled";
@@@ -487,6 -475,9 +499,9 @@@
                                compatible = "atmel,at91sam9x5-i2c";
                                reg = <0xf8018000 0x100>;
                                interrupts = <11 4 6>;
+                               dmas = <&dma0 1 9>,
+                                      <&dma0 1 10>;
+                               dma-names = "tx", "rx";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                status = "disabled";