+2019-02-17 Alan Modra <amodra@gmail.com>
+
+ PR target/89271
+ * config/rs6000/rs6000.md (<bd>_<mode> split): Check for an int
+ output reg on add insn.
+ (<bd>tf_<mode> split): Likewise. Match predicates with insn.
+
2019-02-16 H.J. Lu <hongjiu.lu@intel.com>
PR target/89372
const0_rtx);
emit_insn (gen_rtx_SET (operands[3],
gen_rtx_COMPARE (CCmode, operands[1], const1_rtx)));
- if (gpc_reg_operand (operands[0], <MODE>mode))
+ if (int_reg_operand (operands[0], <MODE>mode))
emit_insn (gen_add<mode>3 (operands[0], operands[1], constm1_rtx));
else
{
(const_int 0)]))
(match_operand 4)
(match_operand 5)))
- (set (match_operand:P 6 "int_reg_operand")
+ (set (match_operand:P 6 "nonimmediate_operand")
(plus:P (match_dup 0)
(const_int -1)))
(clobber (match_scratch:P 7))
else
emit_insn (gen_cceq_ior_compare_complement (operands[9], andexpr, ctrcmpcc,
operands[8], cccmp, ccin));
- if (gpc_reg_operand (operands[0], <MODE>mode))
+ if (int_reg_operand (ctrout, <MODE>mode))
emit_insn (gen_add<mode>3 (ctrout, ctr, constm1_rtx));
else
{