obj-n :=
obj- :=
-obj-$(CONFIG_CPU_S3C2440) += dsc.o
-
obj-$(CONFIG_S3C2440_CPUFREQ) += s3c2440-cpufreq.o
obj-$(CONFIG_S3C2440_PLL_12000000) += s3c2440-pll-12000000.o
+++ /dev/null
-/* linux/arch/arm/mach-s3c2440/dsc.c
- *
- * Copyright (c) 2004-2005 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * Samsung S3C2440 Drive Strength Control support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/io.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-
-#include <mach/hardware.h>
-#include <asm/irq.h>
-
-#include <mach/regs-gpio.h>
-#include <mach/regs-dsc.h>
-
-#include <plat/cpu.h>
-#include <plat/s3c244x.h>
-
-int s3c2440_set_dsc(unsigned int pin, unsigned int value)
-{
- void __iomem *base;
- unsigned long val;
- unsigned long flags;
- unsigned long mask;
-
- base = (pin & S3C2440_SELECT_DSC1) ? S3C2440_DSC1 : S3C2440_DSC0;
- mask = 3 << S3C2440_DSC_GETSHIFT(pin);
-
- local_irq_save(flags);
-
- val = __raw_readl(base);
- val &= ~mask;
- val |= value & mask;
- __raw_writel(val, base);
-
- local_irq_restore(flags);
- return 0;
-}
-
-EXPORT_SYMBOL(s3c2440_set_dsc);
#include <linux/platform_device.h>
#include <linux/io.h>
-#include <mach/hardware.h>
#include <asm/cacheflush.h>
#include <asm/irq.h>
-#include <mach/regs-power.h>
+#include <mach/hardware.h>
#include <mach/regs-gpio.h>
-#include <mach/regs-dsc.h>
+#include <mach/regs-power.h>
#include <plat/cpu.h>
#include <plat/pm.h>
-
#include <plat/s3c2412.h>
+#include "regs-dsc.h"
+
extern void s3c2412_sleep_enter(void);
static int s3c2412_cpu_suspend(unsigned long arg)
#include <mach/hardware.h>
#include <mach/regs-clock.h>
-#include <mach/regs-dsc.h>
#include <mach/regs-gpio.h>
#include <mach/regs-power.h>
#include <plat/regs-spi.h>
#include <plat/s3c2412.h>
+#include "regs-dsc.h"
+
#define S3C2412_SWRST (S3C24XX_VA_CLKPWR + 0x30)
#define S3C2412_SWRST_RESET (0x533C2412)
#include <mach/regs-clock.h>
#include <plat/regs-serial.h>
#include <mach/regs-gpio.h>
-#include <mach/regs-dsc.h>
#include <plat/s3c2410.h>
#include <plat/s3c244x.h>
#include <plat/nand-core.h>
#include <plat/watchdog-reset.h>
+#include "regs-dsc.h"
+
static struct map_desc s3c244x_iodesc[] __initdata = {
IODESC_ENT(CLKPWR),
IODESC_ENT(TIMER),