{
unsigned int val;
- /* Configues port 1, 2, 3, 4 to be validate*/
+ /* Configures port 1, 2, 3, 4 to be validate*/
pci_read_config_dword(pdev, 0xe0, &val);
pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x4);
iface = netdev_priv(dev);
local = iface->local;
- /* Detect early interrupt before driver is fully configued */
+ /* Detect early interrupt before driver is fully configured */
spin_lock(&local->irq_init_lock);
if (!dev->base_addr) {
if (net_ratelimit()) {
if((val == N_SYNC_PPP) || (val == N_PPP))
{
DEBUG(FS_INFO, "Entering PPP discipline.\n");
- /* PPP channel setup (ap->chan in configued in dev_irnet_open())*/
+ /* PPP channel setup (ap->chan in configured in dev_irnet_open())*/
lock_kernel();
err = ppp_register_channel(&ap->chan);
if(err == 0)
if (ret < 0)
return ret;
- /* configue and enable PLL for 12.288MHz output */
+ /* configure and enable PLL for 12.288MHz output */
ret = snd_soc_dai_set_pll(codec_dai, WM8753_PLL2, 0,
iis_clkrate / 4, 12288000);
if (ret < 0)
if (ret < 0)
return ret;
- /* configue and enable PLL for 12.288MHz output */
+ /* configure and enable PLL for 12.288MHz output */
ret = snd_soc_dai_set_pll(codec_dai, WM8753_PLL2, 0,
iis_clkrate / 4, 12288000);
if (ret < 0)