getActionDefinitionsBuilder(G_FCONSTANT)
.legalFor({S32, S64});
- getActionDefinitionsBuilder({G_IMPLICIT_DEF, G_CONSTANT})
+ getActionDefinitionsBuilder(G_IMPLICIT_DEF)
+ .legalFor({S1, S32, S64,
+ GlobalPtr, ConstantPtr, LocalPtr, FlatPtr, PrivatePtr});
+
+ getActionDefinitionsBuilder(G_CONSTANT)
.legalFor({S1, S32, S64});
// FIXME: i1 operands to intrinsics should always be legal, but other i1
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefixes=GCN
---- |
- define amdgpu_kernel void @implicit_def(i32 addrspace(1)* %global0) {ret void}
-...
---
-name: implicit_def
+name: implicit_def_s32
legalized: true
regBankSelected: true
-
body: |
bb.0:
liveins: $vgpr3_vgpr4
- ; GCN-LABEL: name: implicit_def
+ ; GCN-LABEL: name: implicit_def_s32
; GCN: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
; GCN: FLAT_STORE_DWORD [[COPY]], [[DEF]], 0, 0, 0, implicit $exec, implicit $flat_scr
%0:vgpr(s64) = COPY $vgpr3_vgpr4
%1:vgpr(s32) = G_IMPLICIT_DEF
- G_STORE %1, %0 :: (store 4 into %ir.global0)
+ G_STORE %1, %0 :: (store 4)
+...
+---
+
+name: implicit_def_s64
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $vgpr3_vgpr4
+ ; GCN-LABEL: name: implicit_def_s64
+ ; GCN: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
+ ; GCN: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
+ ; GCN: FLAT_STORE_DWORDX2 [[COPY]], [[DEF]], 0, 0, 0, implicit $exec, implicit $flat_scr
+ %0:vgpr(s64) = COPY $vgpr3_vgpr4
+ %1:vgpr(s64) = G_IMPLICIT_DEF
+ G_STORE %1, %0 :: (store 8)
+---
+
+---
+
+name: implicit_def_p0
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ %0:vgpr(p0) = G_IMPLICIT_DEF
+ %1:vgpr(s32) = G_CONSTANT 4
+ G_STORE %1, %0 :: (store 4)
+...
+
+---
+
+name: implicit_def_p1
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ ; GCN-LABEL: name: implicit_def_p1
+ ; GCN: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
+ ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+ ; GCN: FLAT_STORE_DWORD [[DEF]], [[V_MOV_B32_e32_]], 0, 0, 0, implicit $exec, implicit $flat_scr
+ %0:vgpr(p1) = G_IMPLICIT_DEF
+ %1:vgpr(s32) = G_CONSTANT 4
+ G_STORE %1, %0 :: (store 4)
...
---
+
+name: implicit_def_p3
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ ; GCN-LABEL: name: implicit_def_p3
+ ; GCN: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
+ ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+ ; GCN: FLAT_STORE_DWORD [[DEF]], [[V_MOV_B32_e32_]], 0, 0, 0, implicit $exec, implicit $flat_scr
+ %0:vgpr(p3) = G_IMPLICIT_DEF
+ %1:vgpr(s32) = G_CONSTANT 4
+ G_STORE %1, %0 :: (store 4)
+...
+---
+
+name: implicit_def_p4
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ ; GCN-LABEL: name: implicit_def_p4
+ ; GCN: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
+ ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+ ; GCN: FLAT_STORE_DWORD [[DEF]], [[V_MOV_B32_e32_]], 0, 0, 0, implicit $exec, implicit $flat_scr
+ %0:vgpr(p4) = G_IMPLICIT_DEF
+ %1:vgpr(s32) = G_CONSTANT 4
+ G_STORE %1, %0 :: (store 4)
+...