net/mlx5: Fix the macro for accessing EC VF vports
authorDaniel Jurgens <danielj@nvidia.com>
Tue, 13 Jun 2023 19:26:43 +0000 (22:26 +0300)
committerSaeed Mahameed <saeedm@nvidia.com>
Fri, 16 Jun 2023 19:02:08 +0000 (12:02 -0700)
The last value is not set correctly. This results in representors not
being created for all EC VFs when the base value is higher than 0.

Fixes: a7719b29a821 ("net/mlx5: Add management of EC VF vports")
Signed-off-by: Daniel Jurgens <danielj@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
drivers/net/ethernet/mellanox/mlx5/core/eswitch.h

index bcbab06..7064609 100644 (file)
@@ -668,6 +668,7 @@ void mlx5e_tc_clean_fdb_peer_flows(struct mlx5_eswitch *esw);
                          index,                                        \
                          vport,                                        \
                          MLX5_CAP_GEN_2((esw->dev), ec_vf_vport_base), \
+                         MLX5_CAP_GEN_2((esw->dev), ec_vf_vport_base) +\
                          (last) - 1)
 
 struct mlx5_eswitch *mlx5_devlink_eswitch_get(struct devlink *devlink);