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sf: Remove e_rd_cmd from param table
authorJagan Teki <jteki@openedev.com>
Mon, 8 Aug 2016 11:32:18 +0000 (17:02 +0530)
committerJagan Teki <jagannadh.teki@gmail.com>
Wed, 21 Sep 2016 19:32:28 +0000 (01:02 +0530)
e_rd_cmd is maintained separately for fastest read command code,
since the read commands are computed normally this e_rd_cmd
is not required in spi_flash_params table.

Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
drivers/mtd/spi/sf_internal.h patch | blob | history
drivers/mtd/spi/sf_params.c patch | blob | history

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index c5cb791..71ba1a6 100644 (file)
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -20,21 +20,6 @@ enum spi_dual_flash {
        SF_DUAL_PARALLEL_FLASH  = BIT(1),
 };
 
-/* Enum list - Full read commands */
-enum spi_read_cmds {
-       ARRAY_SLOW              = BIT(0),
-       ARRAY_FAST              = BIT(1),
-       DUAL_OUTPUT_FAST        = BIT(2),
-       QUAD_OUTPUT_FAST        = BIT(3),
-       DUAL_IO_FAST            = BIT(4),
-       QUAD_IO_FAST            = BIT(5),
-};
-
-/* Normal - Extended - Full command set */
-#define RD_NORM                (ARRAY_SLOW | ARRAY_FAST)
-#define RD_EXTN                (RD_NORM | DUAL_OUTPUT_FAST | DUAL_IO_FAST)
-#define RD_FULL                (RD_EXTN | QUAD_OUTPUT_FAST | QUAD_IO_FAST)
-
 /* sf param flags */
 enum {
 #ifndef CONFIG_SPI_FLASH_USE_4K_SECTORS
@@ -51,6 +36,7 @@ enum {
        RD_QUADIO       = BIT(7),
        RD_DUALIO       = BIT(8),
 };
+#define RD_FULL                RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO
 
 enum spi_nor_option_flags {
        SNOR_F_SST_WR           = BIT(0),
@@ -145,7 +131,6 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
  * @sector_size:       Isn't necessarily a sector size from vendor,
  *                     the size listed here is what works with CMD_ERASE_64K
  * @nr_sectors:                No.of sectors on this device
- * @e_rd_cmd:          Enum list for read commands
  * @flags:             Important param, for flash specific behaviour
  */
 struct spi_flash_params {
@@ -154,7 +139,6 @@ struct spi_flash_params {
        u16 ext_jedec;
        u32 sector_size;
        u32 nr_sectors;
-       u8 e_rd_cmd;
        u16 flags;
 };
 
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
index 70ca236..5b50114 100644 (file)
--- a/drivers/mtd/spi/sf_params.c
+++ b/drivers/mtd/spi/sf_params.c
@@ -15,122 +15,122 @@
 /* SPI/QSPI flash device params structure */
 const struct spi_flash_params spi_flash_params_table[] = {
 #ifdef CONFIG_SPI_FLASH_ATMEL          /* ATMEL */
-       {"AT45DB011D",     0x1f2200, 0x0,       64 * 1024,     4, RD_NORM,                  SECT_4K},
-       {"AT45DB021D",     0x1f2300, 0x0,       64 * 1024,     8, RD_NORM,                  SECT_4K},
-       {"AT45DB041D",     0x1f2400, 0x0,       64 * 1024,     8, RD_NORM,                  SECT_4K},
-       {"AT45DB081D",     0x1f2500, 0x0,       64 * 1024,    16, RD_NORM,                  SECT_4K},
-       {"AT45DB161D",     0x1f2600, 0x0,       64 * 1024,    32, RD_NORM,                  SECT_4K},
-       {"AT45DB321D",     0x1f2700, 0x0,       64 * 1024,    64, RD_NORM,                  SECT_4K},
-       {"AT45DB641D",     0x1f2800, 0x0,       64 * 1024,   128, RD_NORM,                  SECT_4K},
-       {"AT25DF321A",     0x1f4701, 0x0,       64 * 1024,    64, RD_NORM,                  SECT_4K},
-       {"AT25DF321",      0x1f4700, 0x0,       64 * 1024,    64, RD_NORM,                  SECT_4K},
-       {"AT26DF081A",     0x1f4501, 0x0,       64 * 1024,    16, RD_NORM,                  SECT_4K},
+       {"AT45DB011D",     0x1f2200, 0x0,       64 * 1024,     4, SECT_4K},
+       {"AT45DB021D",     0x1f2300, 0x0,       64 * 1024,     8, SECT_4K},
+       {"AT45DB041D",     0x1f2400, 0x0,       64 * 1024,     8, SECT_4K},
+       {"AT45DB081D",     0x1f2500, 0x0,       64 * 1024,    16, SECT_4K},
+       {"AT45DB161D",     0x1f2600, 0x0,       64 * 1024,    32, SECT_4K},
+       {"AT45DB321D",     0x1f2700, 0x0,       64 * 1024,    64, SECT_4K},
+       {"AT45DB641D",     0x1f2800, 0x0,       64 * 1024,   128, SECT_4K},
+       {"AT25DF321A",     0x1f4701, 0x0,       64 * 1024,    64, SECT_4K},
+       {"AT25DF321",      0x1f4700, 0x0,       64 * 1024,    64, SECT_4K},
+       {"AT26DF081A",     0x1f4501, 0x0,       64 * 1024,    16, SECT_4K},
 #endif
 #ifdef CONFIG_SPI_FLASH_EON            /* EON */
-       {"EN25Q32B",       0x1c3016, 0x0,       64 * 1024,    64, RD_NORM,                        0},
-       {"EN25Q64",        0x1c3017, 0x0,       64 * 1024,   128, RD_NORM,                  SECT_4K},
-       {"EN25Q128B",      0x1c3018, 0x0,       64 * 1024,   256, RD_NORM,                        0},
-       {"EN25S64",        0x1c3817, 0x0,       64 * 1024,   128, RD_NORM,                        0},
+       {"EN25Q32B",       0x1c3016, 0x0,       64 * 1024,    64, 0},
+       {"EN25Q64",        0x1c3017, 0x0,       64 * 1024,   128, SECT_4K},
+       {"EN25Q128B",      0x1c3018, 0x0,       64 * 1024,   256, 0},
+       {"EN25S64",        0x1c3817, 0x0,       64 * 1024,   128, 0},
 #endif
 #ifdef CONFIG_SPI_FLASH_GIGADEVICE     /* GIGADEVICE */
-       {"GD25Q64B",       0xc84017, 0x0,       64 * 1024,   128, RD_NORM,                  SECT_4K},
-       {"GD25LQ32",       0xc86016, 0x0,       64 * 1024,    64, RD_NORM,                  SECT_4K},
+       {"GD25Q64B",       0xc84017, 0x0,       64 * 1024,   128, SECT_4K},
+       {"GD25LQ32",       0xc86016, 0x0,       64 * 1024,    64, SECT_4K},
 #endif
 #ifdef CONFIG_SPI_FLASH_ISSI           /* ISSI */
-       {"IS25LP032",      0x9d6016, 0x0,       64 * 1024,    64, RD_NORM,                        0},
-       {"IS25LP064",      0x9d6017, 0x0,       64 * 1024,   128, RD_NORM,                        0},
-       {"IS25LP128",      0x9d6018, 0x0,       64 * 1024,   256, RD_NORM,                        0},
+       {"IS25LP032",      0x9d6016, 0x0,       64 * 1024,    64, 0},
+       {"IS25LP064",      0x9d6017, 0x0,       64 * 1024,   128, 0},
+       {"IS25LP128",      0x9d6018, 0x0,       64 * 1024,   256, 0},
 #endif
 #ifdef CONFIG_SPI_FLASH_MACRONIX       /* MACRONIX */
-       {"MX25L2006E",     0xc22012, 0x0,       64 * 1024,     4, RD_NORM,                        0},
-       {"MX25L4005",      0xc22013, 0x0,       64 * 1024,     8, RD_NORM,                        0},
-       {"MX25L8005",      0xc22014, 0x0,       64 * 1024,    16, RD_NORM,                        0},
-       {"MX25L1605D",     0xc22015, 0x0,       64 * 1024,    32, RD_NORM,                        0},
-       {"MX25L3205D",     0xc22016, 0x0,       64 * 1024,    64, RD_NORM,                        0},
-       {"MX25L6405D",     0xc22017, 0x0,       64 * 1024,   128, RD_NORM,                        0},
-       {"MX25L12805",     0xc22018, 0x0,       64 * 1024,   256, RD_FULL,                   WR_QPP},
-       {"MX25L25635F",    0xc22019, 0x0,       64 * 1024,   512, RD_FULL,                   WR_QPP},
-       {"MX25L51235F",    0xc2201a, 0x0,       64 * 1024,  1024, RD_FULL,                   WR_QPP},
-       {"MX25L12855E",    0xc22618, 0x0,       64 * 1024,   256, RD_FULL,                   WR_QPP},
+       {"MX25L2006E",     0xc22012, 0x0,       64 * 1024,     4, 0},
+       {"MX25L4005",      0xc22013, 0x0,       64 * 1024,     8, 0},
+       {"MX25L8005",      0xc22014, 0x0,       64 * 1024,    16, 0},
+       {"MX25L1605D",     0xc22015, 0x0,       64 * 1024,    32, 0},
+       {"MX25L3205D",     0xc22016, 0x0,       64 * 1024,    64, 0},
+       {"MX25L6405D",     0xc22017, 0x0,       64 * 1024,   128, 0},
+       {"MX25L12805",     0xc22018, 0x0,       64 * 1024,   256, RD_FULL | WR_QPP},
+       {"MX25L25635F",    0xc22019, 0x0,       64 * 1024,   512, RD_FULL | WR_QPP},
+       {"MX25L51235F",    0xc2201a, 0x0,       64 * 1024,  1024, RD_FULL | WR_QPP},
+       {"MX25L12855E",    0xc22618, 0x0,       64 * 1024,   256, RD_FULL | WR_QPP},
 #endif
 #ifdef CONFIG_SPI_FLASH_SPANSION       /* SPANSION */
-       {"S25FL008A",      0x010213, 0x0,       64 * 1024,    16, RD_NORM,                        0},
-       {"S25FL016A",      0x010214, 0x0,       64 * 1024,    32, RD_NORM,                        0},
-       {"S25FL032A",      0x010215, 0x0,       64 * 1024,    64, RD_NORM,                        0},
-       {"S25FL064A",      0x010216, 0x0,       64 * 1024,   128, RD_NORM,                        0},
-       {"S25FL116K",      0x014015, 0x0,       64 * 1024,   128, RD_NORM,                        0},
-       {"S25FL164K",      0x014017, 0x0140,    64 * 1024,   128, RD_NORM,                        0},
-       {"S25FL128P_256K", 0x012018, 0x0300,   256 * 1024,    64, RD_FULL,                   WR_QPP},
-       {"S25FL128P_64K",  0x012018, 0x0301,    64 * 1024,   256, RD_FULL,                   WR_QPP},
-       {"S25FL032P",      0x010215, 0x4d00,    64 * 1024,    64, RD_FULL,                   WR_QPP},
-       {"S25FL064P",      0x010216, 0x4d00,    64 * 1024,   128, RD_FULL,                   WR_QPP},
-       {"S25FL128S_256K", 0x012018, 0x4d00,   256 * 1024,    64, RD_FULL,                   WR_QPP},
-       {"S25FL128S_64K",  0x012018, 0x4d01,    64 * 1024,   256, RD_FULL,                   WR_QPP},
-       {"S25FL256S_256K", 0x010219, 0x4d00,   256 * 1024,   128, RD_FULL,                   WR_QPP},
-       {"S25FL256S_64K",  0x010219, 0x4d01,    64 * 1024,   512, RD_FULL,                   WR_QPP},
-       {"S25FS512S",      0x010220, 0x4D00,   128 * 1024,   512, RD_FULL,                   WR_QPP},
-       {"S25FL512S_256K", 0x010220, 0x4d00,   256 * 1024,   256, RD_FULL,                   WR_QPP},
-       {"S25FL512S_64K",  0x010220, 0x4d01,    64 * 1024,  1024, RD_FULL,                   WR_QPP},
-       {"S25FL512S_512K", 0x010220, 0x4f00,   256 * 1024,   256, RD_FULL,                   WR_QPP},
+       {"S25FL008A",      0x010213, 0x0,       64 * 1024,    16, 0},
+       {"S25FL016A",      0x010214, 0x0,       64 * 1024,    32, 0},
+       {"S25FL032A",      0x010215, 0x0,       64 * 1024,    64, 0},
+       {"S25FL064A",      0x010216, 0x0,       64 * 1024,   128, 0},
+       {"S25FL116K",      0x014015, 0x0,       64 * 1024,   128, 0},
+       {"S25FL164K",      0x014017, 0x0140,    64 * 1024,   128, 0},
+       {"S25FL128P_256K", 0x012018, 0x0300,   256 * 1024,    64, RD_FULL | WR_QPP},
+       {"S25FL128P_64K",  0x012018, 0x0301,    64 * 1024,   256, RD_FULL | WR_QPP},
+       {"S25FL032P",      0x010215, 0x4d00,    64 * 1024,    64, RD_FULL | WR_QPP},
+       {"S25FL064P",      0x010216, 0x4d00,    64 * 1024,   128, RD_FULL | WR_QPP},
+       {"S25FL128S_256K", 0x012018, 0x4d00,   256 * 1024,    64, RD_FULL | WR_QPP},
+       {"S25FL128S_64K",  0x012018, 0x4d01,    64 * 1024,   256, RD_FULL | WR_QPP},
+       {"S25FL256S_256K", 0x010219, 0x4d00,   256 * 1024,   128, RD_FULL | WR_QPP},
+       {"S25FL256S_64K",  0x010219, 0x4d01,    64 * 1024,   512, RD_FULL | WR_QPP},
+       {"S25FS512S",      0x010220, 0x4D00,   128 * 1024,   512, RD_FULL | WR_QPP},
+       {"S25FL512S_256K", 0x010220, 0x4d00,   256 * 1024,   256, RD_FULL | WR_QPP},
+       {"S25FL512S_64K",  0x010220, 0x4d01,    64 * 1024,  1024, RD_FULL | WR_QPP},
+       {"S25FL512S_512K", 0x010220, 0x4f00,   256 * 1024,   256, RD_FULL | WR_QPP},
 #endif
 #ifdef CONFIG_SPI_FLASH_STMICRO                /* STMICRO */
-       {"M25P10",         0x202011, 0x0,       32 * 1024,     4, RD_NORM,                        0},
-       {"M25P20",         0x202012, 0x0,       64 * 1024,     4, RD_NORM,                        0},
-       {"M25P40",         0x202013, 0x0,       64 * 1024,     8, RD_NORM,                        0},
-       {"M25P80",         0x202014, 0x0,       64 * 1024,    16, RD_NORM,                        0},
-       {"M25P16",         0x202015, 0x0,       64 * 1024,    32, RD_NORM,                        0},
-       {"M25PE16",        0x208015, 0x1000,    64 * 1024,    32, RD_NORM,                        0},
-       {"M25PX16",        0x207115, 0x1000,    64 * 1024,    32, RD_EXTN,                        0},
-       {"M25P32",         0x202016, 0x0,       64 * 1024,    64, RD_NORM,                        0},
-       {"M25P64",         0x202017, 0x0,       64 * 1024,   128, RD_NORM,                        0},
-       {"M25P128",        0x202018, 0x0,      256 * 1024,    64, RD_NORM,                        0},
-       {"M25PX64",        0x207117, 0x0,       64 * 1024,   128, RD_NORM,                  SECT_4K},
-       {"N25Q016A",       0x20bb15, 0x0,       64 * 1024,    32, RD_NORM,                  SECT_4K},
-       {"N25Q32",         0x20ba16, 0x0,       64 * 1024,    64, RD_FULL,         WR_QPP | SECT_4K},
-       {"N25Q32A",        0x20bb16, 0x0,       64 * 1024,    64, RD_FULL,         WR_QPP | SECT_4K},
-       {"N25Q64",         0x20ba17, 0x0,       64 * 1024,   128, RD_FULL,         WR_QPP | SECT_4K},
-       {"N25Q64A",        0x20bb17, 0x0,       64 * 1024,   128, RD_FULL,         WR_QPP | SECT_4K},
-       {"N25Q128",        0x20ba18, 0x0,       64 * 1024,   256, RD_FULL,                   WR_QPP},
-       {"N25Q128A",       0x20bb18, 0x0,       64 * 1024,   256, RD_FULL,                   WR_QPP},
-       {"N25Q256",        0x20ba19, 0x0,       64 * 1024,   512, RD_FULL,         WR_QPP | SECT_4K},
-       {"N25Q256A",       0x20bb19, 0x0,       64 * 1024,   512, RD_FULL,         WR_QPP | SECT_4K},
-       {"N25Q512",        0x20ba20, 0x0,       64 * 1024,  1024, RD_FULL, WR_QPP | E_FSR | SECT_4K},
-       {"N25Q512A",       0x20bb20, 0x0,       64 * 1024,  1024, RD_FULL, WR_QPP | E_FSR | SECT_4K},
-       {"N25Q1024",       0x20ba21, 0x0,       64 * 1024,  2048, RD_FULL, WR_QPP | E_FSR | SECT_4K},
-       {"N25Q1024A",      0x20bb21, 0x0,       64 * 1024,  2048, RD_FULL, WR_QPP | E_FSR | SECT_4K},
+       {"M25P10",         0x202011, 0x0,       32 * 1024,     4, 0},
+       {"M25P20",         0x202012, 0x0,       64 * 1024,     4, 0},
+       {"M25P40",         0x202013, 0x0,       64 * 1024,     8, 0},
+       {"M25P80",         0x202014, 0x0,       64 * 1024,    16, 0},
+       {"M25P16",         0x202015, 0x0,       64 * 1024,    32, 0},
+       {"M25PE16",        0x208015, 0x1000,    64 * 1024,    32, 0},
+       {"M25PX16",        0x207115, 0x1000,    64 * 1024,    32, RD_QUAD | RD_DUAL},
+       {"M25P32",         0x202016, 0x0,       64 * 1024,    64, 0},
+       {"M25P64",         0x202017, 0x0,       64 * 1024,   128, 0},
+       {"M25P128",        0x202018, 0x0,      256 * 1024,    64, 0},
+       {"M25PX64",        0x207117, 0x0,       64 * 1024,   128, SECT_4K},
+       {"N25Q016A",       0x20bb15, 0x0,       64 * 1024,    32, SECT_4K},
+       {"N25Q32",         0x20ba16, 0x0,       64 * 1024,    64, RD_FULL | WR_QPP | SECT_4K},
+       {"N25Q32A",        0x20bb16, 0x0,       64 * 1024,    64, RD_FULL | WR_QPP | SECT_4K},
+       {"N25Q64",         0x20ba17, 0x0,       64 * 1024,   128, RD_FULL | WR_QPP | SECT_4K},
+       {"N25Q64A",        0x20bb17, 0x0,       64 * 1024,   128, RD_FULL | WR_QPP | SECT_4K},
+       {"N25Q128",        0x20ba18, 0x0,       64 * 1024,   256, RD_FULL | WR_QPP},
+       {"N25Q128A",       0x20bb18, 0x0,       64 * 1024,   256, RD_FULL | WR_QPP},
+       {"N25Q256",        0x20ba19, 0x0,       64 * 1024,   512, RD_FULL | WR_QPP | SECT_4K},
+       {"N25Q256A",       0x20bb19, 0x0,       64 * 1024,   512, RD_FULL | WR_QPP | SECT_4K},
+       {"N25Q512",        0x20ba20, 0x0,       64 * 1024,  1024, RD_FULL | WR_QPP | E_FSR | SECT_4K},
+       {"N25Q512A",       0x20bb20, 0x0,       64 * 1024,  1024, RD_FULL | WR_QPP | E_FSR | SECT_4K},
+       {"N25Q1024",       0x20ba21, 0x0,       64 * 1024,  2048, RD_FULL | WR_QPP | E_FSR | SECT_4K},
+       {"N25Q1024A",      0x20bb21, 0x0,       64 * 1024,  2048, RD_FULL | WR_QPP | E_FSR | SECT_4K},
 #endif
 #ifdef CONFIG_SPI_FLASH_SST            /* SST */
-       {"SST25VF040B",    0xbf258d, 0x0,       64 * 1024,     8, RD_NORM,          SECT_4K | SST_WR},
-       {"SST25VF080B",    0xbf258e, 0x0,       64 * 1024,    16, RD_NORM,          SECT_4K | SST_WR},
-       {"SST25VF016B",    0xbf2541, 0x0,       64 * 1024,    32, RD_NORM,          SECT_4K | SST_WR},
-       {"SST25VF032B",    0xbf254a, 0x0,       64 * 1024,    64, RD_NORM,          SECT_4K | SST_WR},
-       {"SST25VF064C",    0xbf254b, 0x0,       64 * 1024,   128, RD_NORM,                   SECT_4K},
-       {"SST25WF512",     0xbf2501, 0x0,       64 * 1024,     1, RD_NORM,          SECT_4K | SST_WR},
-       {"SST25WF010",     0xbf2502, 0x0,       64 * 1024,     2, RD_NORM,          SECT_4K | SST_WR},
-       {"SST25WF020",     0xbf2503, 0x0,       64 * 1024,     4, RD_NORM,          SECT_4K | SST_WR},
-       {"SST25WF040",     0xbf2504, 0x0,       64 * 1024,     8, RD_NORM,          SECT_4K | SST_WR},
-       {"SST25WF040B",    0x621613, 0x0,       64 * 1024,     8, RD_NORM,                   SECT_4K},
-       {"SST25WF080",     0xbf2505, 0x0,       64 * 1024,    16, RD_NORM,          SECT_4K | SST_WR},
+       {"SST25VF040B",    0xbf258d, 0x0,       64 * 1024,     8, SECT_4K | SST_WR},
+       {"SST25VF080B",    0xbf258e, 0x0,       64 * 1024,    16, SECT_4K | SST_WR},
+       {"SST25VF016B",    0xbf2541, 0x0,       64 * 1024,    32, SECT_4K | SST_WR},
+       {"SST25VF032B",    0xbf254a, 0x0,       64 * 1024,    64, SECT_4K | SST_WR},
+       {"SST25VF064C",    0xbf254b, 0x0,       64 * 1024,   128, SECT_4K},
+       {"SST25WF512",     0xbf2501, 0x0,       64 * 1024,     1, SECT_4K | SST_WR},
+       {"SST25WF010",     0xbf2502, 0x0,       64 * 1024,     2, SECT_4K | SST_WR},
+       {"SST25WF020",     0xbf2503, 0x0,       64 * 1024,     4, SECT_4K | SST_WR},
+       {"SST25WF040",     0xbf2504, 0x0,       64 * 1024,     8, SECT_4K | SST_WR},
+       {"SST25WF040B",    0x621613, 0x0,       64 * 1024,     8, SECT_4K},
+       {"SST25WF080",     0xbf2505, 0x0,       64 * 1024,    16, SECT_4K | SST_WR},
 #endif
 #ifdef CONFIG_SPI_FLASH_WINBOND                /* WINBOND */
-       {"W25P80",         0xef2014, 0x0,       64 * 1024,    16, RD_NORM,                         0},
-       {"W25P16",         0xef2015, 0x0,       64 * 1024,    32, RD_NORM,                         0},
-       {"W25P32",         0xef2016, 0x0,       64 * 1024,    64, RD_NORM,                         0},
-       {"W25X40",         0xef3013, 0x0,       64 * 1024,     8, RD_NORM,                   SECT_4K},
-       {"W25X16",         0xef3015, 0x0,       64 * 1024,    32, RD_NORM,                   SECT_4K},
-       {"W25X32",         0xef3016, 0x0,       64 * 1024,    64, RD_NORM,                   SECT_4K},
-       {"W25X64",         0xef3017, 0x0,       64 * 1024,   128, RD_NORM,                   SECT_4K},
-       {"W25Q80BL",       0xef4014, 0x0,       64 * 1024,    16, RD_FULL,          WR_QPP | SECT_4K},
-       {"W25Q16CL",       0xef4015, 0x0,       64 * 1024,    32, RD_FULL,          WR_QPP | SECT_4K},
-       {"W25Q32BV",       0xef4016, 0x0,       64 * 1024,    64, RD_FULL,          WR_QPP | SECT_4K},
-       {"W25Q64CV",       0xef4017, 0x0,       64 * 1024,   128, RD_FULL,          WR_QPP | SECT_4K},
-       {"W25Q128BV",      0xef4018, 0x0,       64 * 1024,   256, RD_FULL,          WR_QPP | SECT_4K},
-       {"W25Q256",        0xef4019, 0x0,       64 * 1024,   512, RD_FULL,          WR_QPP | SECT_4K},
-       {"W25Q80BW",       0xef5014, 0x0,       64 * 1024,    16, RD_FULL,          WR_QPP | SECT_4K},
-       {"W25Q16DW",       0xef6015, 0x0,       64 * 1024,    32, RD_FULL,          WR_QPP | SECT_4K},
-       {"W25Q32DW",       0xef6016, 0x0,       64 * 1024,    64, RD_FULL,          WR_QPP | SECT_4K},
-       {"W25Q64DW",       0xef6017, 0x0,       64 * 1024,   128, RD_FULL,          WR_QPP | SECT_4K},
-       {"W25Q128FW",      0xef6018, 0x0,       64 * 1024,   256, RD_FULL,          WR_QPP | SECT_4K},
+       {"W25P80",         0xef2014, 0x0,       64 * 1024,    16, 0},
+       {"W25P16",         0xef2015, 0x0,       64 * 1024,    32, 0},
+       {"W25P32",         0xef2016, 0x0,       64 * 1024,    64, 0},
+       {"W25X40",         0xef3013, 0x0,       64 * 1024,     8, SECT_4K},
+       {"W25X16",         0xef3015, 0x0,       64 * 1024,    32, SECT_4K},
+       {"W25X32",         0xef3016, 0x0,       64 * 1024,    64, SECT_4K},
+       {"W25X64",         0xef3017, 0x0,       64 * 1024,   128, SECT_4K},
+       {"W25Q80BL",       0xef4014, 0x0,       64 * 1024,    16, RD_FULL | WR_QPP | SECT_4K},
+       {"W25Q16CL",       0xef4015, 0x0,       64 * 1024,    32, RD_FULL | WR_QPP | SECT_4K},
+       {"W25Q32BV",       0xef4016, 0x0,       64 * 1024,    64, RD_FULL | WR_QPP | SECT_4K},
+       {"W25Q64CV",       0xef4017, 0x0,       64 * 1024,   128, RD_FULL | WR_QPP | SECT_4K},
+       {"W25Q128BV",      0xef4018, 0x0,       64 * 1024,   256, RD_FULL | WR_QPP | SECT_4K},
+       {"W25Q256",        0xef4019, 0x0,       64 * 1024,   512, RD_FULL | WR_QPP | SECT_4K},
+       {"W25Q80BW",       0xef5014, 0x0,       64 * 1024,    16, RD_FULL | WR_QPP | SECT_4K},
+       {"W25Q16DW",       0xef6015, 0x0,       64 * 1024,    32, RD_FULL | WR_QPP | SECT_4K},
+       {"W25Q32DW",       0xef6016, 0x0,       64 * 1024,    64, RD_FULL | WR_QPP | SECT_4K},
+       {"W25Q64DW",       0xef6017, 0x0,       64 * 1024,   128, RD_FULL | WR_QPP | SECT_4K},
+       {"W25Q128FW",      0xef6018, 0x0,       64 * 1024,   256, RD_FULL | WR_QPP | SECT_4K},
 #endif
        {},     /* Empty entry to terminate the list */
        /*
Domain: System / Kernel;