arm64: dts: allwinner: a64: Add the SPDIF block and pin
authorMarcus Cooper <codekipper@gmail.com>
Mon, 29 Jan 2018 09:18:59 +0000 (10:18 +0100)
committerMaxime Ripard <maxime.ripard@bootlin.com>
Wed, 14 Feb 2018 12:18:37 +0000 (13:18 +0100)
Add the SPDIF transceiver controller block and pin to the A64 dtsi.

Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi

index d783d16..43c54a2 100644 (file)
                                drive-strength = <40>;
                        };
 
+                       spdif_tx_pin: spdif {
+                               pins = "PH8";
+                               function = "spdif";
+                       };
+
                        spi0_pins: spi0 {
                                pins = "PC0", "PC1", "PC2", "PC3";
                                function = "spi0";
                        };
                };
 
+               spdif: spdif@1c21000 {
+                       #sound-dai-cells = <0>;
+                       compatible = "allwinner,sun50i-a64-spdif",
+                                    "allwinner,sun8i-h3-spdif";
+                       reg = <0x01c21000 0x400>;
+                       interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
+                       resets = <&ccu RST_BUS_SPDIF>;
+                       clock-names = "apb", "spdif";
+                       dmas = <&dma 2>;
+                       dma-names = "tx";
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&spdif_tx_pin>;
+                       status = "disabled";
+               };
+
                uart0: serial@1c28000 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c28000 0x400>;