drm/i915/gt: Drop stale commentary for timeline density

We no longer allocate a contiguous set of timeline ids for all engines
upon creation, so we no longer should assume that the timelines are
densely allocated within a context. Hopefully, the set of fences used
within a workload are still dense enough for us to take advantage of
the compressed radix tree used for the syncmap.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190625233349.32371-1-chris@chris-wilson.co.uk

diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c
index 4782582..3bbb632 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_timeline.c
+++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
@@ -210,16 +210,6 @@ int intel_timeline_init(struct intel_timeline *timeline,
 {
        void *vaddr;
 
-       /*
-        * Ideally we want a set of engines on a single leaf as we expect
-        * to mostly be tracking synchronisation between engines. It is not
-        * a huge issue if this is not the case, but we may want to mitigate
-        * any page crossing penalties if they become an issue.
-        *
-        * Called during early_init before we know how many engines there are.
-        */
-       BUILD_BUG_ON(KSYNCMAP < I915_NUM_ENGINES);
-
        timeline->gt = gt;
        timeline->pin_count = 0;
        timeline->has_initial_breadcrumb = !hwsp;