drm/amdgpu: enable pptable ucode loading

With SCPM enabled, pptable cannot be uploaded to SMU directly.
The transferring has to be via PSP.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 7010944..6f977b4 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -2154,6 +2154,9 @@ static int psp_get_fw_type(struct amdgpu_firmware_info *ucode,
        case AMDGPU_UCODE_ID_SMC:
                *type = GFX_FW_TYPE_SMU;
                break;
+       case AMDGPU_UCODE_ID_PPTABLE:
+               *type = GFX_FW_TYPE_PPTABLE;
+               break;
        case AMDGPU_UCODE_ID_UVD:
                *type = GFX_FW_TYPE_UVD;
                break;

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
index c909446..6218bd6 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
@@ -543,6 +543,8 @@ const char *amdgpu_ucode_name(enum AMDGPU_UCODE_ID ucode_id)
                return "STORAGE";
        case AMDGPU_UCODE_ID_SMC:
                return "SMC";
+       case AMDGPU_UCODE_ID_PPTABLE:
+               return "PPTABLE";
        case AMDGPU_UCODE_ID_UVD:
                return "UVD";
        case AMDGPU_UCODE_ID_UVD1:
@@ -720,6 +722,10 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev,
                        ucode_addr = (u8 *)ucode->fw->data +
                                le32_to_cpu(header->ucode_array_offset_bytes);
                        break;
+               case AMDGPU_UCODE_ID_PPTABLE:
+                       ucode->ucode_size = ucode->fw->size;
+                       ucode_addr = (u8 *)ucode->fw->data;
+                       break;
                default:
                        ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes);
                        ucode_addr = (u8 *)ucode->fw->data +

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
index 864984d..1c2d1f9 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
@@ -369,6 +369,7 @@ enum AMDGPU_UCODE_ID {
        AMDGPU_UCODE_ID_RLC_G,
        AMDGPU_UCODE_ID_STORAGE,
        AMDGPU_UCODE_ID_SMC,
+       AMDGPU_UCODE_ID_PPTABLE,
        AMDGPU_UCODE_ID_UVD,
        AMDGPU_UCODE_ID_UVD1,
        AMDGPU_UCODE_ID_VCE,

diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 5dd97ea..2513b1a 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -1027,6 +1027,12 @@ static int smu_sw_init(void *handle)
                return ret;
        }
 
+       ret = smu_init_pptable_microcode(smu);
+       if (ret) {
+               dev_err(adev->dev, "Failed to setup pptable firmware!\n");
+               return ret;
+       }
+
        ret = smu_register_irq_handler(smu);
        if (ret) {
                dev_err(adev->dev, "Failed to register smc irq handler!\n");

diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 46e34ed..4913573 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -27,6 +27,7 @@
 #include "dm_pp_interface.h"
 #include "dm_pp_smu.h"
 #include "smu_types.h"
+#include "linux/firmware.h"
 
 #define SMU_THERMAL_MINIMUM_ALERT_TEMP         0
 #define SMU_THERMAL_MAXIMUM_ALERT_TEMP         255
@@ -557,6 +558,8 @@ struct smu_context
        struct smu_user_dpm_profile user_dpm_profile;
 
        struct stb_context stb_context;
+
+       struct firmware pptable_firmware;
 };
 
 struct i2c_adapter;
@@ -1298,6 +1301,11 @@ struct pptable_funcs {
         *                                                                              of SMUBUS table.
         */
        int (*send_hbm_bad_channel_flag)(struct smu_context *smu, uint32_t size);
+
+       /**
+        * @init_pptable_microcode: Prepare the pptable microcode to upload via PSP
+        */
+       int (*init_pptable_microcode)(struct smu_context *smu);
 };
 
 typedef enum {

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h b/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h
index 5f21ead..7469bbf 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h
@@ -93,6 +93,7 @@
 #define smu_set_fine_grain_gfx_freq_parameters(smu)                                    smu_ppt_funcs(set_fine_grain_gfx_freq_parameters, 0, smu)
 #define smu_get_default_config_table_settings(smu, config_table)       smu_ppt_funcs(get_default_config_table_settings, -EOPNOTSUPP, smu, config_table)
 #define smu_set_config_table(smu, config_table)                                smu_ppt_funcs(set_config_table, -EOPNOTSUPP, smu, config_table)
+#define smu_init_pptable_microcode(smu)                                        smu_ppt_funcs(init_pptable_microcode, 0, smu)
 
 #endif
 #endif