ARM: dts: imx6ul: phycore: Add eMMC at usdhc2

The phyCORE-i.MX 6UL/ULL now can have eMMC instead of the NAND flash
memory. Add the eMMC node and disable it by default so it can be enabled
in case it is populated.

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi b/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi
index de6ffbb..09a313d 100644 (file)
--- a/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi
+++ b/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi
@@ -90,6 +90,15 @@
        status = "okay";
 };
 
+&usdhc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc2>;
+       bus-width = <8>;
+       no-1-8-v;
+       non-removable;
+       status = "disabled";
+};
+
 &iomuxc {
        pinctrl_enet1: enet1grp {
                fsl,pins = <
@@ -145,4 +154,19 @@
                >;
        };
 
+       pinctrl_usdhc2: usdhc2grp {
+               fsl,pins = <
+                       MX6UL_PAD_NAND_WE_B__USDHC2_CMD         0x170f9
+                       MX6UL_PAD_NAND_RE_B__USDHC2_CLK         0x100f9
+                       MX6UL_PAD_NAND_DATA00__USDHC2_DATA0     0x170f9
+                       MX6UL_PAD_NAND_DATA01__USDHC2_DATA1     0x170f9
+                       MX6UL_PAD_NAND_DATA02__USDHC2_DATA2     0x170f9
+                       MX6UL_PAD_NAND_DATA03__USDHC2_DATA3     0x170f9
+                       MX6UL_PAD_NAND_DATA04__USDHC2_DATA4     0x170f9
+                       MX6UL_PAD_NAND_DATA05__USDHC2_DATA5     0x170f9
+                       MX6UL_PAD_NAND_DATA06__USDHC2_DATA6     0x170f9
+                       MX6UL_PAD_NAND_DATA07__USDHC2_DATA7     0x170f9
+               >;
+       };
+
 };