2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
+ * testsuite/gas/mips/mips16-pcrel-1.d: Remove `-mips3' from `as'
+ flags.
+ * testsuite/gas/mips/mips16-pcrel-pic-1.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-n32-0.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-n32-1.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-n64-0.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-n64-1.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-n64-sym32-0.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-n64-sym32-1.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-reloc-4.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-reloc-5.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-reloc-6.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-reloc-7.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-addend-4.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-addend-5.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-addend-6.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-addend-7.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-addend-9.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-addend-pic-9.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-addend-n32-8.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-addend-n32-9.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-8.d:
+ Likewise.
+ * testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-9.d:
+ Likewise.
+ * testsuite/gas/mips/mips16-pcrel-addend-n64-8.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-addend-n64-9.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-absolute-2.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-absolute-3.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-absolute-6.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-absolute-7.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-absolute-pic-6.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-absolute-n32-4.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-absolute-n32-6.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-absolute-n64-4.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-absolute-n64-6.d: Likewise.
+ * testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-4.d:
+ Likewise.
+ * testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-6.d:
+ Likewise.
+ * testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-4.d:
+ Likewise.
+ * testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-6.d:
+ Likewise.
+ * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-4.d:
+ Likewise.
+ * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-6.d:
+ Likewise.
+ * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-4.d:
+ Likewise.
+ * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-6.d:
+ Likewise.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-0.d: New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-1.d: New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-2.d: New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-n32-0.d: New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-n32-1.d: New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-0.d: New
+ test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-1.d: New
+ test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-delay-0.d: New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-delay-1.d: New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-2.d: New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-3.d: New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-6.d: New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-7.d: New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-2.d: New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-3.d: New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-6.d: New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-7.d: New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-8.d: New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-9.d: New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-8.d: New
+ test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-9.d: New
+ test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-8.d:
+ New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-9.d:
+ New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute.d: New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-1.d: New
+ test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-2.d: New
+ test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-3.d: New
+ test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-4.d: New
+ test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-5.d: New
+ test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-6.d: New
+ test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-7.d: New
+ test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-4.d: New
+ test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-6.d: New
+ test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-4.d: New
+ test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-6.d: New
+ test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-4.d:
+ New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-6.d:
+ New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-4.d:
+ New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-6.d:
+ New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-4.d:
+ New test.
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-6.d:
+ New test.
+ * testsuite/gas/mips/mips16-pcrel-1.l: Adjust line numbers.
+ * testsuite/gas/mips/mips16-pcrel-1.s: Adjust for alignment
+ preservation between MIPS16 and MIPS16e2 code.
+ * testsuite/gas/mips/mips.exp: Run MIPS16 relaxation tests over
+ all MIPS16 architectures.
+
+2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
+
* testsuite/gas/mips/mips16e2.d: New test.
* testsuite/gas/mips/mips16e2-mt.d: New test.
* testsuite/gas/mips/mips16e2-sub.d: New test.
run_list_test "pcrel-reloc-6" "-32 --defsym offset=4" \
"MIPS local PC-relative relocations 6b"
- run_dump_test "mips16-pcrel-0"
- run_dump_test "mips16-pcrel-1"
- run_dump_test "mips16-pcrel-2"
- run_dump_test "mips16-pcrel-3"
- run_dump_test "mips16-pcrel-4"
- run_dump_test "mips16-pcrel-5"
- run_dump_test "mips16-pcrel-pic-0"
- run_dump_test "mips16-pcrel-pic-1"
+ run_dump_test_arches "mips16-pcrel-0" [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-1" [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-2" [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-3" [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-4" [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-5" [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-pic-0" \
+ [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-pic-1" \
+ [mips_arch_list_matching mips16-64]
if $has_newabi {
- run_dump_test "mips16-pcrel-n32-0"
- run_dump_test "mips16-pcrel-n32-1"
- run_dump_test "mips16-pcrel-n64-sym32-0"
- run_dump_test "mips16-pcrel-n64-sym32-1"
- run_dump_test "mips16-pcrel-n64-0"
- run_dump_test "mips16-pcrel-n64-1"
- }
- run_dump_test "mips16-pcrel-delay-0"
- run_dump_test "mips16-pcrel-delay-1"
+ run_dump_test_arches "mips16-pcrel-n32-0" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-n32-1" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-n64-sym32-0" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-n64-sym32-1" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-n64-0" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-n64-1" \
+ [mips_arch_list_matching mips16-64]
+ }
+ run_dump_test_arches "mips16-pcrel-delay-0" \
+ [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-delay-1" \
+ [mips_arch_list_matching mips16-32]
run_dump_test "mips16-pcrel-relax-0"
run_dump_test "mips16-pcrel-relax-1"
run_dump_test "mips16-pcrel-relax-2"
run_dump_test "mips16-pcrel-relax-3"
- run_dump_test "mips16-pcrel-reloc-0"
- run_dump_test "mips16-pcrel-reloc-1"
- run_dump_test "mips16-pcrel-reloc-2"
- run_dump_test "mips16-pcrel-reloc-3"
- run_dump_test "mips16-pcrel-reloc-4"
- run_dump_test "mips16-pcrel-reloc-5"
- run_dump_test "mips16-pcrel-reloc-6"
- run_dump_test "mips16-pcrel-reloc-7"
- run_dump_test "mips16-pcrel-addend-0"
- run_dump_test "mips16-pcrel-addend-1"
- run_dump_test "mips16-pcrel-addend-2"
- run_dump_test "mips16-pcrel-addend-3"
- run_dump_test "mips16-pcrel-addend-4"
- run_dump_test "mips16-pcrel-addend-5"
- run_dump_test "mips16-pcrel-addend-6"
- run_dump_test "mips16-pcrel-addend-7"
- run_dump_test "mips16-pcrel-addend-8"
- run_dump_test "mips16-pcrel-addend-9"
- run_dump_test "mips16-pcrel-addend-pic-8"
- run_dump_test "mips16-pcrel-addend-pic-9"
+ run_dump_test_arches "mips16-pcrel-reloc-0" \
+ [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-reloc-1" \
+ [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-reloc-2" \
+ [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-reloc-3" \
+ [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-reloc-4" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-reloc-5" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-reloc-6" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-reloc-7" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-addend-0" \
+ [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-addend-1" \
+ [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-addend-2" \
+ [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-addend-3" \
+ [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-addend-4" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-addend-5" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-addend-6" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-addend-7" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-addend-8" \
+ [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-addend-9" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-addend-pic-8" \
+ [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-addend-pic-9" \
+ [mips_arch_list_matching mips16-64]
if $has_newabi {
- run_dump_test "mips16-pcrel-addend-n32-8"
- run_dump_test "mips16-pcrel-addend-n32-9"
- run_dump_test "mips16-pcrel-addend-n64-sym32-8"
- run_dump_test "mips16-pcrel-addend-n64-sym32-9"
- run_dump_test "mips16-pcrel-addend-n64-8"
- run_dump_test "mips16-pcrel-addend-n64-9"
- }
- run_dump_test "mips16-pcrel-absolute"
- run_dump_test "mips16-pcrel-absolute-1"
- run_dump_test "mips16-pcrel-absolute-2"
- run_dump_test "mips16-pcrel-absolute-3"
- run_dump_test "mips16-pcrel-absolute-4"
- run_dump_test "mips16-pcrel-absolute-5"
- run_dump_test "mips16-pcrel-absolute-6"
- run_dump_test "mips16-pcrel-absolute-7"
- run_dump_test "mips16-pcrel-absolute-pic-4"
- run_dump_test "mips16-pcrel-absolute-pic-6"
+ run_dump_test_arches "mips16-pcrel-addend-n32-8" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-addend-n32-9" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-addend-n64-sym32-8" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-addend-n64-sym32-9" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-addend-n64-8" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-addend-n64-9" \
+ [mips_arch_list_matching mips16-64]
+ }
+ run_dump_test_arches "mips16-pcrel-absolute" \
+ [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-absolute-1" \
+ [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-absolute-2" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-absolute-3" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-absolute-4" \
+ [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-absolute-5" \
+ [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-absolute-6" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-absolute-7" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-absolute-pic-4" \
+ [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-absolute-pic-6" \
+ [mips_arch_list_matching mips16-64]
if $has_newabi {
- run_dump_test "mips16-pcrel-absolute-n32-4"
- run_dump_test "mips16-pcrel-absolute-n32-6"
- run_dump_test "mips16-pcrel-absolute-n64-4"
- run_dump_test "mips16-pcrel-absolute-n64-6"
- run_dump_test "mips16-pcrel-absolute-n64-sym32-4"
- run_dump_test "mips16-pcrel-absolute-n64-sym32-6"
- run_dump_test "mips16-pcrel-absolute-pic-n32-4"
- run_dump_test "mips16-pcrel-absolute-pic-n32-6"
- run_dump_test "mips16-pcrel-absolute-pic-n64-4"
- run_dump_test "mips16-pcrel-absolute-pic-n64-6"
- run_dump_test "mips16-pcrel-absolute-pic-n64-sym32-4"
- run_dump_test "mips16-pcrel-absolute-pic-n64-sym32-6"
+ run_dump_test_arches "mips16-pcrel-absolute-n32-4" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-absolute-n32-6" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-absolute-n64-4" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-absolute-n64-6" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-absolute-n64-sym32-4" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-absolute-n64-sym32-6" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-absolute-pic-n32-4" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-absolute-pic-n32-6" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-absolute-pic-n64-4" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-absolute-pic-n64-6" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-absolute-pic-n64-sym32-4" \
+ [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-absolute-pic-n64-sym32-6" \
+ [mips_arch_list_matching mips16-64]
}
run_dump_test "mips16-branch-reloc-0"
run_dump_test "mips16-branch-reloc-1"
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative operations 1
-#as: -32 -mips3
+#as: -32
.*: +file format .*mips.*
.*: Assembler messages:
-.*:25: Error: operand value out of range for instruction
-.*:26: Error: operand value out of range for instruction
.*:27: Error: operand value out of range for instruction
-.*:28: Error: operand value out of range for instruction
+.*:30: Error: operand value out of range for instruction
+.*:33: Error: operand value out of range for instruction
+.*:36: Error: operand value out of range for instruction
ld $2, . - 5 + 0x7fff
dla $2, . - 1 - 0x8000
ld $2, . - 5 - 0x8000
- dla $2, . - 1 + 0x8000
- ld $2, . - 5 + 0x8000
- dla $2, . - 1 - 0x8001
- ld $2, . - 5 - 0x8001
+
+ # Pad these to retain alignment between MIPS16 and MIPS16e2 code.
+0: dla $2, . - 1 + 0x8000
+1: .insn
+ .fill (12 - (1b - 0b)) / 2, 2, 0x6500
+0: ld $2, . - 5 + 0x8000
+1: .insn
+ .fill (12 - (1b - 0b)) / 2, 2, 0x6500
+0: dla $2, . - 1 - 0x8001
+1: .insn
+ .fill (12 - (1b - 0b)) / 2, 2, 0x6500
+0: ld $2, . - 5 - 0x8001
+1: .insn
+ .fill (12 - (1b - 0b)) / 2, 2, 0x6500
+
nop
.set nomips16
.end foo
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative reference to absolute expression 2
-#as: -32 -mips3
+#as: -32
.*: +file format .*mips.*
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative reference to absolute expression 3
-#as: -32 -mips3
+#as: -32
#dump: mips16-pcrel-absolute-2.d
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative reference to absolute expression 6
-#as: -32 -mips3
+#as: -32
.*: +file format .*mips.*
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative reference to absolute expression 7
-#as: -32 -mips3
+#as: -32
#dump: mips16-pcrel-absolute-6.d
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative reference to absolute expression 4 (n32)
-#as: -n32 -mips3
+#as: -n32
#source: mips16-pcrel-absolute-4.s
#dump: mips16-pcrel-absolute-4.d
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative reference to absolute expression 6 (n32)
-#as: -n32 -mips3
+#as: -n32
#source: mips16-pcrel-absolute-6.s
#dump: mips16-pcrel-absolute-6.d
#name: MIPS16 PC-relative reference to absolute expression 4 (n64)
-#as: -64 -mips3
+#as: -64
#source: mips16-pcrel-absolute-4.s
#error-output: mips16-pcrel-absolute-4.l
#name: MIPS16 PC-relative reference to absolute expression 6 (n64)
-#as: -64 -mips3
+#as: -64
#source: mips16-pcrel-absolute-6.s
#error-output: mips16-pcrel-absolute-6.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative reference to absolute expression 4 (n64, sym32)
-#as: -64 -msym32 -mips3
+#as: -64 -msym32
#source: mips16-pcrel-absolute-4.s
#dump: mips16-pcrel-absolute-4.d
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative reference to absolute expression 6 (n64, sym32)
-#as: -64 -msym32 -mips3
+#as: -64 -msym32
#source: mips16-pcrel-absolute-6.s
#dump: mips16-pcrel-absolute-6.d
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative reference to absolute expression 6 (PIC)
-#as: -32 -mips3 -call_shared
+#as: -32 -call_shared
#source: mips16-pcrel-absolute-6.s
#dump: mips16-pcrel-absolute-6.d
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative reference to absolute expression 4 (PIC, n32)
-#as: -n32 -call_shared -mips3
+#as: -n32 -call_shared
#source: mips16-pcrel-absolute-4.s
#dump: mips16-pcrel-absolute-4.d
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative reference to absolute expression 6 (PIC, n32)
-#as: -n32 -call_shared -mips3
+#as: -n32 -call_shared
#source: mips16-pcrel-absolute-6.s
#dump: mips16-pcrel-absolute-6.d
#name: MIPS16 PC-relative reference to absolute expression 4 (PIC, n64)
-#as: -64 -call_shared -mips3
+#as: -64 -call_shared
#source: mips16-pcrel-absolute-4.s
#error-output: mips16-pcrel-absolute-4.l
#name: MIPS16 PC-relative reference to absolute expression 6 (PIC, n64)
-#as: -64 -call_shared -mips3
+#as: -64 -call_shared
#source: mips16-pcrel-absolute-6.s
#error-output: mips16-pcrel-absolute-6.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative reference to absolute expression 4 (PIC, n64, sym32)
-#as: -64 -msym32 -call_shared -mips3
+#as: -64 -msym32 -call_shared
#source: mips16-pcrel-absolute-4.s
#dump: mips16-pcrel-absolute-4.d
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative reference to absolute expression 6 (PIC, n64, sym32)
-#as: -64 -msym32 -call_shared -mips3
+#as: -64 -msym32 -call_shared
#source: mips16-pcrel-absolute-6.s
#dump: mips16-pcrel-absolute-6.d
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative relocation with addend 4
-#as: -32 -mips3
+#as: -32
.*: +file format .*mips.*
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative relocation with addend 5
-#as: -32 -mips3
+#as: -32
.*: +file format .*mips.*
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative relocation with addend 6
-#as: -32 -mips3
+#as: -32
.*: +file format .*mips.*
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative relocation with addend 7
-#as: -32 -mips3
+#as: -32
.*: +file format .*mips.*
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative relocation with addend 9
-#as: -32 -mips3
+#as: -32
.*: +file format .*mips.*
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative relocation with addend 8 (n32)
-#as: -n32 -mips3
+#as: -n32
#source: mips16-pcrel-addend-8.s
.*: +file format .*mips.*
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative relocation with addend 9 (n32)
-#as: -n32 -mips3
+#as: -n32
#source: mips16-pcrel-addend-9.s
.*: +file format .*mips.*
#name: MIPS16 PC-relative relocation with addend 8 (n64)
-#as: -64 -mips3
+#as: -64
#source: mips16-pcrel-addend-8.s
#error-output: mips16-pcrel-addend-8.l
#name: MIPS16 PC-relative relocation with addend 9 (n64)
-#as: -64 -mips3
+#as: -64
#source: mips16-pcrel-addend-9.s
#error-output: mips16-pcrel-addend-9.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative relocation with addend 8 (n64, sym32)
-#as: -64 -msym32 -mips3
+#as: -64 -msym32
#source: mips16-pcrel-addend-8.s
.*: +file format .*mips.*
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative relocation with addend 9 (n64, sym32)
-#as: -64 -msym32 -mips3
+#as: -64 -msym32
#source: mips16-pcrel-addend-9.s
.*: +file format .*mips.*
#name: MIPS16 PC-relative relocation with addend 9 (PIC)
-#as: -32 -mips3 -call_shared
+#as: -32 -call_shared
#source: mips16-pcrel-addend-9.s
#error-output: mips16-pcrel-addend-9.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative operations 0 (n32)
-#as: -n32 -mips3
+#as: -n32
#source: mips16-pcrel-0.s
.*: +file format .*mips.*
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative operations 1 (n32)
-#as: -n32 -mips3
+#as: -n32
#source: mips16-pcrel-1.s
.*: +file format .*mips.*
#name: MIPS16 PC-relative operations 0 (n64)
-#as: -64 -mips3
+#as: -64
#source: mips16-pcrel-0.s
#error-output: mips16-pcrel-0.l
#name: MIPS16 PC-relative operations 1 (n64)
-#as: -64 -mips3
+#as: -64
#source: mips16-pcrel-1.s
#error-output: mips16-pcrel-1.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative operations 0 (n64, sym32)
-#as: -64 -msym32 -mips3
+#as: -64 -msym32
#source: mips16-pcrel-0.s
.*: +file format .*mips.*
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative operations 1 (n64, sym32)
-#as: -64 -msym32 -mips3
+#as: -64 -msym32
#source: mips16-pcrel-1.s
.*: +file format .*mips.*
#name: MIPS16 PC-relative operations 1 (PIC)
-#as: -32 -mips3 -call_shared
+#as: -32 -call_shared
#source: mips16-pcrel-1.s
#error-output: mips16-pcrel-1.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative relocation 4
-#as: -32 -mips3
+#as: -32
.*: +file format .*mips.*
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative relocation 5
-#as: -32 -mips3
+#as: -32
.*: +file format .*mips.*
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative relocation 6
-#as: -32 -mips3
+#as: -32
.*: +file format .*mips.*
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative relocation 7
-#as: -32 -mips3
+#as: -32
.*: +file format .*mips.*
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative operations 0
+#as: -32
+#source: mips16-pcrel-0.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> 0a00 la v0,00010000 <foo>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> b200 lw v0,00010004 <foo\+0x4>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 0aff la v0,00010404 <baz\+0x304>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> b2ff lw v0,00010408 <baz\+0x308>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> f400 0a00 la v0,00010410 <baz\+0x310>
+[0-9a-f]+ <[^>]*> f400 b200 lw v0,00010414 <baz\+0x314>
+[0-9a-f]+ <[^>]*> f7ff 0a1c la v0,00010014 <foo\+0x14>
+[0-9a-f]+ <[^>]*> f7ff b21c lw v0,00010018 <foo\+0x18>
+[0-9a-f]+ <[^>]*> f7ef 0a1f la v0,0001801f <baz\+0x7f1f>
+[0-9a-f]+ <[^>]*> f7ef b21f lw v0,00018023 <baz\+0x7f23>
+[0-9a-f]+ <[^>]*> f010 0a00 la v0,00008028 <bar\+0x8028>
+[0-9a-f]+ <[^>]*> f010 b200 lw v0,0000802c <bar\+0x802c>
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
+[0-9a-f]+ <[^>]*> f7ef 4a1f addiu v0,32767
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
+[0-9a-f]+ <[^>]*> f7ef 9a5f lw v0,32767\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
+[0-9a-f]+ <[^>]*> f7ff 6a3f lui v0,0xffff
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
+[0-9a-f]+ <[^>]*> f7ef 4a1e addiu v0,32766
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
+[0-9a-f]+ <[^>]*> f7ff 6a3f lui v0,0xffff
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
+[0-9a-f]+ <[^>]*> f7ef 9a5e lw v0,32766\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative operations 1
+#as: -32
+#source: mips16-pcrel-1.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> fe40 dla v0,00010000 <foo>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> fc40 ld v0,00010000 <foo>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> fe5f dla v0,00010084 <baz\+0x4>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> fc5f ld v0,00010100 <baz\+0x80>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> f080 fe40 dla v0,00010090 <baz\+0x10>
+[0-9a-f]+ <[^>]*> f100 fc40 ld v0,00010110 <baz\+0x90>
+[0-9a-f]+ <[^>]*> f7ff fe5c dla v0,00010014 <foo\+0x14>
+[0-9a-f]+ <[^>]*> f7ff fc5c ld v0,00010014 <foo\+0x14>
+[0-9a-f]+ <[^>]*> f7ef fe5f dla v0,0001801f <baz\+0x7f9f>
+[0-9a-f]+ <[^>]*> f7ef fc5f ld v0,0001801f <baz\+0x7f9f>
+[0-9a-f]+ <[^>]*> f010 fe40 dla v0,00008028 <bar\+0x8028>
+[0-9a-f]+ <[^>]*> f010 fc40 ld v0,00008028 <bar\+0x8028>
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
+[0-9a-f]+ <[^>]*> f7ef fd5f daddiu v0,32767
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
+[0-9a-f]+ <[^>]*> f7ef 3a5b ld v0,32763\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> f7ff 6a3f lui v0,0xffff
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
+[0-9a-f]+ <[^>]*> f7ef fd5e daddiu v0,32766
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> f7ff 6a3f lui v0,0xffff
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
+[0-9a-f]+ <[^>]*> f7ef 3a5a ld v0,32762\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative operations 2
+#as: -32
+#stderr: mips16-pcrel-2.l
+#source: mips16-pcrel-2.s
+#dump: mips16e2@mips16-pcrel-0.d
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative reference to absolute expression 1
+#as: -32
+#source: mips16-pcrel-absolute.s
+#dump: mips16e2@mips16-pcrel-absolute.d
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative reference to absolute expression 2
+#as: -32
+#source: mips16-pcrel-absolute-2.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[0-9a-f]+ <[^>]*> f222 fd54 daddiu v0,4660
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[0-9a-f]+ <[^>]*> f222 3a54 ld v0,4660\(v0\)
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative reference to absolute expression 3
+#as: -32
+#source: mips16-pcrel-absolute-3.s
+#dump: mips16e2@mips16-pcrel-absolute-2.d
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative reference to absolute expression 4
+#as: -32
+#source: mips16-pcrel-absolute-4.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> f222 6a34 lui v0,0x1234
+[0-9a-f]+ <[^>]*> f66a 4a18 addiu v0,22136
+[0-9a-f]+ <[^>]*> f222 6a34 lui v0,0x1234
+[0-9a-f]+ <[^>]*> f66a 9a58 lw v0,22136\(v0\)
+[0-9a-f]+ <[^>]*> f222 6a34 lui v0,0x1234
+[0-9a-f]+ <[^>]*> f66a 4a18 addiu v0,22136
+[0-9a-f]+ <[^>]*> f222 6a34 lui v0,0x1234
+[0-9a-f]+ <[^>]*> f66a 9a58 lw v0,22136\(v0\)
+[0-9a-f]+ <[^>]*> f222 6a34 lui v0,0x1234
+[0-9a-f]+ <[^>]*> f2ef 4a00 addiu v0,31456
+[0-9a-f]+ <[^>]*> f222 6a34 lui v0,0x1234
+[0-9a-f]+ <[^>]*> f2ef 9a40 lw v0,31456\(v0\)
+[0-9a-f]+ <[^>]*> f464 6a29 lui v0,0x2469
+[0-9a-f]+ <[^>]*> f4f5 4a00 addiu v0,-21280
+[0-9a-f]+ <[^>]*> f464 6a29 lui v0,0x2469
+[0-9a-f]+ <[^>]*> f4f5 9a40 lw v0,-21280\(v0\)
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative reference to absolute expression 5
+#as: -32
+#source: mips16-pcrel-absolute-5.s
+#dump: mips16e2@mips16-pcrel-absolute-4.d
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative reference to absolute expression 6
+#as: -32
+#source: mips16-pcrel-absolute-6.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> f222 6a34 lui v0,0x1234
+[0-9a-f]+ <[^>]*> f66a fd58 daddiu v0,22136
+[0-9a-f]+ <[^>]*> f222 6a34 lui v0,0x1234
+[0-9a-f]+ <[^>]*> f66a 3a58 ld v0,22136\(v0\)
+[0-9a-f]+ <[^>]*> f222 6a34 lui v0,0x1234
+[0-9a-f]+ <[^>]*> f66a fd58 daddiu v0,22136
+[0-9a-f]+ <[^>]*> f222 6a34 lui v0,0x1234
+[0-9a-f]+ <[^>]*> f66a 3a58 ld v0,22136\(v0\)
+[0-9a-f]+ <[^>]*> f222 6a34 lui v0,0x1234
+[0-9a-f]+ <[^>]*> f2ef fd40 daddiu v0,31456
+[0-9a-f]+ <[^>]*> f222 6a34 lui v0,0x1234
+[0-9a-f]+ <[^>]*> f2ef 3a40 ld v0,31456\(v0\)
+[0-9a-f]+ <[^>]*> f464 6a29 lui v0,0x2469
+[0-9a-f]+ <[^>]*> f4f5 fd40 daddiu v0,-21280
+[0-9a-f]+ <[^>]*> f464 6a29 lui v0,0x2469
+[0-9a-f]+ <[^>]*> f4f5 3a40 ld v0,-21280\(v0\)
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative reference to absolute expression 7
+#as: -32
+#source: mips16-pcrel-absolute-7.s
+#dump: mips16e2@mips16-pcrel-absolute-6.d
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative reference to absolute expression 4 (n32)
+#as: -n32
+#source: mips16-pcrel-absolute-4.s
+#dump: mips16e2@mips16-pcrel-absolute-4.d
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative reference to absolute expression 6 (n32)
+#as: -n32
+#source: mips16-pcrel-absolute-6.s
+#dump: mips16e2@mips16-pcrel-absolute-6.d
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative reference to absolute expression 4 (n64, sym32)
+#as: -64 -msym32
+#source: mips16-pcrel-absolute-4.s
+#dump: mips16e2@mips16-pcrel-absolute-4.d
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative reference to absolute expression 6 (n64, sym32)
+#as: -64 -msym32
+#source: mips16-pcrel-absolute-6.s
+#dump: mips16e2@mips16-pcrel-absolute-6.d
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative reference to absolute expression 4 (PIC)
+#as: -32 -call_shared
+#source: mips16-pcrel-absolute-4.s
+#dump: mips16e2@mips16-pcrel-absolute-4.d
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative reference to absolute expression 6 (PIC)
+#as: -32 -call_shared
+#source: mips16-pcrel-absolute-6.s
+#dump: mips16e2@mips16-pcrel-absolute-6.d
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative reference to absolute expression 4 (PIC, n32)
+#as: -n32 -call_shared
+#source: mips16-pcrel-absolute-4.s
+#dump: mips16e2@mips16-pcrel-absolute-4.d
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative reference to absolute expression 6 (PIC, n32)
+#as: -n32 -call_shared
+#source: mips16-pcrel-absolute-6.s
+#dump: mips16e2@mips16-pcrel-absolute-6.d
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative reference to absolute expression 4 (PIC, n64, sym32)
+#as: -64 -msym32 -call_shared
+#source: mips16-pcrel-absolute-4.s
+#dump: mips16e2@mips16-pcrel-absolute-4.d
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative reference to absolute expression 6 (PIC, n64, sym32)
+#as: -64 -msym32 -call_shared
+#source: mips16-pcrel-absolute-6.s
+#dump: mips16e2@mips16-pcrel-absolute-6.d
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative reference to absolute expression
+#as: -32
+#source: mips16-pcrel-absolute.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[0-9a-f]+ <[^>]*> f222 4a14 addiu v0,4660
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[0-9a-f]+ <[^>]*> f222 9a54 lw v0,4660\(v0\)
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative relocation with addend 2
+#as: -32
+#source: mips16-pcrel-addend-2.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f222 4a14 addiu v0,4660
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f222 9a54 lw v0,4660\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative relocation with addend 3
+#as: -32
+#source: mips16-pcrel-addend-3.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f222 4a14 addiu v0,4660
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f222 9a54 lw v0,4660\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative relocation with addend 6
+#as: -32
+#source: mips16-pcrel-addend-6.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f222 fd54 daddiu v0,4660
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f222 3a54 ld v0,4660\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative relocation with addend 7
+#as: -32
+#source: mips16-pcrel-addend-7.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f222 fd54 daddiu v0,4660
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f222 3a54 ld v0,4660\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative relocation with addend 8
+#as: -32
+#source: mips16-pcrel-addend-8.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f464 4a08 addiu v0,9320
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f464 9a48 lw v0,9320\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f222 6a34 lui v0,0x1234
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f66a 4a18 addiu v0,22136
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f222 6a34 lui v0,0x1234
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f66a 9a58 lw v0,22136\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f464 6a29 lui v0,0x2469
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f4f5 4a00 addiu v0,-21280
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f464 6a29 lui v0,0x2469
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f4f5 9a40 lw v0,-21280\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative relocation with addend 9
+#as: -32
+#source: mips16-pcrel-addend-9.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f000 fd40 daddiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f000 3a40 ld v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f464 fd48 daddiu v0,9320
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f464 3a48 ld v0,9320\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f222 6a34 lui v0,0x1234
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f66a fd58 daddiu v0,22136
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f222 6a34 lui v0,0x1234
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f66a 3a58 ld v0,22136\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f464 6a29 lui v0,0x2469
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f4f5 fd40 daddiu v0,-21280
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f464 6a29 lui v0,0x2469
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f4f5 3a40 ld v0,-21280\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative relocation with addend 8 (n32)
+#as: -n32
+#source: mips16-pcrel-addend-8.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x2468
+[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x2468
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x2468
+[0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x2468
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x12345678
+[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x12345678
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x12345678
+[0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x12345678
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x2468ace0
+[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x2468ace0
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x2468ace0
+[0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x2468ace0
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative relocation with addend 9 (n32)
+#as: -n32
+#source: mips16-pcrel-addend-9.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f000 fd40 daddiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f000 3a40 ld v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x2468
+[0-9a-f]+ <[^>]*> f000 fd40 daddiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x2468
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x2468
+[0-9a-f]+ <[^>]*> f000 3a40 ld v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x2468
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x12345678
+[0-9a-f]+ <[^>]*> f000 fd40 daddiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x12345678
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x12345678
+[0-9a-f]+ <[^>]*> f000 3a40 ld v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x12345678
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x2468ace0
+[0-9a-f]+ <[^>]*> f000 fd40 daddiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x2468ace0
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x2468ace0
+[0-9a-f]+ <[^>]*> f000 3a40 ld v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x2468ace0
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative relocation with addend 8 (n64, sym32)
+#as: -64 -msym32
+#source: mips16-pcrel-addend-8.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x2468
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468
+[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x2468
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x2468
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468
+[0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x2468
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x12345678
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678
+[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x12345678
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x12345678
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678
+[0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x12345678
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x2468ace0
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0
+[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x2468ace0
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x2468ace0
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0
+[0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x2468ace0
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative relocation with addend 9 (n64, sym32)
+#as: -64 -msym32
+#source: mips16-pcrel-addend-9.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[0-9a-f]+ <[^>]*> f000 fd40 daddiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[0-9a-f]+ <[^>]*> f000 3a40 ld v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x2468
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468
+[0-9a-f]+ <[^>]*> f000 fd40 daddiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x2468
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x2468
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468
+[0-9a-f]+ <[^>]*> f000 3a40 ld v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x2468
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x12345678
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678
+[0-9a-f]+ <[^>]*> f000 fd40 daddiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x12345678
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x12345678
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678
+[0-9a-f]+ <[^>]*> f000 3a40 ld v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x12345678
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x2468ace0
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0
+[0-9a-f]+ <[^>]*> f000 fd40 daddiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x2468ace0
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x2468ace0
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0
+[0-9a-f]+ <[^>]*> f000 3a40 ld v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x2468ace0
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative operation in delay slot 0
+#as: -32
+#stderr: mips16-pcrel-delay-0.l
+#source: mips16-pcrel-delay-0.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> ec00 jr a0
+[0-9a-f]+ <[^>]*> 0aff la v0,000103fc <baz\+0x2fc>
+[0-9a-f]+ <[^>]*> e820 jr ra
+[0-9a-f]+ <[^>]*> b2ff lw v0,00010400 <baz\+0x300>
+[0-9a-f]+ <[^>]*> ec00 jr a0
+[0-9a-f]+ <[^>]*> f7ef 0a1f la v0,00018007 <baz\+0x7f07>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> e820 jr ra
+[0-9a-f]+ <[^>]*> f7ef b21f lw v0,0001800f <baz\+0x7f0f>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> ec00 jr a0
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
+[0-9a-f]+ <[^>]*> f7ef 4a1d addiu v0,32765
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> e820 jr ra
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
+[0-9a-f]+ <[^>]*> f7ef 9a5d lw v0,32765\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative operation in delay slot 1
+#as: -32
+#stderr: mips16-pcrel-delay-1.l
+#source: mips16-pcrel-delay-1.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> 1800 0000 jal 00000000 <bar>
+[ ]*[0-9a-f]+: R_MIPS16_26 bat
+[0-9a-f]+ <[^>]*> 0aff la v0,000103fc <baz\+0x2fc>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 1c00 0000 jalx 00000000 <bar>
+[ ]*[0-9a-f]+: R_MIPS16_26 bax
+[0-9a-f]+ <[^>]*> b2ff lw v0,00010404 <baz\+0x304>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 1800 0000 jal 00000000 <bar>
+[ ]*[0-9a-f]+: R_MIPS16_26 bat
+[0-9a-f]+ <[^>]*> f7ef 0a1f la v0,00018013 <baz\+0x7f13>
+[0-9a-f]+ <[^>]*> 1c00 0000 jalx 00000000 <bar>
+[ ]*[0-9a-f]+: R_MIPS16_26 bax
+[0-9a-f]+ <[^>]*> f7ef b21f lw v0,0001801b <baz\+0x7f1b>
+[0-9a-f]+ <[^>]*> 1800 0000 jal 00000000 <bar>
+[ ]*[0-9a-f]+: R_MIPS16_26 bat
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
+[0-9a-f]+ <[^>]*> f7ef 4a1b addiu v0,32763
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
+[0-9a-f]+ <[^>]*> 1c00 0000 jalx 00000000 <bar>
+[ ]*[0-9a-f]+: R_MIPS16_26 bax
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
+[0-9a-f]+ <[^>]*> f7ef 9a5b lw v0,32763\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative operations 0 (n32)
+#as: -n32
+#source: mips16-pcrel-0.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> 0a00 la v0,00010000 <foo>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> b200 lw v0,00010004 <foo\+0x4>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 0aff la v0,00010404 <baz\+0x304>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> b2ff lw v0,00010408 <baz\+0x308>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> f400 0a00 la v0,00010410 <baz\+0x310>
+[0-9a-f]+ <[^>]*> f400 b200 lw v0,00010414 <baz\+0x314>
+[0-9a-f]+ <[^>]*> f7ff 0a1c la v0,00010014 <foo\+0x14>
+[0-9a-f]+ <[^>]*> f7ff b21c lw v0,00010018 <foo\+0x18>
+[0-9a-f]+ <[^>]*> f7ef 0a1f la v0,0001801f <baz\+0x7f1f>
+[0-9a-f]+ <[^>]*> f7ef b21f lw v0,00018023 <baz\+0x7f23>
+[0-9a-f]+ <[^>]*> f010 0a00 la v0,00008028 <bar\+0x8028>
+[0-9a-f]+ <[^>]*> f010 b200 lw v0,0000802c <bar\+0x802c>
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7fff
+[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7fff
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7fff
+[0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7fff
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8002
+[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8002
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8002
+[0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8002
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative operations 1 (n32)
+#as: -n32
+#source: mips16-pcrel-1.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> fe40 dla v0,00010000 <foo>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> fc40 ld v0,00010000 <foo>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> fe5f dla v0,00010084 <baz\+0x4>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> fc5f ld v0,00010100 <baz\+0x80>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> f080 fe40 dla v0,00010090 <baz\+0x10>
+[0-9a-f]+ <[^>]*> f100 fc40 ld v0,00010110 <baz\+0x90>
+[0-9a-f]+ <[^>]*> f7ff fe5c dla v0,00010014 <foo\+0x14>
+[0-9a-f]+ <[^>]*> f7ff fc5c ld v0,00010014 <foo\+0x14>
+[0-9a-f]+ <[^>]*> f7ef fe5f dla v0,0001801f <baz\+0x7f9f>
+[0-9a-f]+ <[^>]*> f7ef fc5f ld v0,0001801f <baz\+0x7f9f>
+[0-9a-f]+ <[^>]*> f010 fe40 dla v0,00008028 <bar\+0x8028>
+[0-9a-f]+ <[^>]*> f010 fc40 ld v0,00008028 <bar\+0x8028>
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7fff
+[0-9a-f]+ <[^>]*> f000 fd40 daddiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7fff
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7ffb
+[0-9a-f]+ <[^>]*> f000 3a40 ld v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7ffb
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8002
+[0-9a-f]+ <[^>]*> f000 fd40 daddiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8002
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8006
+[0-9a-f]+ <[^>]*> f000 3a40 ld v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8006
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative operations 0 (n64, sym32)
+#as: -64 -msym32
+#source: mips16-pcrel-0.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> 0a00 la v0,0000000000010000 <foo>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> b200 lw v0,0000000000010004 <foo\+0x4>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 0aff la v0,0000000000010404 <baz\+0x304>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> b2ff lw v0,0000000000010408 <baz\+0x308>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> f400 0a00 la v0,0000000000010410 <baz\+0x310>
+[0-9a-f]+ <[^>]*> f400 b200 lw v0,0000000000010414 <baz\+0x314>
+[0-9a-f]+ <[^>]*> f7ff 0a1c la v0,0000000000010014 <foo\+0x14>
+[0-9a-f]+ <[^>]*> f7ff b21c lw v0,0000000000010018 <foo\+0x18>
+[0-9a-f]+ <[^>]*> f7ef 0a1f la v0,000000000001801f <baz\+0x7f1f>
+[0-9a-f]+ <[^>]*> f7ef b21f lw v0,0000000000018023 <baz\+0x7f23>
+[0-9a-f]+ <[^>]*> f010 0a00 la v0,0000000000008028 <bar\+0x8028>
+[0-9a-f]+ <[^>]*> f010 b200 lw v0,000000000000802c <bar\+0x802c>
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7fff
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
+[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7fff
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7fff
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
+[0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7fff
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8002
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
+[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8002
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8002
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
+[0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8002
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative operations 1 (n64, sym32)
+#as: -64 -msym32
+#source: mips16-pcrel-1.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> fe40 dla v0,0000000000010000 <foo>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> fc40 ld v0,0000000000010000 <foo>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> fe5f dla v0,0000000000010084 <baz\+0x4>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> fc5f ld v0,0000000000010100 <baz\+0x80>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> f080 fe40 dla v0,0000000000010090 <baz\+0x10>
+[0-9a-f]+ <[^>]*> f100 fc40 ld v0,0000000000010110 <baz\+0x90>
+[0-9a-f]+ <[^>]*> f7ff fe5c dla v0,0000000000010014 <foo\+0x14>
+[0-9a-f]+ <[^>]*> f7ff fc5c ld v0,0000000000010014 <foo\+0x14>
+[0-9a-f]+ <[^>]*> f7ef fe5f dla v0,000000000001801f <baz\+0x7f9f>
+[0-9a-f]+ <[^>]*> f7ef fc5f ld v0,000000000001801f <baz\+0x7f9f>
+[0-9a-f]+ <[^>]*> f010 fe40 dla v0,0000000000008028 <bar\+0x8028>
+[0-9a-f]+ <[^>]*> f010 fc40 ld v0,0000000000008028 <bar\+0x8028>
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7fff
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
+[0-9a-f]+ <[^>]*> f000 fd40 daddiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7fff
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7ffb
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7ffb
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7ffb
+[0-9a-f]+ <[^>]*> f000 3a40 ld v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7ffb
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7ffb
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7ffb
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8002
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
+[0-9a-f]+ <[^>]*> f000 fd40 daddiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8002
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8006
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8006
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8006
+[0-9a-f]+ <[^>]*> f000 3a40 ld v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8006
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8006
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8006
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative relocation 2
+#as: -32
+#source: mips16-pcrel-reloc-2.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative relocation 3
+#as: -32
+#source: mips16-pcrel-reloc-3.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative relocation 6
+#as: -32
+#source: mips16-pcrel-reloc-6.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f000 fd40 daddiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f000 3a40 ld v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 PC-relative relocation 7
+#as: -32
+#source: mips16-pcrel-reloc-7.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f000 fd40 daddiu v0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f000 3a40 ld v0,0\(v0\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
+2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
+
+ * testsuite/ld-mips-elf/mips16e2-pcrel-0.d: New test.
+ * testsuite/ld-mips-elf/mips16e2-pcrel-1.d: New test.
+ * testsuite/ld-mips-elf/mips16e2-pcrel-addend-2.d: New test.
+ * testsuite/ld-mips-elf/mips16e2-pcrel-addend-6.d: New test.
+ * testsuite/ld-mips-elf/mips16e2-pcrel-n32-0.d: New test.
+ * testsuite/ld-mips-elf/mips16e2-pcrel-n32-1.d: New test.
+ * testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-0.d: New test.
+ * testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-1.d: New test.
+ * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
+
2017-05-15 Nick Clifton <nickc@redhat.com>
PR ld/21459
run_dump_test "mips16-pcrel-0" [list [list ld $abi_ldflags(o32)]]
run_dump_test "mips16-pcrel-1" [list [list ld $abi_ldflags(o32)]]
+run_dump_test "mips16e2-pcrel-0" [list [list ld $abi_ldflags(o32)]]
+run_dump_test "mips16e2-pcrel-1" [list [list ld $abi_ldflags(o32)]]
run_dump_test "mips16-pcrel-addend-2" [list [list ld $abi_ldflags(o32)]]
run_dump_test "mips16-pcrel-addend-6" [list [list ld $abi_ldflags(o32)]]
+run_dump_test "mips16e2-pcrel-addend-2" [list [list ld $abi_ldflags(o32)]]
+run_dump_test "mips16e2-pcrel-addend-6" [list [list ld $abi_ldflags(o32)]]
if $has_newabi {
run_dump_test "mips16-pcrel-n32-0" [list [list ld $abi_ldflags(n32)]]
run_dump_test "mips16-pcrel-n32-1" [list [list ld $abi_ldflags(n32)]]
run_dump_test "mips16-pcrel-n64-sym32-0" [list [list ld $abi_ldflags(n64)]]
run_dump_test "mips16-pcrel-n64-sym32-1" [list [list ld $abi_ldflags(n64)]]
+ run_dump_test "mips16e2-pcrel-n32-0" [list [list ld $abi_ldflags(n32)]]
+ run_dump_test "mips16e2-pcrel-n32-1" [list [list ld $abi_ldflags(n32)]]
+ run_dump_test "mips16e2-pcrel-n64-sym32-0" \
+ [list [list ld $abi_ldflags(n64)]]
+ run_dump_test "mips16e2-pcrel-n64-sym32-1" \
+ [list [list ld $abi_ldflags(n64)]]
}
run_dump_test "mips16-branch-2" [list [list ld $abi_ldflags(o32)]]
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16e2 link PC-relative operations 0
+#source: ../../../gas/testsuite/gas/mips/mips16-pcrel-0.s
+#as: -EB -32 -mips32r2 -mmips16e2
+#ld: -EB -Ttext 0 -e 0
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> 0a00 la v0,0+010000 <.*>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> b200 lw v0,0+010004 <.*>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 0aff la v0,0+010404 <.*>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> b2ff lw v0,0+010408 <.*>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> f400 0a00 la v0,0+010410 <.*>
+[0-9a-f]+ <[^>]*> f400 b200 lw v0,0+010414 <.*>
+[0-9a-f]+ <[^>]*> f7ff 0a1c la v0,0+010014 <.*>
+[0-9a-f]+ <[^>]*> f7ff b21c lw v0,0+010018 <.*>
+[0-9a-f]+ <[^>]*> f7ef 0a1f la v0,0+01801f <.*>
+[0-9a-f]+ <[^>]*> f7ef b21f lw v0,0+018023 <.*>
+[0-9a-f]+ <[^>]*> f010 0a00 la v0,0+008028 <.*>
+[0-9a-f]+ <[^>]*> f010 b200 lw v0,0+00802c <.*>
+[0-9a-f]+ <[^>]*> f000 6a22 lui v0,0x2
+[0-9a-f]+ <[^>]*> f030 4a10 addiu v0,-32720
+[0-9a-f]+ <[^>]*> f000 6a22 lui v0,0x2
+[0-9a-f]+ <[^>]*> f030 9a58 lw v0,-32712\(v0\)
+[0-9a-f]+ <[^>]*> f000 6a21 lui v0,0x1
+[0-9a-f]+ <[^>]*> f030 4a1f addiu v0,-32705
+[0-9a-f]+ <[^>]*> f000 6a21 lui v0,0x1
+[0-9a-f]+ <[^>]*> f050 9a47 lw v0,-32697\(v0\)
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16e2 link PC-relative operations 1
+#source: ../../../gas/testsuite/gas/mips/mips16-pcrel-1.s
+#as: -EB -32 -mips64r2 -mmips16e2
+#ld: -EB -Ttext 0 -e 0
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> fe40 dla v0,0+010000 <.*>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> fc40 ld v0,0+010000 <.*>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> fe5f dla v0,0+010084 <.*>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> fc5f ld v0,0+010100 <.*>
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> f080 fe40 dla v0,0+010090 <.*>
+[0-9a-f]+ <[^>]*> f100 fc40 ld v0,0+010110 <.*>
+[0-9a-f]+ <[^>]*> f7ff fe5c dla v0,0+010014 <.*>
+[0-9a-f]+ <[^>]*> f7ff fc5c ld v0,0+010014 <.*>
+[0-9a-f]+ <[^>]*> f7ef fe5f dla v0,0+01801f <.*>
+[0-9a-f]+ <[^>]*> f7ef fc5f ld v0,0+01801f <.*>
+[0-9a-f]+ <[^>]*> f010 fe40 dla v0,0+008028 <.*>
+[0-9a-f]+ <[^>]*> f010 fc40 ld v0,0+008028 <.*>
+[0-9a-f]+ <[^>]*> f000 6a22 lui v0,0x2
+[0-9a-f]+ <[^>]*> f030 fd50 daddiu v0,-32720
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> f000 6a22 lui v0,0x2
+[0-9a-f]+ <[^>]*> f030 3a58 ld v0,-32712\(v0\)
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> f000 6a21 lui v0,0x1
+[0-9a-f]+ <[^>]*> f050 fd47 daddiu v0,-32697
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> f000 6a21 lui v0,0x1
+[0-9a-f]+ <[^>]*> f050 3a4f ld v0,-32689\(v0\)
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16e2 link PC-relative relocation with addend 2
+#source: ../../../gas/testsuite/gas/mips/mips16-pcrel-addend-2.s
+#as: -EB -32 -mips32r2 -mmips16e2
+#ld: -EB -Ttext 0x43210000 -e 0
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> f328 6a21 lui v0,0x4321
+[0-9a-f]+ <[^>]*> f264 4a04 addiu v0,8804
+[0-9a-f]+ <[^>]*> f328 6a21 lui v0,0x4321
+[0-9a-f]+ <[^>]*> f264 9a44 lw v0,8804\(v0\)
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16e2 link PC-relative relocation with addend 6
+#source: ../../../gas/testsuite/gas/mips/mips16-pcrel-addend-6.s
+#as: -EB -32 -mips64r2 -mmips16e2
+#ld: -EB -Ttext 0x43210000 -e 0
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+ \.\.\.
+[0-9a-f]+ <[^>]*> f328 6a21 lui v0,0x4321
+[0-9a-f]+ <[^>]*> f264 fd44 daddiu v0,8804
+[0-9a-f]+ <[^>]*> f328 6a21 lui v0,0x4321
+[0-9a-f]+ <[^>]*> f264 3a44 ld v0,8804\(v0\)
+[0-9a-f]+ <[^>]*> 6500 nop
+ \.\.\.
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16e2 link PC-relative operations 0 (n32)
+#source: ../../../gas/testsuite/gas/mips/mips16-pcrel-0.s
+#as: -EB -n32 -mips64r2 -mmips16e2
+#ld: -EB -Ttext 0 -e 0
+#dump: mips16e2-pcrel-0.d
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16e2 link PC-relative operations 1 (n32)
+#source: ../../../gas/testsuite/gas/mips/mips16-pcrel-1.s
+#as: -EB -n32 -mips64r2 -mmips16e2
+#ld: -EB -Ttext 0 -e 0
+#dump: mips16e2-pcrel-1.d
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16e2 link PC-relative operations 0 (n64, sym32)
+#source: ../../../gas/testsuite/gas/mips/mips16-pcrel-0.s
+#as: -EB -64 -msym32 -mips64r2 -mmips16e2
+#ld: -EB -Ttext 0 -e 0
+#dump: mips16e2-pcrel-0.d
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16e2 link PC-relative operations 1 (n64, sym32)
+#source: ../../../gas/testsuite/gas/mips/mips16-pcrel-1.s
+#as: -EB -64 -msym32 -mips64r2 -mmips16e2
+#ld: -EB -Ttext 0 -e 0
+#dump: mips16e2-pcrel-1.d
projects / external / binutils.git / commitdiff