drm/nouveau/pci/g94: split implementation from nv40

An upcoming patch will implement functionality that we don't use on any
NV40 chipset.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/pci.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/pci.h
index b5b004bdda0972b56bf5c539179c092a13396f1a..9c0b5e1605dcea202296ce984984c3a46241a4e2 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/pci.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/pci.h
@@ -31,5 +31,6 @@ int nv40_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int nv4c_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int nv50_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int g84_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
+int g94_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int gf100_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 #endif

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
index 13774c18d263c2f00532c31c0299eb03ae20ffaa..727e18e0acd0ec0e23688ec7e64c267a62268924 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
@@ -1025,7 +1025,7 @@ nv94_chipset = {
        .mc = nv50_mc_new,
        .mmu = nv50_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .therm = g84_therm_new,
        .timer = nv41_timer_new,
        .volt = nv40_volt_new,
@@ -1057,7 +1057,7 @@ nv96_chipset = {
        .mc = nv50_mc_new,
        .mmu = nv50_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .therm = g84_therm_new,
        .timer = nv41_timer_new,
        .volt = nv40_volt_new,
@@ -1089,7 +1089,7 @@ nv98_chipset = {
        .mc = g98_mc_new,
        .mmu = nv50_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .therm = g84_therm_new,
        .timer = nv41_timer_new,
        .volt = nv40_volt_new,
@@ -1121,7 +1121,7 @@ nva0_chipset = {
        .mc = g98_mc_new,
        .mmu = nv50_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .therm = g84_therm_new,
        .timer = nv41_timer_new,
        .volt = nv40_volt_new,
@@ -1153,7 +1153,7 @@ nva3_chipset = {
        .mc = g98_mc_new,
        .mmu = nv50_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .pmu = gt215_pmu_new,
        .therm = gt215_therm_new,
        .timer = nv41_timer_new,
@@ -1187,7 +1187,7 @@ nva5_chipset = {
        .mc = g98_mc_new,
        .mmu = nv50_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .pmu = gt215_pmu_new,
        .therm = gt215_therm_new,
        .timer = nv41_timer_new,
@@ -1220,7 +1220,7 @@ nva8_chipset = {
        .mc = g98_mc_new,
        .mmu = nv50_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .pmu = gt215_pmu_new,
        .therm = gt215_therm_new,
        .timer = nv41_timer_new,
@@ -1253,7 +1253,7 @@ nvaa_chipset = {
        .mc = g98_mc_new,
        .mmu = nv50_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .therm = g84_therm_new,
        .timer = nv41_timer_new,
        .volt = nv40_volt_new,
@@ -1285,7 +1285,7 @@ nvac_chipset = {
        .mc = g98_mc_new,
        .mmu = nv50_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .therm = g84_therm_new,
        .timer = nv41_timer_new,
        .volt = nv40_volt_new,
@@ -1317,7 +1317,7 @@ nvaf_chipset = {
        .mc = g98_mc_new,
        .mmu = nv50_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .pmu = gt215_pmu_new,
        .therm = gt215_therm_new,
        .timer = nv41_timer_new,
@@ -1388,7 +1388,7 @@ nvc1_chipset = {
        .mc = gf100_mc_new,
        .mmu = gf100_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .pmu = gf100_pmu_new,
        .therm = gt215_therm_new,
        .timer = nv41_timer_new,
@@ -1423,7 +1423,7 @@ nvc3_chipset = {
        .mc = gf100_mc_new,
        .mmu = gf100_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .pmu = gf100_pmu_new,
        .therm = gt215_therm_new,
        .timer = nv41_timer_new,
@@ -1566,7 +1566,7 @@ nvcf_chipset = {
        .mc = gf100_mc_new,
        .mmu = gf100_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .pmu = gf100_pmu_new,
        .therm = gt215_therm_new,
        .timer = nv41_timer_new,
@@ -1601,7 +1601,7 @@ nvd7_chipset = {
        .mc = gf100_mc_new,
        .mmu = gf100_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .therm = gf119_therm_new,
        .timer = nv41_timer_new,
        .ce[0] = gf100_ce_new,
@@ -1634,7 +1634,7 @@ nvd9_chipset = {
        .mc = gf100_mc_new,
        .mmu = gf100_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .pmu = gf119_pmu_new,
        .therm = gf119_therm_new,
        .timer = nv41_timer_new,
@@ -1669,7 +1669,7 @@ nve4_chipset = {
        .mc = gf100_mc_new,
        .mmu = gf100_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .pmu = gk104_pmu_new,
        .therm = gf119_therm_new,
        .timer = nv41_timer_new,
@@ -1706,7 +1706,7 @@ nve6_chipset = {
        .mc = gf100_mc_new,
        .mmu = gf100_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .pmu = gk104_pmu_new,
        .therm = gf119_therm_new,
        .timer = nv41_timer_new,
@@ -1743,7 +1743,7 @@ nve7_chipset = {
        .mc = gf100_mc_new,
        .mmu = gf100_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .pmu = gf119_pmu_new,
        .therm = gf119_therm_new,
        .timer = nv41_timer_new,
@@ -1804,7 +1804,7 @@ nvf0_chipset = {
        .mc = gf100_mc_new,
        .mmu = gf100_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .pmu = gk110_pmu_new,
        .therm = gf119_therm_new,
        .timer = nv41_timer_new,
@@ -1840,7 +1840,7 @@ nvf1_chipset = {
        .mc = gf100_mc_new,
        .mmu = gf100_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .pmu = gk110_pmu_new,
        .therm = gf119_therm_new,
        .timer = nv41_timer_new,
@@ -1876,7 +1876,7 @@ nv106_chipset = {
        .mc = gk20a_mc_new,
        .mmu = gf100_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .pmu = gk208_pmu_new,
        .therm = gf119_therm_new,
        .timer = nv41_timer_new,
@@ -1912,7 +1912,7 @@ nv108_chipset = {
        .mc = gk20a_mc_new,
        .mmu = gf100_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .pmu = gk208_pmu_new,
        .therm = gf119_therm_new,
        .timer = nv41_timer_new,
@@ -1948,7 +1948,7 @@ nv117_chipset = {
        .mc = gk20a_mc_new,
        .mmu = gf100_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .pmu = gm107_pmu_new,
        .therm = gm107_therm_new,
        .timer = gk20a_timer_new,
@@ -1979,7 +1979,7 @@ nv124_chipset = {
        .mc = gk20a_mc_new,
        .mmu = gf100_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .pmu = gm107_pmu_new,
        .timer = gk20a_timer_new,
        .volt = gk104_volt_new,
@@ -2010,7 +2010,7 @@ nv126_chipset = {
        .mc = gk20a_mc_new,
        .mmu = gf100_mmu_new,
        .mxm = nv50_mxm_new,
-       .pci = nv40_pci_new,
+       .pci = g94_pci_new,
        .pmu = gm107_pmu_new,
        .timer = gk20a_timer_new,
        .volt = gk104_volt_new,

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/Kbuild b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/Kbuild
index 57652f5f9bbc0c7f99d4fed3119d81a1b6a05506..85cb52501ada0882f8357211f3bc5073e330e255 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/Kbuild
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/Kbuild
@@ -5,4 +5,5 @@ nvkm-y += nvkm/subdev/pci/nv40.o
 nvkm-y += nvkm/subdev/pci/nv4c.o
 nvkm-y += nvkm/subdev/pci/nv50.o
 nvkm-y += nvkm/subdev/pci/g84.o
+nvkm-y += nvkm/subdev/pci/g94.o
 nvkm-y += nvkm/subdev/pci/gf100.o

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/g94.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/g94.c
new file mode 100644 (file)
index 0000000..1714421
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/g94.c
@@ -0,0 +1,38 @@
+/*
+ * Copyright 2015 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs <bskeggs@redhat.com>
+ */
+#include "priv.h"
+
+static const struct nvkm_pci_func
+g94_pci_func = {
+       .rd32 = nv40_pci_rd32,
+       .wr08 = nv40_pci_wr08,
+       .wr32 = nv40_pci_wr32,
+       .msi_rearm = nv40_pci_msi_rearm,
+};
+
+int
+g94_pci_new(struct nvkm_device *device, int index, struct nvkm_pci **ppci)
+{
+       return nvkm_pci_new_(&g94_pci_func, device, index, ppci);
+}

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv40.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv40.c
index 090a187f165f35cbbfc4449c6a421ab6b81b4b7a..6eb417765802d07847b30e3c120178faea657c15 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv40.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv40.c
@@ -44,7 +44,7 @@ nv40_pci_wr32(struct nvkm_pci *pci, u16 addr, u32 data)
        nvkm_wr32(device, 0x088000 + addr, data);
 }
 
-static void
+void
 nv40_pci_msi_rearm(struct nvkm_pci *pci)
 {
        nvkm_pci_wr08(pci, 0x0068, 0xff);

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/priv.h b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/priv.h
index d7622aaeb86e8eea2cfeb30d25c95175ceec36ab..68ce8e554ae9004866d22fe05fbb525eb9b5fe60 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/priv.h
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/priv.h
@@ -16,6 +16,7 @@ struct nvkm_pci_func {
 u32 nv40_pci_rd32(struct nvkm_pci *, u16);
 void nv40_pci_wr08(struct nvkm_pci *, u16, u8);
 void nv40_pci_wr32(struct nvkm_pci *, u16, u32);
+void nv40_pci_msi_rearm(struct nvkm_pci *);
 
 void nv50_pci_msi_rearm(struct nvkm_pci *);
 #endif