clk: sunxi-ng: gate: Add macros for gates with fixed dividers
authorSamuel Holland <samuel@sholland.org>
Fri, 19 Nov 2021 04:35:43 +0000 (22:35 -0600)
committerMaxime Ripard <maxime@cerno.tech>
Tue, 23 Nov 2021 09:29:05 +0000 (10:29 +0100)
It is possible to declare a gate with a fixed divider, by using the
CCU_FEATURE_ALL_PREDIV flag. Since this is not obvious, add a macro
for declaring this type of clock.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211119043545.4010-6-samuel@sholland.org
drivers/clk/sunxi-ng/ccu_gate.h

index c386689..dc05ce0 100644 (file)
@@ -53,7 +53,7 @@ struct ccu_gate {
        }
 
 /*
- * The following two macros allow the re-use of the data structure
+ * The following macros allow the re-use of the data structure
  * holding the parent info.
  */
 #define SUNXI_CCU_GATE_HWS(_struct, _name, _parent, _reg, _gate, _flags) \
@@ -68,6 +68,21 @@ struct ccu_gate {
                }                                                       \
        }
 
+#define SUNXI_CCU_GATE_HWS_WITH_PREDIV(_struct, _name, _parent, _reg,  \
+                                      _gate, _prediv, _flags)          \
+       struct ccu_gate _struct = {                                     \
+               .enable = _gate,                                        \
+               .common = {                                             \
+                       .reg            = _reg,                         \
+                       .prediv         = _prediv,                      \
+                       .features       = CCU_FEATURE_ALL_PREDIV,       \
+                       .hw.init        = CLK_HW_INIT_HWS(_name,        \
+                                                         _parent,      \
+                                                         &ccu_gate_ops, \
+                                                         _flags),      \
+               }                                                       \
+       }
+
 #define SUNXI_CCU_GATE_DATA(_struct, _name, _data, _reg, _gate, _flags)        \
        struct ccu_gate _struct = {                                     \
                .enable = _gate,                                        \
@@ -81,6 +96,21 @@ struct ccu_gate {
                }                                                       \
        }
 
+#define SUNXI_CCU_GATE_DATA_WITH_PREDIV(_struct, _name, _parent, _reg, \
+                                       _gate, _prediv, _flags)         \
+       struct ccu_gate _struct = {                                     \
+               .enable = _gate,                                        \
+               .common = {                                             \
+                       .reg            = _reg,                         \
+                       .prediv         = _prediv,                      \
+                       .features       = CCU_FEATURE_ALL_PREDIV,       \
+                       .hw.init        = CLK_HW_INIT_PARENTS_DATA(_name, \
+                                                                  _parent, \
+                                                                  &ccu_gate_ops, \
+                                                                  _flags), \
+               }                                                       \
+       }
+
 static inline struct ccu_gate *hw_to_ccu_gate(struct clk_hw *hw)
 {
        struct ccu_common *common = hw_to_ccu_common(hw);