* simops.c: Call abort for any instruction that's not currently

        simulated.

diff --git a/sim/mn10300/ChangeLog b/sim/mn10300/ChangeLog
index 32402c3..ab20c14 100644 (file)
--- a/sim/mn10300/ChangeLog
+++ b/sim/mn10300/ChangeLog
@@ -1,5 +1,8 @@
 Fri Dec  6 14:13:34 1996  Jeffrey A Law  (law@cygnus.com)
 
+       * simops.c: Call abort for any instruction that's not currently
+       simulated.
+
        * simops.c: Define accessor macros to extract register
        values from instructions.  Use them consistently.
 

diff --git a/sim/mn10300/simops.c b/sim/mn10300/simops.c
index 96e7288..f5fdd36 100644 (file)
--- a/sim/mn10300/simops.c
+++ b/sim/mn10300/simops.c
@@ -2976,76 +2976,89 @@ void OP_CB (insn, extension)
 void OP_F500 (insn, extension)
      unsigned long insn, extension;
 {
+  abort ()
 }
 
 /* getx */
 void OP_F6F0 (insn, extension)
      unsigned long insn, extension;
 {
+  abort ()
 }
 
 /* mulq */
 void OP_F600 (insn, extension)
      unsigned long insn, extension;
 {
+  abort ()
 }
 
 /* mulq */
 void OP_F90000 (insn, extension)
      unsigned long insn, extension;
 {
+  abort ()
 }
 
 /* mulq */
 void OP_FB000000 (insn, extension)
      unsigned long insn, extension;
 {
+  abort ()
 }
 
 /* mulq */
 void OP_FD000000 (insn, extension)
      unsigned long insn, extension;
 {
+  abort ()
 }
 
 /* mulqu */
 void OP_F610 (insn, extension)
      unsigned long insn, extension;
 {
+  abort ()
 }
 
 /* mulqu */
 void OP_F91400 (insn, extension)
      unsigned long insn, extension;
 {
+  abort ()
 }
 
 /* mulqu */
 void OP_FB140000 (insn, extension)
      unsigned long insn, extension;
 {
+  abort ()
 }
 
 /* mulqu */
 void OP_FD140000 (insn, extension)
      unsigned long insn, extension;
 {
+  abort ()
 }
 
 /* sat16 */
 void OP_F640 (insn, extension)
      unsigned long insn, extension;
 {
+  abort ()
 }
 
 /* sat24 */
 void OP_F650 (insn, extension)
      unsigned long insn, extension;
 {
+  abort ()
 }
 
 /* bsch */
 void OP_F670 (insn, extension)
      unsigned long insn, extension;
 {
+  abort ()
 }